| /dports/security/clamav-lts/clamav-0.103.5/libclamav/c++/llvm/utils/TableGen/ |
| H A D | CallingConvEmitter.cpp | 94 ListInit *RegList = Action->getValueAsListInit("RegList"); in EmitAction() local
115 ListInit *RegList = Action->getValueAsListInit("RegList"); in EmitAction() local
|
| /dports/emulators/yuzu/yuzu-0b47f7a46/externals/dynarmic/src/backend/x64/ |
| H A D | callback.h | 17 using RegList = std::vector<Xbyak::Reg64>; variable
|
| /dports/emulators/citra/citra-ac98458e0/externals/dynarmic/src/backend/A64/ |
| H A D | callback.h | 17 using RegList = std::vector<Arm64Gen::ARM64Reg>; variable
|
| /dports/emulators/citra-qt5/citra-ac98458e0/externals/dynarmic/src/backend/x64/ |
| H A D | callback.h | 17 using RegList = std::vector<Xbyak::Reg64>; variable
|
| /dports/emulators/citra-qt5/citra-ac98458e0/externals/dynarmic/src/backend/A64/ |
| H A D | callback.h | 17 using RegList = std::vector<Arm64Gen::ARM64Reg>; variable
|
| /dports/emulators/citra/citra-ac98458e0/externals/dynarmic/src/backend/x64/ |
| H A D | callback.h | 17 using RegList = std::vector<Xbyak::Reg64>; variable
|
| /dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/v8/src/codegen/ |
| H A D | reglist.h | 18 using RegList = uint64_t; variable
|
| /dports/www/node10/node-v10.24.1/deps/v8/src/ |
| H A D | reglist.h | 18 typedef uint64_t RegList; typedef
|
| /dports/lang/v8/v8-9.6.180.12/src/codegen/ |
| H A D | reglist.h | 18 using RegList = uint64_t; variable
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/v8/src/codegen/ |
| H A D | reglist.h | 18 using RegList = uint64_t; variable
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/X86/ |
| H A D | X86CallingConv.cpp | 33 static const MCPhysReg RegList[] = {X86::EAX, X86::ECX, X86::EDX, X86::EDI, in CC_X86_32_RegCall_Assign2Regs() local
96 ArrayRef<MCPhysReg> RegList = CC_X86_VectorCallGetSSEs(ValVT); in CC_X86_VectorCallAssignRegister() local
242 static const MCPhysReg RegList[] = {X86::EAX, X86::EDX, X86::ECX}; in CC_X86_32_MCUInReg() local
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/X86/ |
| H A D | X86CallingConv.cpp | 33 static const MCPhysReg RegList[] = {X86::EAX, X86::ECX, X86::EDX, X86::EDI, in CC_X86_32_RegCall_Assign2Regs() local
96 ArrayRef<MCPhysReg> RegList = CC_X86_VectorCallGetSSEs(ValVT); in CC_X86_VectorCallAssignRegister() local
242 static const MCPhysReg RegList[] = {X86::EAX, X86::EDX, X86::ECX}; in CC_X86_32_MCUInReg() local
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/X86/ |
| H A D | X86CallingConv.cpp | 33 static const MCPhysReg RegList[] = {X86::EAX, X86::ECX, X86::EDX, X86::EDI, in CC_X86_32_RegCall_Assign2Regs() local
96 ArrayRef<MCPhysReg> RegList = CC_X86_VectorCallGetSSEs(ValVT); in CC_X86_VectorCallAssignRegister() local
242 static const MCPhysReg RegList[] = {X86::EAX, X86::EDX, X86::ECX}; in CC_X86_32_MCUInReg() local
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| H A D | X86CallingConv.cpp | 33 static const MCPhysReg RegList[] = {X86::EAX, X86::ECX, X86::EDX, X86::EDI, in CC_X86_32_RegCall_Assign2Regs() local
96 ArrayRef<MCPhysReg> RegList = CC_X86_VectorCallGetSSEs(ValVT); in CC_X86_VectorCallAssignRegister() local
242 static const MCPhysReg RegList[] = {X86::EAX, X86::EDX, X86::ECX}; in CC_X86_32_MCUInReg() local
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86CallingConv.cpp | 33 static const MCPhysReg RegList[] = {X86::EAX, X86::ECX, X86::EDX, X86::EDI, in CC_X86_32_RegCall_Assign2Regs() local
96 ArrayRef<MCPhysReg> RegList = CC_X86_VectorCallGetSSEs(ValVT); in CC_X86_VectorCallAssignRegister() local
242 static const MCPhysReg RegList[] = {X86::EAX, X86::EDX, X86::ECX}; in CC_X86_32_MCUInReg() local
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/X86/ |
| H A D | X86CallingConv.cpp | 33 static const MCPhysReg RegList[] = {X86::EAX, X86::ECX, X86::EDX, X86::EDI, in CC_X86_32_RegCall_Assign2Regs() local
96 ArrayRef<MCPhysReg> RegList = CC_X86_VectorCallGetSSEs(ValVT); in CC_X86_VectorCallAssignRegister() local
242 static const MCPhysReg RegList[] = {X86::EAX, X86::EDX, X86::ECX}; in CC_X86_32_MCUInReg() local
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/X86/ |
| H A D | X86CallingConv.cpp | 33 static const MCPhysReg RegList[] = {X86::EAX, X86::ECX, X86::EDX, X86::EDI, in CC_X86_32_RegCall_Assign2Regs() local
96 ArrayRef<MCPhysReg> RegList = CC_X86_VectorCallGetSSEs(ValVT); in CC_X86_VectorCallAssignRegister() local
242 static const MCPhysReg RegList[] = {X86::EAX, X86::EDX, X86::ECX}; in CC_X86_32_MCUInReg() local
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/X86/ |
| H A D | X86CallingConv.cpp | 27 static const MCPhysReg RegList[] = {X86::EAX, X86::ECX, X86::EDX, X86::EDI, in CC_X86_32_RegCall_Assign2Regs() local
90 ArrayRef<MCPhysReg> RegList = CC_X86_VectorCallGetSSEs(ValVT); in CC_X86_VectorCallAssignRegister() local
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/X86/ |
| H A D | X86CallingConv.cpp | 27 static const MCPhysReg RegList[] = {X86::EAX, X86::ECX, X86::EDX, X86::EDI, in CC_X86_32_RegCall_Assign2Regs() local
90 ArrayRef<MCPhysReg> RegList = CC_X86_VectorCallGetSSEs(ValVT); in CC_X86_VectorCallAssignRegister() local
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/X86/ |
| H A D | X86CallingConv.cpp | 33 static const MCPhysReg RegList[] = {X86::EAX, X86::ECX, X86::EDX, X86::EDI, in CC_X86_32_RegCall_Assign2Regs() local
96 ArrayRef<MCPhysReg> RegList = CC_X86_VectorCallGetSSEs(ValVT); in CC_X86_VectorCallAssignRegister() local
242 static const MCPhysReg RegList[] = {X86::EAX, X86::EDX, X86::ECX}; in CC_X86_32_MCUInReg() local
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/X86/ |
| H A D | X86CallingConv.cpp | 33 static const MCPhysReg RegList[] = {X86::EAX, X86::ECX, X86::EDX, X86::EDI, in CC_X86_32_RegCall_Assign2Regs() local
96 ArrayRef<MCPhysReg> RegList = CC_X86_VectorCallGetSSEs(ValVT); in CC_X86_VectorCallAssignRegister() local
242 static const MCPhysReg RegList[] = {X86::EAX, X86::EDX, X86::ECX}; in CC_X86_32_MCUInReg() local
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/X86/ |
| H A D | X86CallingConv.cpp | 33 static const MCPhysReg RegList[] = {X86::EAX, X86::ECX, X86::EDX, X86::EDI, in CC_X86_32_RegCall_Assign2Regs() local
96 ArrayRef<MCPhysReg> RegList = CC_X86_VectorCallGetSSEs(ValVT); in CC_X86_VectorCallAssignRegister() local
242 static const MCPhysReg RegList[] = {X86::EAX, X86::EDX, X86::ECX}; in CC_X86_32_MCUInReg() local
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86CallingConv.cpp | 33 static const MCPhysReg RegList[] = {X86::EAX, X86::ECX, X86::EDX, X86::EDI, in CC_X86_32_RegCall_Assign2Regs() local
96 ArrayRef<MCPhysReg> RegList = CC_X86_VectorCallGetSSEs(ValVT); in CC_X86_VectorCallAssignRegister() local
242 static const MCPhysReg RegList[] = {X86::EAX, X86::EDX, X86::ECX}; in CC_X86_32_MCUInReg() local
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/X86/ |
| H A D | X86CallingConv.cpp | 33 static const MCPhysReg RegList[] = {X86::EAX, X86::ECX, X86::EDX, X86::EDI, in CC_X86_32_RegCall_Assign2Regs() local
96 ArrayRef<MCPhysReg> RegList = CC_X86_VectorCallGetSSEs(ValVT); in CC_X86_VectorCallAssignRegister() local
242 static const MCPhysReg RegList[] = {X86::EAX, X86::EDX, X86::ECX}; in CC_X86_32_MCUInReg() local
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/X86/ |
| H A D | X86CallingConv.cpp | 33 static const MCPhysReg RegList[] = {X86::EAX, X86::ECX, X86::EDX, X86::EDI, in CC_X86_32_RegCall_Assign2Regs() local
96 ArrayRef<MCPhysReg> RegList = CC_X86_VectorCallGetSSEs(ValVT); in CC_X86_VectorCallAssignRegister() local
242 static const MCPhysReg RegList[] = {X86::EAX, X86::EDX, X86::ECX}; in CC_X86_32_MCUInReg() local
|