/netbsd/sys/arch/aarch64/aarch64/ |
H A D | disasm.c | 1463 OP1FUNC(op_blr, Rn) in OP1FUNC() argument 1468 OP1FUNC(op_br, Rn) in OP1FUNC() argument 1796 OP2FUNC(op_ldarb, Rn, Rt) in OP2FUNC() argument 1803 OP2FUNC(op_ldarh, Rn, Rt) in OP2FUNC() argument 1825 OP2FUNC(op_ldaxrb, Rn, Rt) in OP2FUNC() argument 1832 OP2FUNC(op_ldaxrh, Rn, Rt) in OP2FUNC() argument 2332 OP2FUNC(op_ldxrb, Rn, Rt) in OP2FUNC() argument 2339 OP2FUNC(op_ldxrh, Rn, Rt) in OP2FUNC() argument 2713 OP1FUNC(op_ret, Rn) argument 2824 OP2FUNC(op_stlrb, Rn, Rt) argument [all …]
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H A D | trap.c | 683 int Rn, Rd, Rm, error; in emul_arm_swp() local
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/netbsd/external/gpl3/gdb/dist/sim/arm/ |
H A D | thumbemu.c | 266 ARMword Rn = tBITS (0, 3); in handle_T2_insn() local 317 ARMword Rn = tBITS (0, 3); in handle_T2_insn() local 406 ARMword Rn = tBITS (0, 3); in handle_T2_insn() local 442 ARMword Rn = tBITS (0, 3); in handle_T2_insn() local 464 ARMword Rn = tBITS (0, 3); in handle_T2_insn() local 544 ARMword Rn = tBITS (0, 3); in handle_T2_insn() local 579 ARMword Rn = tBITS (0, 3); in handle_T2_insn() local 617 ARMword Rn = tBITS (0, 3); in handle_T2_insn() local 682 ARMword Rn = tBITS (0, 3); in handle_T2_insn() local 714 ARMword Rn = tBITS (0, 3); in handle_T2_insn() local [all …]
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H A D | armemu.c | 271 ARMword Rn; in handle_v6_insn() local 2126 ARMword Rn = state->Reg[BITS (12, 15)]; in ARMul_Emulate32() local 2286 ARMword Rn = state->Reg[BITS (12, 15)]; in ARMul_Emulate32() local
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H A D | iwmmxt.c | 666 ARMdword Rn; in TBCST() local 1784 ARMword Rn; in Compute_Iwmmxt_Address() local
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/netbsd/external/gpl3/gdb.old/dist/sim/arm/ |
H A D | thumbemu.c | 266 ARMword Rn = tBITS (0, 3); in handle_T2_insn() local 317 ARMword Rn = tBITS (0, 3); in handle_T2_insn() local 406 ARMword Rn = tBITS (0, 3); in handle_T2_insn() local 442 ARMword Rn = tBITS (0, 3); in handle_T2_insn() local 464 ARMword Rn = tBITS (0, 3); in handle_T2_insn() local 544 ARMword Rn = tBITS (0, 3); in handle_T2_insn() local 579 ARMword Rn = tBITS (0, 3); in handle_T2_insn() local 617 ARMword Rn = tBITS (0, 3); in handle_T2_insn() local 682 ARMword Rn = tBITS (0, 3); in handle_T2_insn() local 714 ARMword Rn = tBITS (0, 3); in handle_T2_insn() local [all …]
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H A D | armemu.c | 271 ARMword Rn; in handle_v6_insn() local 2126 ARMword Rn = state->Reg[BITS (12, 15)]; in ARMul_Emulate32() local 2286 ARMword Rn = state->Reg[BITS (12, 15)]; in ARMul_Emulate32() local
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H A D | iwmmxt.c | 666 ARMdword Rn; in TBCST() local 1784 ARMword Rn; in Compute_Iwmmxt_Address() local
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/netbsd/sys/arch/sh3/include/ |
H A D | locore.h | 169 #define __EXCEPTION_BLOCK(Rn, Rm) ;\ argument 177 #define __EXCEPTION_UNBLOCK(Rn, Rm) ;\ argument 189 #define __INTR_MASK(Rn, Rm) ;\ argument 196 #define __INTR_UNMASK(Rn, Rm) ;\ argument
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 2591 unsigned Rn = fieldFromInstruction(Val, 9, 4); in DecodeAddrMode5Operand() local 2611 unsigned Rn = fieldFromInstruction(Val, 9, 4); in DecodeAddrMode5FP16Operand() local 3716 unsigned Rn = fieldFromInstruction(Val, 0, 3); in DecodeThumbAddrModeRR() local 3731 unsigned Rn = fieldFromInstruction(Val, 0, 3); in DecodeThumbAddrModeIS() local 3763 unsigned Rn = fieldFromInstruction(Val, 6, 4); in DecodeT2AddrModeSOReg() local 4160 unsigned Rn = fieldFromInstruction(Val, 9, 4); in DecodeT2AddrModeImm8s4() local 4176 unsigned Rn = fieldFromInstruction(Val, 8, 4); in DecodeT2AddrModeImm7s4() local 4191 unsigned Rn = fieldFromInstruction(Val, 8, 4); in DecodeT2AddrModeImm0_1020s4() local 4233 unsigned Rn = fieldFromInstruction(Val, 9, 4); in DecodeT2AddrModeImm8() local 4281 unsigned Rn = fieldFromInstruction(Val, 8, 3); in DecodeTAddrModeImm7() local [all …]
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/Disassembler/ |
H A D | AArch64Disassembler.cpp | 890 unsigned Rn = fieldFromInstruction(Insn, 5, 5); in DecodeFMOVLaneInstruction() local 981 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeThreeAddrSRegInstruction() local 1076 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeUnsignedLdStInstruction() local 1137 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeSignedLdStInstruction() local 1335 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeExclusiveLdStInstruction() local 1418 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodePairLdStInstruction() local 1552 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeAuthLoadInstruction() local 1585 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeAddSubERegInstruction() local 1642 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeLogicalImmInstruction() local 1748 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeAddSubImmShift() local
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCCodeEmitter.cpp | 932 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getThumbAddrModeRegRegOpValue() local 1068 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(M0.getReg()); in getMveAddrModeRQOpValue() local 1254 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getLdStSORegOpValue() local 1351 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. in getAddrMode3OpValue() local 1361 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrMode3OpValue() local 1398 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrModeISOpValue() local
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/netbsd/external/gpl3/binutils.old/dist/gas/config/ |
H A D | tc-arm.c | 9605 unsigned Rd, Rn; in do_co_reg2c() local 11501 int Rd, Rn; in do_t_add_sub_w() local 11523 int Rd, Rs, Rn; in do_t_add_sub() local 11790 int Rd, Rs, Rn; in do_t_arit3() local 11878 int Rd, Rs, Rn; in do_t_arit3c() local 11990 int Rd, Rn; in do_t_bfi() local 12020 unsigned Rd, Rn; in do_t_bfx() local 12661 int Rn; in do_t_ldst() local 12919 unsigned Rn, Rm; in do_t_mov_cmp() local 13252 unsigned Rn, Rm; in do_t_mvn_tst() local [all …]
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/netbsd/external/gpl3/gdb/dist/gas/config/ |
H A D | tc-arm.c | 9647 unsigned Rd, Rn; in do_co_reg2c() local 11543 int Rd, Rn; in do_t_add_sub_w() local 11565 int Rd, Rs, Rn; in do_t_add_sub() local 11832 int Rd, Rs, Rn; in do_t_arit3() local 11920 int Rd, Rs, Rn; in do_t_arit3c() local 12032 int Rd, Rn; in do_t_bfi() local 12062 unsigned Rd, Rn; in do_t_bfx() local 12703 int Rn; in do_t_ldst() local 12961 unsigned Rn, Rm; in do_t_mov_cmp() local 13294 unsigned Rn, Rm; in do_t_mvn_tst() local [all …]
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/netbsd/external/gpl3/binutils/dist/gas/config/ |
H A D | tc-arm.c | 9701 unsigned Rd, Rn; in do_co_reg2c() local 11603 int Rd, Rn; in do_t_add_sub_w() local 11625 int Rd, Rs, Rn; in do_t_add_sub() local 11892 int Rd, Rs, Rn; in do_t_arit3() local 11980 int Rd, Rs, Rn; in do_t_arit3c() local 12092 int Rd, Rn; in do_t_bfi() local 12122 unsigned Rd, Rn; in do_t_bfx() local 12763 int Rn; in do_t_ldst() local 13021 unsigned Rn, Rm; in do_t_mov_cmp() local 13354 unsigned Rn, Rm; in do_t_mvn_tst() local [all …]
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/netbsd/external/gpl3/gdb.old/dist/gas/config/ |
H A D | tc-arm.c | 9647 unsigned Rd, Rn; in do_co_reg2c() local 11543 int Rd, Rn; in do_t_add_sub_w() local 11565 int Rd, Rs, Rn; in do_t_add_sub() local 11832 int Rd, Rs, Rn; in do_t_arit3() local 11920 int Rd, Rs, Rn; in do_t_arit3c() local 12032 int Rd, Rn; in do_t_bfi() local 12062 unsigned Rd, Rn; in do_t_bfx() local 12703 int Rn; in do_t_ldst() local 12961 unsigned Rn, Rm; in do_t_mov_cmp() local 13294 unsigned Rn, Rm; in do_t_mvn_tst() local [all …]
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/netbsd/external/gpl3/gdb/dist/include/opcode/ |
H A D | tic30.h | 190 #define Rn 0x0001 macro
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/netbsd/external/gpl3/binutils.old/dist/include/opcode/ |
H A D | tic30.h | 190 #define Rn 0x0001 macro
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/netbsd/external/gpl3/binutils/dist/include/opcode/ |
H A D | tic30.h | 190 #define Rn 0x0001 macro
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/netbsd/external/gpl3/gdb.old/dist/include/opcode/ |
H A D | tic30.h | 190 #define Rn 0x0001 macro
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/AsmParser/ |
H A D | AArch64AsmParser.cpp | 4209 unsigned Rn = Inst.getOperand(3).getReg(); in validateInstruction() local 4255 unsigned Rn = Inst.getOperand(3).getReg(); in validateInstruction() local 4287 unsigned Rn = Inst.getOperand(2).getReg(); in validateInstruction() local 4306 unsigned Rn = Inst.getOperand(2).getReg(); in validateInstruction() local 4322 unsigned Rn = Inst.getOperand(2).getReg(); in validateInstruction() local 4336 unsigned Rn = Inst.getOperand(3).getReg(); in validateInstruction() local
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | Thumb2SizeReduction.cpp | 468 Register Rn = MI->getOperand(IsStore ? 0 : 1).getReg(); in ReduceLoadStore() local
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H A D | ARMBaseInstrInfo.cpp | 3560 Register Rn = MI.getOperand(2).getReg(); in getNumMicroOpsSwiftLdSt() local 3586 Register Rn = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local 3596 Register Rn = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local 3633 Register Rn = MI.getOperand(2).getReg(); in getNumMicroOpsSwiftLdSt() local
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 7571 unsigned Rn = MRI->getEncodingValue(Inst.getOperand(3).getReg()); in validateLDRDSTRD() local 7762 const unsigned Rn = MRI->getEncodingValue(Inst.getOperand(2).getReg()); in validateInstruction() local 7775 const unsigned Rn = MRI->getEncodingValue(Inst.getOperand(1).getReg()); in validateInstruction() local 7822 const unsigned Rn = MRI->getEncodingValue(Inst.getOperand(2).getReg()); in validateInstruction() local 7897 unsigned Rn = Inst.getOperand(0).getReg(); in validateInstruction() local 10386 unsigned Rn = Inst.getOperand(0).getReg(); in processInstruction() local 10410 unsigned Rn = Inst.getOperand(0).getReg(); in processInstruction() local
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/netbsd/external/gpl3/binutils.old/dist/opcodes/ |
H A D | arm-dis.c | 10754 unsigned int Rn = (given & 0x000f0000) >> 16; in print_insn_thumb32() local 10839 unsigned int Rn = (given & 0x000f0000) >> 16; in print_insn_thumb32() local
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