xref: /netbsd/sys/arch/hpc/stand/hpcboot/sh3/cpu/7709.h (revision ce099b40)
1 /*	$NetBSD: 7709.h,v 1.5 2008/04/28 20:23:20 martin Exp $	*/
2 
3 /*-
4  * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by UCHIYAMA Yasushi.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #ifndef _HPCBOOT_SH_CPU_7709_H_
33 #define	_HPCBOOT_SH_CPU_7709_H_
34 
35 #define	SH7709_CACHE_LINESZ		16
36 #define	SH7709_CACHE_ENTRY		128
37 #define	SH7709_CACHE_WAY		4
38 #define	SH7709_CACHE_SIZE						\
39 	(SH7709_CACHE_LINESZ * SH7709_CACHE_ENTRY * SH7709_CACHE_WAY)
40 
41 #define	SH7709_CACHE_ENTRY_SHIFT	4
42 #define	SH7709_CACHE_ENTRY_MASK		0x000007f0
43 #define	SH7709_CACHE_WAY_SHIFT		11
44 #define	SH7709_CACHE_WAY_MASK		0x00001800
45 
46 #define	SH7709_CACHE_FLUSH()						\
47 __BEGIN_MACRO								\
48 	uint32_t __e, __w, __wa, __a;					\
49 									\
50 	for (__w = 0; __w < SH7709_CACHE_WAY; __w++) {			\
51 		__wa = SH3_CCA | __w << SH7709_CACHE_WAY_SHIFT;		\
52 		for (__e = 0; __e < SH7709_CACHE_ENTRY; __e++) {	\
53 			__a = __wa |(__e << SH7709_CACHE_ENTRY_SHIFT);	\
54 			_reg_read_4(__a) &= ~0x3; /* Clear U,V bit */	\
55 		}							\
56 	}								\
57 __END_MACRO
58 
59 #define	SH7709_MMU_DISABLE	SH3_MMU_DISABLE
60 
61 #endif // _HPCBOOT_SH_CPU_7709_H_
62