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Searched defs:SPIKE_V1_10_0_CPU (Results 1 – 6 of 6) sorted by relevance

/dports/emulators/qemu42/qemu-4.2.1/include/hw/riscv/
H A Dspike.h43 #define SPIKE_V1_10_0_CPU TYPE_RISCV_CPU_RV32GCSU_V1_10_0 macro
46 #define SPIKE_V1_10_0_CPU TYPE_RISCV_CPU_RV64GCSU_V1_10_0 macro
/dports/emulators/qemu-utils/qemu-4.2.1/include/hw/riscv/
H A Dspike.h43 #define SPIKE_V1_10_0_CPU TYPE_RISCV_CPU_RV32GCSU_V1_10_0 macro
46 #define SPIKE_V1_10_0_CPU TYPE_RISCV_CPU_RV64GCSU_V1_10_0 macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/include/hw/riscv/
H A Dspike.h43 #define SPIKE_V1_10_0_CPU TYPE_RISCV_CPU_RV32GCSU_V1_10_0 macro
46 #define SPIKE_V1_10_0_CPU TYPE_RISCV_CPU_RV64GCSU_V1_10_0 macro
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/include/hw/riscv/
H A Dspike.h43 #define SPIKE_V1_10_0_CPU TYPE_RISCV_CPU_RV32GCSU_V1_10_0 macro
46 #define SPIKE_V1_10_0_CPU TYPE_RISCV_CPU_RV64GCSU_V1_10_0 macro
/dports/emulators/qemu5/qemu-5.2.0/include/hw/riscv/
H A Dspike.h51 #define SPIKE_V1_10_0_CPU TYPE_RISCV_CPU_BASE32 macro
53 #define SPIKE_V1_10_0_CPU TYPE_RISCV_CPU_BASE64 macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/include/hw/riscv/
H A Dspike.h44 #define SPIKE_V1_10_0_CPU TYPE_RISCV_CPU_RV32GCSU_V1_10_0 macro
47 #define SPIKE_V1_10_0_CPU TYPE_RISCV_CPU_RV64GCSU_V1_10_0 macro