Home
last modified time | relevance | path

Searched defs:SQ_DSM_CNTL__LDS_ENABLE_SINGLE_WRITE01__SHIFT (Results 1 – 5 of 5) sorted by path

/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h2075 #define SQ_DSM_CNTL__LDS_ENABLE_SINGLE_WRITE01__SHIFT macro
H A Dgc_9_1_sh_mask.h2024 #define SQ_DSM_CNTL__LDS_ENABLE_SINGLE_WRITE01__SHIFT macro
H A Dgc_9_2_1_sh_mask.h2047 #define SQ_DSM_CNTL__LDS_ENABLE_SINGLE_WRITE01__SHIFT macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h13578 #define SQ_DSM_CNTL__LDS_ENABLE_SINGLE_WRITE01__SHIFT 0x12 macro
H A Dgfx_8_1_sh_mask.h13976 #define SQ_DSM_CNTL__LDS_ENABLE_SINGLE_WRITE01__SHIFT 0x12 macro