1 /* pdp8_defs.h: PDP-8 simulator definitions 2 3 Copyright (c) 1993-2012, Robert M Supnik 4 5 Permission is hereby granted, free of charge, to any person obtaining a 6 copy of this software and associated documentation files (the "Software"), 7 to deal in the Software without restriction, including without limitation 8 the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 and/or sell copies of the Software, and to permit persons to whom the 10 Software is furnished to do so, subject to the following conditions: 11 12 The above copyright notice and this permission notice shall be included in 13 all copies or substantial portions of the Software. 14 15 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 19 IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 20 CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 21 22 Except as contained in this notice, the name of Robert M Supnik shall not be 23 used in advertising or otherwise to promote the sale, use or other dealings 24 in this Software without prior written authorization from Robert M Supnik. 25 26 18-Apr-12 RMS Removed separate timer for additional terminals; 27 added clock_cosched prototype 28 22-May-10 RMS Added check for 64b definitions 29 21-Aug-07 RMS Added FPP8 support 30 13-Dec-06 RMS Added TA8E support 31 30-Oct-06 RMS Added infinite loop stop 32 13-Oct-03 RMS Added TSC8-75 support 33 04-Oct-02 RMS Added variable device number support 34 20-Jan-02 RMS Fixed bug in TTx interrupt enable initialization 35 25-Nov-01 RMS Added RL8A support 36 16-Sep-01 RMS Added multiple KL support 37 18-Mar-01 RMS Added DF32 support 38 15-Feb-01 RMS Added DECtape support 39 14-Apr-99 RMS Changed t_addr to unsigned 40 19-Mar-95 RMS Added dynamic memory size 41 02-May-94 RMS Added non-existent memory handling 42 43 The author gratefully acknowledges the help of Max Burnet, Richie Lary, 44 and Bill Haygood in resolving questions about the PDP-8 45 */ 46 47 #ifndef _PDP8_DEFS_H_ 48 #define _PDP8_DEFS_H_ 0 49 50 #include "sim_defs.h" /* simulator defns */ 51 52 #if defined(USE_INT64) || defined(USE_ADDR64) 53 #error "PDP-8 does not support 64b values!" 54 #endif 55 56 /* Simulator stop codes */ 57 58 #define STOP_RSRV 1 /* must be 1 */ 59 #define STOP_HALT 2 /* HALT */ 60 #define STOP_IBKPT 3 /* breakpoint */ 61 #define STOP_NOTSTD 4 /* non-std devno */ 62 #define STOP_DTOFF 5 /* DECtape off reel */ 63 #define STOP_LOOP 6 /* infinite loop */ 64 65 /* Memory */ 66 67 #define MAXMEMSIZE 32768 /* max memory size */ 68 #define MEMSIZE (cpu_unit.capac) /* actual memory size */ 69 #define ADDRMASK (MAXMEMSIZE - 1) /* address mask */ 70 #define MEM_ADDR_OK(x) (((uint32) (x)) < MEMSIZE) 71 72 /* IOT subroutine return codes */ 73 74 #define IOT_V_SKP 12 /* skip */ 75 #define IOT_V_REASON 13 /* reason */ 76 #define IOT_SKP (1 << IOT_V_SKP) 77 #define IOT_REASON (1 << IOT_V_REASON) 78 #define IORETURN(f,v) ((f)? (v): SCPE_OK) /* stop on error */ 79 80 /* Timers */ 81 82 #define TMR_CLK 0 /* timer 0 = clock */ 83 84 /* Device information block */ 85 86 #define DEV_MAXBLK 8 /* max dev block */ 87 #define DEV_MAX 64 /* total devices */ 88 89 typedef struct { 90 uint32 dev; /* base dev number */ 91 uint32 num; /* number of slots */ 92 int32 (*dsp[DEV_MAXBLK])(int32 IR, int32 dat); 93 } DIB; 94 95 /* Standard device numbers */ 96 97 #define DEV_PTR 001 /* paper tape reader */ 98 #define DEV_PTP 002 /* paper tape punch */ 99 #define DEV_TTI 003 /* console input */ 100 #define DEV_TTO 004 /* console output */ 101 #define DEV_CLK 013 /* clock */ 102 #define DEV_TSC 036 103 #define DEV_KJ8 040 /* extra terminals */ 104 #define DEV_FPP 055 /* floating point */ 105 #define DEV_DF 060 /* DF32 */ 106 #define DEV_RF 060 /* RF08 */ 107 #define DEV_RL 060 /* RL8A */ 108 #define DEV_LPT 066 /* line printer */ 109 #define DEV_MT 070 /* TM8E */ 110 #define DEV_CT 070 /* TA8E */ 111 #define DEV_RK 074 /* RK8E */ 112 #define DEV_RX 075 /* RX8E/RX28 */ 113 #define DEV_DTA 076 /* TC08 */ 114 #define DEV_TD8E 077 /* TD8E */ 115 116 /* Interrupt flags 117 118 The interrupt flags consist of three groups: 119 120 1. Devices with individual interrupt enables. These record 121 their interrupt requests in device_done and their enables 122 in device_enable, and must occupy the low bit positions. 123 124 2. Devices without interrupt enables. These record their 125 interrupt requests directly in int_req, and must occupy 126 the middle bit positions. 127 128 3. Overhead. These exist only in int_req and must occupy the 129 high bit positions. 130 131 Because the PDP-8 does not have priority interrupts, the order 132 of devices within groups does not matter. 133 134 Note: all extra KL input and output interrupts must be assigned 135 to contiguous bits. 136 */ 137 138 #define INT_V_START 0 /* enable start */ 139 #define INT_V_LPT (INT_V_START+0) /* line printer */ 140 #define INT_V_PTP (INT_V_START+1) /* tape punch */ 141 #define INT_V_PTR (INT_V_START+2) /* tape reader */ 142 #define INT_V_TTO (INT_V_START+3) /* terminal */ 143 #define INT_V_TTI (INT_V_START+4) /* keyboard */ 144 #define INT_V_CLK (INT_V_START+5) /* clock */ 145 #define INT_V_TTO1 (INT_V_START+6) /* tto1 */ 146 #define INT_V_TTO2 (INT_V_START+7) /* tto2 */ 147 #define INT_V_TTO3 (INT_V_START+8) /* tto3 */ 148 #define INT_V_TTO4 (INT_V_START+9) /* tto4 */ 149 #define INT_V_TTI1 (INT_V_START+10) /* tti1 */ 150 #define INT_V_TTI2 (INT_V_START+11) /* tti2 */ 151 #define INT_V_TTI3 (INT_V_START+12) /* tti3 */ 152 #define INT_V_TTI4 (INT_V_START+13) /* tti4 */ 153 #define INT_V_DIRECT (INT_V_START+14) /* direct start */ 154 #define INT_V_RX (INT_V_DIRECT+0) /* RX8E */ 155 #define INT_V_RK (INT_V_DIRECT+1) /* RK8E */ 156 #define INT_V_RF (INT_V_DIRECT+2) /* RF08 */ 157 #define INT_V_DF (INT_V_DIRECT+3) /* DF32 */ 158 #define INT_V_MT (INT_V_DIRECT+4) /* TM8E */ 159 #define INT_V_DTA (INT_V_DIRECT+5) /* TC08 */ 160 #define INT_V_RL (INT_V_DIRECT+6) /* RL8A */ 161 #define INT_V_CT (INT_V_DIRECT+7) /* TA8E int */ 162 #define INT_V_PWR (INT_V_DIRECT+8) /* power int */ 163 #define INT_V_UF (INT_V_DIRECT+9) /* user int */ 164 #define INT_V_TSC (INT_V_DIRECT+10) /* TSC8-75 int */ 165 #define INT_V_FPP (INT_V_DIRECT+11) /* FPP8 */ 166 #define INT_V_OVHD (INT_V_DIRECT+12) /* overhead start */ 167 #define INT_V_NO_ION_PENDING (INT_V_OVHD+0) /* ion pending */ 168 #define INT_V_NO_CIF_PENDING (INT_V_OVHD+1) /* cif pending */ 169 #define INT_V_ION (INT_V_OVHD+2) /* interrupts on */ 170 171 #define INT_LPT (1 << INT_V_LPT) 172 #define INT_PTP (1 << INT_V_PTP) 173 #define INT_PTR (1 << INT_V_PTR) 174 #define INT_TTO (1 << INT_V_TTO) 175 #define INT_TTI (1 << INT_V_TTI) 176 #define INT_CLK (1 << INT_V_CLK) 177 #define INT_TTO1 (1 << INT_V_TTO1) 178 #define INT_TTO2 (1 << INT_V_TTO2) 179 #define INT_TTO3 (1 << INT_V_TTO3) 180 #define INT_TTO4 (1 << INT_V_TTO4) 181 #define INT_TTI1 (1 << INT_V_TTI1) 182 #define INT_TTI2 (1 << INT_V_TTI2) 183 #define INT_TTI3 (1 << INT_V_TTI3) 184 #define INT_TTI4 (1 << INT_V_TTI4) 185 #define INT_RX (1 << INT_V_RX) 186 #define INT_RK (1 << INT_V_RK) 187 #define INT_RF (1 << INT_V_RF) 188 #define INT_DF (1 << INT_V_DF) 189 #define INT_MT (1 << INT_V_MT) 190 #define INT_DTA (1 << INT_V_DTA) 191 #define INT_RL (1 << INT_V_RL) 192 #define INT_CT (1 << INT_V_CT) 193 #define INT_PWR (1 << INT_V_PWR) 194 #define INT_UF (1 << INT_V_UF) 195 #define INT_TSC (1 << INT_V_TSC) 196 #define INT_FPP (1 << INT_V_FPP) 197 #define INT_NO_ION_PENDING (1 << INT_V_NO_ION_PENDING) 198 #define INT_NO_CIF_PENDING (1 << INT_V_NO_CIF_PENDING) 199 #define INT_ION (1 << INT_V_ION) 200 #define INT_DEV_ENABLE ((1 << INT_V_DIRECT) - 1) /* devices w/enables */ 201 #define INT_ALL ((1 << INT_V_OVHD) - 1) /* all interrupts */ 202 #define INT_INIT_ENABLE (INT_TTI+INT_TTO+INT_PTR+INT_PTP+INT_LPT) | \ 203 (INT_TTI1+INT_TTI2+INT_TTI3+INT_TTI4) | \ 204 (INT_TTO1+INT_TTO2+INT_TTO3+INT_TTO4) 205 #define INT_PENDING (INT_ION+INT_NO_CIF_PENDING+INT_NO_ION_PENDING) 206 #define INT_UPDATE ((int_req & ~INT_DEV_ENABLE) | (dev_done & int_enable)) 207 208 /* Function prototypes */ 209 210 t_stat set_dev (UNIT *uptr, int32 val, char *cptr, void *desc); 211 t_stat show_dev (FILE *st, UNIT *uptr, int32 val, void *desc); 212 213 int32 clk_cosched (int32 wait); 214 215 #endif 216