xref: /netbsd/sys/arch/dreamcast/dev/pvr.c (revision beecddb6)
1 /*	$NetBSD: pvr.c,v 1.39 2021/08/07 16:18:47 thorpej Exp $	*/
2 
3 /*-
4  * Copyright (c) 2001 Marcus Comstedt.
5  * Copyright (c) 2001 Jason R. Thorpe.
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *	This product includes software developed by Marcus Comstedt.
19  * 4. Neither the name of The NetBSD Foundation nor the names of its
20  *    contributors may be used to endorse or promote products derived
21  *    from this software without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
24  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
25  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
26  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
27  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33  * POSSIBILITY OF SUCH DAMAGE.
34  */
35 
36 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
37 
38 __KERNEL_RCSID(0, "$NetBSD: pvr.c,v 1.39 2021/08/07 16:18:47 thorpej Exp $");
39 
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/kernel.h>
43 #include <sys/device.h>
44 #include <sys/malloc.h>
45 #include <sys/buf.h>
46 #include <sys/ioctl.h>
47 #include <sys/bus.h>
48 
49 #include <machine/vmparam.h>
50 #include <machine/cpu.h>
51 
52 #include <dev/cons.h>
53 
54 #include <dev/wscons/wsconsio.h>
55 #include <dev/wscons/wsdisplayvar.h>
56 
57 #include <dev/wscons/wscons_callbacks.h>
58 
59 #include <dev/rasops/rasops.h>
60 #include <dev/wsfont/wsfont.h>
61 
62 #include <dreamcast/dev/pvrvar.h>
63 #include <dreamcast/dev/maple/mkbdvar.h>
64 
65 #include "mkbd.h"
66 
67 #define	PVRREG_FBSTART		0x05000000
68 #define	PVRREG_REGSTART		0x005f8000
69 
70 #define	PVRREG_BRDCOLR		0x40
71 #define	BRDCOLR_BLUE(x)		((x) << 0)
72 #define	BRDCOLR_GREEN(x)	((x) << 8)
73 #define	BRDCOLR_RED(x)		((x) << 16)
74 
75 #define	PVRREG_DIWMODE		0x44
76 #define	DIWMODE_DE		(1U << 0)	/* display enable */
77 #define	DIWMODE_SD		(1U << 1)	/* scan double enable */
78 #define	DIWMODE_COL(x)		((x) << 2)
79 #define	DIWMODE_COL_RGB555	DIWMODE_COL(0)	/* RGB555, 16-bit */
80 #define	DIWMODE_COL_RGB565	DIWMODE_COL(1)	/* RGB565, 16-bit */
81 #define	DIWMODE_COL_RGB888	DIWMODE_COL(2)	/* RGB888, 24-bit */
82 #define	DIWMODE_COL_ARGB888	DIWMODE_COL(3)	/* RGB888, 32-bit */
83 #define	DIWMODE_C		(1U << 23)	/* 2x clock enable (VGA) */
84 
85 #define	PVRREG_DIWADDRL		0x50
86 
87 #define	PVRREG_DIWADDRS		0x54
88 
89 #define	PVRREG_DIWSIZE		0x5c
90 #define	DIWSIZE_DPL(x)		((x) << 0)	/* pixel data per line */
91 #define	DIWSIZE_LPF(x)		((x) << 10)	/* lines per field */
92 #define	DIWSIZE_MODULO(x)	((x) << 20)	/* words to skip + 1 */
93 
94 #define	PVRREG_RASEVTPOS	0xcc
95 #define	RASEVTPOS_BOTTOM(x)	((x) << 0)
96 #define	RASEVTPOS_TOP(x)	((x) << 16)
97 
98 #define	PVRREG_SYNCCONF		0xd0
99 #define	SYNCCONF_VP		(1U << 0)	/* V-sync polarity */
100 #define	SYNCCONF_HP		(1U << 1)	/* H-sync polarity */
101 #define	SYNCCONF_I		(1U << 4)	/* interlace */
102 #define	SYNCCONF_BC(x)		(1U << 6)	/* broadcast standard */
103 #define	SYNCCONF_VO		(1U << 8)	/* video output enable */
104 
105 #define	PVRREG_BRDHORZ		0xd4
106 #define	BRDHORZ_STOP(x)		((x) << 0)
107 #define	BRDHORZ_START(x)	((x) << 16)
108 
109 #define	PVRREG_SYNCSIZE		0xd8
110 #define	SYNCSIZE_H(x)		((x) << 0)
111 #define	SYNCSIZE_V(x)		((x) << 16)
112 
113 #define	PVRREG_BRDVERT		0xdc
114 #define	BRDVERT_STOP(x)		((x) << 0)
115 #define	BRDVERT_START(x)	((x) << 16)
116 
117 #define	PVRREG_DIWCONF		0xe8
118 #define	DIWCONF_LR		(1U << 8)	/* low-res */
119 #define	DIWCONF_MAGIC		(22 << 16)
120 
121 #define	PVRREG_DIWHSTRT		0xec
122 
123 #define	PVRREG_DIWVSTRT		0xf0
124 #define	DIWVSTRT_V1(x)		((x) << 0)
125 #define	DIWVSTRT_V2(x)		((x) << 16)
126 
127 #define	PVR_REG_READ(dc, reg)						\
128 	((volatile uint32_t *)(dc)->dc_regvaddr)[(reg) >> 2]
129 #define	PVR_REG_WRITE(dc, reg, val)					\
130 	((volatile uint32_t *)(dc)->dc_regvaddr)[(reg) >> 2] = (val)
131 
132 struct fb_devconfig {
133 	vaddr_t dc_vaddr;		/* framebuffer virtual address */
134 	vaddr_t dc_paddr;		/* framebuffer physical address */
135 	vaddr_t dc_regvaddr;		/* registers virtual address */
136 	vaddr_t dc_regpaddr;		/* registers physical address */
137 	int	dc_wid;			/* width of frame buffer */
138 	int	dc_ht;			/* height of frame buffer */
139 	int	dc_depth;		/* depth, bits per pixel */
140 	int	dc_rowbytes;		/* bytes in a FB scan line */
141 	vaddr_t	dc_videobase;		/* base of flat frame buffer */
142 	int	dc_blanked;		/* currently has video disabled */
143 	int	dc_dispflags;		/* display flags */
144 	int	dc_tvsystem;		/* TV broadcast system */
145 
146 	struct rasops_info dc_rinfo;
147 
148 	char dc_wsscrname[32];
149 	struct wsscreen_descr dc_wsscrdescr;
150 };
151 
152 #define	PVR_RGBMODE	0x01		/* RGB or composite */
153 #define	PVR_VGAMODE	0x02		/* VGA */
154 
155 struct pvr_softc {
156 	device_t sc_dev;
157 	struct fb_devconfig *sc_dc;	/* device configuration */
158 	int sc_nscreens;
159 	const struct wsscreen_descr *sc_scrdescs[1];
160 	struct wsscreen_list sc_scrlist;
161 };
162 
163 static int	pvr_match(device_t, cfdata_t, void *);
164 static void	pvr_attach(device_t, device_t, void *);
165 
166 CFATTACH_DECL_NEW(pvr, sizeof(struct pvr_softc),
167     pvr_match, pvr_attach, NULL, NULL);
168 
169 static void	pvr_getdevconfig(struct fb_devconfig *);
170 
171 static struct fb_devconfig pvr_console_dc;
172 
173 static int	pvrioctl(void *, void *, u_long, void *, int, struct lwp *);
174 static paddr_t	pvrmmap(void *, void *, off_t, int);
175 
176 static int	pvr_alloc_screen(void *, const struct wsscreen_descr *,
177 		    void **, int *, int *, long *);
178 static void	pvr_free_screen(void *, void *);
179 static int	pvr_show_screen(void *, void *, int,
180 		    void (*)(void *, int, int), void *);
181 
182 static const struct wsdisplay_accessops pvr_accessops = {
183 	pvrioctl,
184 	pvrmmap,
185 	pvr_alloc_screen,
186 	pvr_free_screen,
187 	pvr_show_screen,
188 	NULL, /* load_font */
189 };
190 
191 static void	pvrinit(struct fb_devconfig *);
192 
193 int	pvr_is_console;
194 
195 int
pvr_match(device_t parent,cfdata_t cf,void * aux)196 pvr_match(device_t parent, cfdata_t cf, void *aux)
197 {
198 
199 	return 1;
200 }
201 
202 void
pvr_getdevconfig(struct fb_devconfig * dc)203 pvr_getdevconfig(struct fb_devconfig *dc)
204 {
205 	int i, cookie;
206 
207 	dc->dc_paddr = PVRREG_FBSTART;
208 	dc->dc_vaddr = SH3_PHYS_TO_P2SEG(dc->dc_paddr);
209 
210 	dc->dc_regpaddr = PVRREG_REGSTART;
211 	dc->dc_regvaddr = SH3_PHYS_TO_P2SEG(dc->dc_regpaddr);
212 
213 	dc->dc_wid = 640;
214 	dc->dc_ht = 480;
215 	dc->dc_depth = 16;
216 	dc->dc_rowbytes = dc->dc_wid * (dc->dc_depth / 8);
217 	dc->dc_videobase = dc->dc_vaddr;
218 	dc->dc_blanked = 0;
219 	dc->dc_dispflags = 0;
220 
221 	/* Clear the screen. */
222 	for (i = 0; i < dc->dc_ht * dc->dc_rowbytes; i += sizeof(uint32_t))
223 		*(uint32_t *)(dc->dc_videobase + i) = 0x0;
224 
225 	/* Initialize the device. */
226 	pvrinit(dc);
227 
228 	dc->dc_rinfo.ri_flg = 0;
229 	if (dc == &pvr_console_dc)
230 		dc->dc_rinfo.ri_flg |= RI_NO_AUTO;
231 	dc->dc_rinfo.ri_depth = dc->dc_depth;
232 	dc->dc_rinfo.ri_bits = (void *) dc->dc_videobase;
233 	dc->dc_rinfo.ri_width = dc->dc_wid;
234 	dc->dc_rinfo.ri_height = dc->dc_ht;
235 	dc->dc_rinfo.ri_stride = dc->dc_rowbytes;
236 
237 	wsfont_init();
238 	/* prefer 8 pixel wide font */
239 	cookie = wsfont_find(NULL, 8, 0, 0, WSDISPLAY_FONTORDER_L2R,
240 	    WSDISPLAY_FONTORDER_L2R, WSFONT_FIND_BITMAP);
241 	if (cookie <= 0)
242 		cookie = wsfont_find(NULL, 0, 0, 0, WSDISPLAY_FONTORDER_L2R,
243 		    WSDISPLAY_FONTORDER_L2R, WSFONT_FIND_BITMAP);
244 	if (cookie <= 0) {
245 		printf("pvr: font table is empty\n");
246 		return;
247 	}
248 
249 	if (wsfont_lock(cookie, &dc->dc_rinfo.ri_font)) {
250 		printf("pvr: unable to lock font\n");
251 		return;
252 	}
253 	dc->dc_rinfo.ri_wsfcookie = cookie;
254 
255 	rasops_init(&dc->dc_rinfo, 500, 500);
256 
257 	dc->dc_wsscrdescr.name = dc->dc_wsscrname;
258 	dc->dc_wsscrdescr.ncols = dc->dc_rinfo.ri_cols;
259 	dc->dc_wsscrdescr.nrows = dc->dc_rinfo.ri_rows;
260 	dc->dc_wsscrdescr.textops = &dc->dc_rinfo.ri_ops;
261 	dc->dc_wsscrdescr.capabilities = dc->dc_rinfo.ri_caps;
262 
263 	snprintf(dc->dc_wsscrname, sizeof(dc->dc_wsscrname), "%dx%d",
264 	    dc->dc_wsscrdescr.ncols, dc->dc_wsscrdescr.nrows);
265 }
266 
267 void
pvr_attach(device_t parent,device_t self,void * aux)268 pvr_attach(device_t parent, device_t self, void *aux)
269 {
270 	struct pvr_softc *sc = device_private(self);
271 	struct wsemuldisplaydev_attach_args waa;
272 	int console;
273 	static const char *tvsystem_name[4] =
274 		{ "NTSC", "PAL", "PAL-M", "PAL-N" };
275 
276 	sc->sc_dev = self;
277 	console = pvr_is_console;
278 	if (console) {
279 		sc->sc_dc = &pvr_console_dc;
280 		sc->sc_dc->dc_rinfo.ri_flg &= ~RI_NO_AUTO;
281 		sc->sc_nscreens = 1;
282 	} else {
283 		sc->sc_dc = malloc(sizeof(struct fb_devconfig), M_DEVBUF,
284 		    M_WAITOK | M_ZERO);
285 		pvr_getdevconfig(sc->sc_dc);
286 	}
287 	printf(": %d x %d, %dbpp, %s, %s\n", sc->sc_dc->dc_wid,
288 	    sc->sc_dc->dc_ht, sc->sc_dc->dc_depth,
289 	    (sc->sc_dc->dc_dispflags & PVR_VGAMODE) ? "VGA" :
290 	       tvsystem_name[sc->sc_dc->dc_tvsystem],
291 	    (sc->sc_dc->dc_dispflags & PVR_RGBMODE) ? "RGB" : "composite");
292 
293 	/* XXX Colormap initialization? */
294 
295 	sc->sc_scrdescs[0] = &sc->sc_dc->dc_wsscrdescr;
296 	sc->sc_scrlist.nscreens = 1;
297 	sc->sc_scrlist.screens = sc->sc_scrdescs;
298 
299 	waa.console = console;
300 	waa.scrdata = &sc->sc_scrlist;
301 	waa.accessops = &pvr_accessops;
302 	waa.accesscookie = sc;
303 
304 	(void) config_found(self, &waa, wsemuldisplaydevprint, CFARGS_NONE);
305 }
306 
307 int
pvrioctl(void * v,void * vs,u_long cmd,void * data,int flag,struct lwp * l)308 pvrioctl(void *v, void *vs, u_long cmd, void *data, int flag, struct lwp *l)
309 {
310 	struct pvr_softc *sc = v;
311 	struct fb_devconfig *dc = sc->sc_dc;
312 
313 	switch (cmd) {
314 	case WSDISPLAYIO_GTYPE:
315 		*(u_int *)data = WSDISPLAY_TYPE_DCPVR;
316 		return 0;
317 
318 	case WSDISPLAYIO_GINFO:
319 #define	wsd_fbip ((struct wsdisplay_fbinfo *)data)
320 		wsd_fbip->height = sc->sc_dc->dc_ht;
321 		wsd_fbip->width = sc->sc_dc->dc_wid;
322 		wsd_fbip->depth = sc->sc_dc->dc_depth;
323 		wsd_fbip->cmsize = 0;	/* XXX Colormap */
324 #undef wsd_fbip
325 		return 0;
326 
327 	case WSDISPLAYIO_LINEBYTES:
328 		*(u_int *)data = sc->sc_dc->dc_rinfo.ri_stride;
329 		return 0;
330 
331 	case WSDISPLAYIO_GETCMAP:
332 	case WSDISPLAYIO_PUTCMAP:
333 		return EPASSTHROUGH;	/* XXX Colormap */
334 
335 	case WSDISPLAYIO_SVIDEO:
336 		switch (*(u_int *)data) {
337 		case WSDISPLAYIO_VIDEO_OFF:
338 			if (!dc->dc_blanked) {
339 				dc->dc_blanked = 1;
340 				PVR_REG_WRITE(dc, PVRREG_DIWMODE,
341 				    PVR_REG_READ(dc, PVRREG_DIWMODE) &
342 				    ~DIWMODE_DE);
343 			}
344 			break;
345 		case WSDISPLAYIO_VIDEO_ON:
346 			if (dc->dc_blanked) {
347 				dc->dc_blanked = 0;
348 				PVR_REG_WRITE(dc, PVRREG_DIWMODE,
349 				    PVR_REG_READ(dc, PVRREG_DIWMODE) |
350 				    DIWMODE_DE);
351 			}
352 			break;
353 		default:
354 			return EPASSTHROUGH;	/* XXX */
355 		}
356 		return 0;
357 
358 	case WSDISPLAYIO_GVIDEO:
359 		*(u_int *)data = dc->dc_blanked ?
360 		    WSDISPLAYIO_VIDEO_OFF : WSDISPLAYIO_VIDEO_ON;
361 		return 0;
362 
363 	case WSDISPLAYIO_GCURPOS:
364 	case WSDISPLAYIO_SCURPOS:
365 	case WSDISPLAYIO_GCURMAX:
366 	case WSDISPLAYIO_GCURSOR:
367 	case WSDISPLAYIO_SCURSOR:
368 		return EPASSTHROUGH;	/* XXX */
369 	}
370 
371 	return EPASSTHROUGH;
372 }
373 
374 paddr_t
pvrmmap(void * v,void * vs,off_t offset,int prot)375 pvrmmap(void *v, void *vs, off_t offset, int prot)
376 {
377 
378 	/*
379 	 * XXX This should be easy to support -- just need to define
380 	 * XXX offsets for the control regs, etc.
381 	 */
382 
383 	struct pvr_softc *sc = v;
384 	struct fb_devconfig *dc = sc->sc_dc;
385 	paddr_t addr;
386 
387 	if (offset >= 0 &&
388 	    offset < sh3_round_page(dc->dc_rowbytes * dc->dc_ht))
389 		addr = sh3_btop(dc->dc_paddr + offset);
390 	else
391 		addr = (-1);	/* XXX bogus */
392 
393 	return addr;
394 }
395 
396 int
pvr_alloc_screen(void * v,const struct wsscreen_descr * type,void ** cookiep,int * curxp,int * curyp,long * attrp)397 pvr_alloc_screen(void *v, const struct wsscreen_descr *type,
398     void **cookiep, int *curxp, int *curyp, long *attrp)
399 {
400 	struct pvr_softc *sc = v;
401 	long defattr;
402 
403 	if (sc->sc_nscreens > 0)
404 		return ENOMEM;
405 
406 	*cookiep = &sc->sc_dc->dc_rinfo; /* one and only for now */
407 	*curxp = 0;
408 	*curyp = 0;
409 	(*sc->sc_dc->dc_rinfo.ri_ops.allocattr)(&sc->sc_dc->dc_rinfo, 0, 0, 0,
410 	    &defattr);
411 	*attrp = defattr;
412 	sc->sc_nscreens++;
413 	return 0;
414 }
415 
416 void
pvr_free_screen(void * v,void * cookie)417 pvr_free_screen(void *v, void *cookie)
418 {
419 	struct pvr_softc *sc = v;
420 
421 	if (sc->sc_dc == &pvr_console_dc)
422 		panic("pvr_free_screen: console");
423 
424 	sc->sc_nscreens--;
425 }
426 
427 int
pvr_show_screen(void * v,void * cookie,int waitok,void (* cb)(void *,int,int),void * cbarg)428 pvr_show_screen(void *v, void *cookie, int waitok,
429     void (*cb)(void *, int, int), void *cbarg)
430 {
431 
432 	return 0;
433 }
434 
435 static void
pvr_check_cable(struct fb_devconfig * dc)436 pvr_check_cable(struct fb_devconfig *dc)
437 {
438 	volatile uint32_t *porta =
439 	    (volatile uint32_t *)0xff80002c;
440 	uint16_t v;
441 
442 	/* PORT8 and PORT9 is input */
443 	*porta = (*porta & ~0xf0000) | 0xa0000;
444 
445 	/* Read PORT8 and PORT9 */
446 	v = ((*(volatile uint16_t *)(porta + 1)) >> 8) & 3;
447 
448 	if ((v & 2) == 0)
449 		dc->dc_dispflags |= PVR_VGAMODE|PVR_RGBMODE;
450 	else if ((v & 1) == 0)
451 		dc->dc_dispflags |= PVR_RGBMODE;
452 }
453 
454 static void
pvr_check_tvsys(struct fb_devconfig * dc)455 pvr_check_tvsys(struct fb_devconfig *dc)
456 {
457 
458 	/* XXX should use flashmem device when one exists */
459 	dc->dc_tvsystem = (*(volatile uint8_t *)0xa021a004) & 3;
460 }
461 
462 void
pvrinit(struct fb_devconfig * dc)463 pvrinit(struct fb_devconfig *dc)
464 {
465 	int display_lines_per_field;
466 	int v_absolute_size;
467 	int h_absolute_size;
468 	int vborder_start, vborder_stop;
469 	int hborder_start, hborder_stop;
470 	int modulo = 1, voffset, hoffset;
471 
472 	pvr_check_cable(dc);
473 	pvr_check_tvsys(dc);
474 
475 	PVR_REG_WRITE(dc, 8, 0);		/* reset */
476 	PVR_REG_WRITE(dc, PVRREG_BRDCOLR, 0);	/* black border */
477 
478 	if (dc->dc_dispflags & PVR_VGAMODE) {
479 		v_absolute_size = 524;
480 		h_absolute_size = 857;
481 
482 		display_lines_per_field = 480;
483 		hoffset = 164;
484 		voffset = 36;
485 
486 		hborder_start = 126;
487 		hborder_stop = 837;
488 
489 		vborder_start = 40;
490 		vborder_stop = 444;		/* XXX */
491 
492 		/* 31kHz, RGB565 */
493 		PVR_REG_WRITE(dc, PVRREG_DIWMODE,
494 		    DIWMODE_C | DIWMODE_COL_RGB565);
495 
496 		/* video output */
497 		PVR_REG_WRITE(dc, PVRREG_SYNCCONF, SYNCCONF_VO);
498 	} else {
499 		if (dc->dc_tvsystem & 1) {
500 			/* 50 Hz PAL */
501 			v_absolute_size = 624;
502 			h_absolute_size = 863;
503 
504 			display_lines_per_field = 240;
505 			hoffset = 174;
506 			voffset = 18;
507 
508 			hborder_start = 116;
509 			hborder_stop = 843;
510 
511 			vborder_start = 44;
512 			vborder_stop = 536;	/* XXX */
513 		} else {
514 			/* 60 Hz NTSC */
515 			v_absolute_size = 524;
516 			h_absolute_size = 857;
517 
518 			display_lines_per_field = 240;
519 			hoffset = 170;
520 			voffset = 28;
521 
522 			hborder_start = 126;
523 			hborder_stop = 837;
524 
525 			vborder_start = 18;
526 			vborder_stop = 506;	/* XXX */
527 		}
528 
529 		modulo += 640 * 2 / 4;	/* interlace -> skip every other line */
530 
531 		/* 15kHz, RGB565 */
532 		PVR_REG_WRITE(dc, PVRREG_DIWMODE,
533 		    DIWMODE_COL_RGB565);
534 
535 		/* video output, PAL/NTSC, interlace */
536 		PVR_REG_WRITE(dc, PVRREG_SYNCCONF,
537 		    SYNCCONF_VO | SYNCCONF_I | SYNCCONF_BC(dc->dc_tvsystem));
538 	}
539 
540 	/* video base address, long field */
541 	PVR_REG_WRITE(dc, PVRREG_DIWADDRL, 0);
542 
543 	/* video base address, short field */
544 	PVR_REG_WRITE(dc, PVRREG_DIWADDRS, 640 * 2);
545 
546 	/* video size */
547 	PVR_REG_WRITE(dc, PVRREG_DIWSIZE, DIWSIZE_MODULO(modulo) |
548 	    DIWSIZE_LPF(display_lines_per_field - 1) |
549 	    DIWSIZE_DPL(640 * 2 / 4 - 1));
550 
551 	PVR_REG_WRITE(dc, PVRREG_DIWVSTRT,		/* V start */
552 	    DIWVSTRT_V1(voffset) | DIWVSTRT_V2(voffset));
553 	PVR_REG_WRITE(dc, PVRREG_BRDVERT,		/* V border */
554 	    BRDVERT_START(vborder_start) | BRDVERT_STOP(vborder_stop));
555 	PVR_REG_WRITE(dc, PVRREG_DIWHSTRT, hoffset);	/* H start */
556 	PVR_REG_WRITE(dc, PVRREG_SYNCSIZE,		/* HV counter */
557 	    SYNCSIZE_V(v_absolute_size) | SYNCSIZE_H(h_absolute_size));
558 	PVR_REG_WRITE(dc, PVRREG_BRDHORZ,		/* H border */
559 	    BRDHORZ_START(hborder_start) | BRDHORZ_STOP(hborder_stop));
560 	PVR_REG_WRITE(dc, PVRREG_DIWCONF, DIWCONF_MAGIC);
561 
562 	/* RGB / composite */
563 	*(volatile uint32_t *)
564 	    SH3_PHYS_TO_P2SEG(0x00702c00) =
565 	    ((dc->dc_dispflags & PVR_RGBMODE) ? 0 : 3) << 8;
566 
567 	/* display on */
568 	PVR_REG_WRITE(dc, PVRREG_DIWMODE,
569 	    PVR_REG_READ(dc, PVRREG_DIWMODE) | DIWMODE_DE);
570 }
571 
572 /* Console support. */
573 
574 void
pvrcninit(struct consdev * cndev)575 pvrcninit(struct consdev *cndev)
576 {
577 	struct fb_devconfig *dcp = &pvr_console_dc;
578 	long defattr;
579 
580 	pvr_getdevconfig(dcp);
581 	(*dcp->dc_rinfo.ri_ops.allocattr)(&dcp->dc_rinfo, 0, 0, 0, &defattr);
582 	wsdisplay_cnattach(&dcp->dc_wsscrdescr, &dcp->dc_rinfo, 0, 0, defattr);
583 
584 	pvr_is_console = 1;
585 
586 	cn_tab->cn_pri = CN_INTERNAL;
587 
588 #if NMKBD > 0
589 	mkbd_cnattach();	/* connect keyboard and screen together */
590 #endif
591 }
592 
593 void
pvrcnprobe(struct consdev * cndev)594 pvrcnprobe(struct consdev *cndev)
595 {
596 #if NWSDISPLAY > 0
597 	int maj, unit;
598 	extern const struct cdevsw wsdisplay_cdevsw;
599 #endif
600 	cndev->cn_dev = NODEV;
601 	cndev->cn_pri = CN_NORMAL;
602 
603 #if NWSDISPLAY > 0
604 	unit = 0;
605 	maj = cdevsw_lookup_major(&wsdisplay_cdevsw);
606 	if (maj != -1) {
607 		cndev->cn_pri = CN_INTERNAL;
608 		cndev->cn_dev = makedev(maj, unit);
609 	}
610 #endif
611 }
612