/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/RISCV/ |
H A D | RISCVExpandAtomicPseudoInsts.cpp | 439 Register ScratchReg = MI.getOperand(1).getReg(); in doAtomicBinOpExpansion() local 506 Register MaskReg, Register ScratchReg) { in insertMaskedMerge() 531 Register ScratchReg = MI.getOperand(1).getReg(); in doMaskedAtomicBinOpExpansion() local 753 Register ScratchReg = MI.getOperand(1).getReg(); in expandAtomicMinMaxOp() local 856 Register ScratchReg = MI.getOperand(1).getReg(); in expandAtomicCmpXchg() local 957 Register ScratchReg = MI.getOperand(1).getReg(); in expandAtomicCmpXchgCap() local
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/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/RISCV/ |
H A D | RISCVExpandPseudoInsts.cpp | 162 unsigned ScratchReg = MI.getOperand(1).getReg(); in doAtomicBinOpExpansion() local 199 unsigned MaskReg, unsigned ScratchReg) { in insertMaskedMerge() 224 unsigned ScratchReg = MI.getOperand(1).getReg(); in doMaskedAtomicBinOpExpansion() local 477 unsigned ScratchReg = MI.getOperand(1).getReg(); in expandAtomicCmpXchg() local
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/RISCV/ |
H A D | RISCVExpandAtomicPseudoInsts.cpp | 222 Register ScratchReg = MI.getOperand(1).getReg(); in doAtomicBinOpExpansion() local 259 Register MaskReg, Register ScratchReg) { in insertMaskedMerge() 284 Register ScratchReg = MI.getOperand(1).getReg(); in doMaskedAtomicBinOpExpansion() local 536 Register ScratchReg = MI.getOperand(1).getReg(); in expandAtomicCmpXchg() local
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/RISCV/ |
H A D | RISCVExpandAtomicPseudoInsts.cpp | 222 Register ScratchReg = MI.getOperand(1).getReg(); in doAtomicBinOpExpansion() local 259 Register MaskReg, Register ScratchReg) { in insertMaskedMerge() 284 Register ScratchReg = MI.getOperand(1).getReg(); in doMaskedAtomicBinOpExpansion() local 536 Register ScratchReg = MI.getOperand(1).getReg(); in expandAtomicCmpXchg() local
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H A D | RISCVRegisterInfo.cpp | 207 Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in eliminateFrameIndex() local 232 Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in eliminateFrameIndex() local
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/RISCV/ |
H A D | RISCVExpandAtomicPseudoInsts.cpp | 222 Register ScratchReg = MI.getOperand(1).getReg(); in doAtomicBinOpExpansion() local 259 Register MaskReg, Register ScratchReg) { in insertMaskedMerge() 284 Register ScratchReg = MI.getOperand(1).getReg(); in doMaskedAtomicBinOpExpansion() local 536 Register ScratchReg = MI.getOperand(1).getReg(); in expandAtomicCmpXchg() local
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H A D | RISCVRegisterInfo.cpp | 207 Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in eliminateFrameIndex() local 232 Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in eliminateFrameIndex() local
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/RISCV/ |
H A D | RISCVExpandAtomicPseudoInsts.cpp | 222 Register ScratchReg = MI.getOperand(1).getReg(); in doAtomicBinOpExpansion() local 259 Register MaskReg, Register ScratchReg) { in insertMaskedMerge() 284 Register ScratchReg = MI.getOperand(1).getReg(); in doMaskedAtomicBinOpExpansion() local 536 Register ScratchReg = MI.getOperand(1).getReg(); in expandAtomicCmpXchg() local
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/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/RISCV/ |
H A D | RISCVExpandAtomicPseudoInsts.cpp | 222 Register ScratchReg = MI.getOperand(1).getReg(); in doAtomicBinOpExpansion() local 259 Register MaskReg, Register ScratchReg) { in insertMaskedMerge() 284 Register ScratchReg = MI.getOperand(1).getReg(); in doMaskedAtomicBinOpExpansion() local 536 Register ScratchReg = MI.getOperand(1).getReg(); in expandAtomicCmpXchg() local
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVExpandAtomicPseudoInsts.cpp | 222 Register ScratchReg = MI.getOperand(1).getReg(); in doAtomicBinOpExpansion() local 259 Register MaskReg, Register ScratchReg) { in insertMaskedMerge() 284 Register ScratchReg = MI.getOperand(1).getReg(); in doMaskedAtomicBinOpExpansion() local 536 Register ScratchReg = MI.getOperand(1).getReg(); in expandAtomicCmpXchg() local
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H A D | RISCVRegisterInfo.cpp | 207 Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in eliminateFrameIndex() local 232 Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in eliminateFrameIndex() local
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/RISCV/ |
H A D | RISCVExpandAtomicPseudoInsts.cpp | 222 Register ScratchReg = MI.getOperand(1).getReg(); in doAtomicBinOpExpansion() local 259 Register MaskReg, Register ScratchReg) { in insertMaskedMerge() 284 Register ScratchReg = MI.getOperand(1).getReg(); in doMaskedAtomicBinOpExpansion() local 536 Register ScratchReg = MI.getOperand(1).getReg(); in expandAtomicCmpXchg() local
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H A D | RISCVRegisterInfo.cpp | 207 Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in eliminateFrameIndex() local 232 Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in eliminateFrameIndex() local
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/RISCV/ |
H A D | RISCVExpandAtomicPseudoInsts.cpp | 222 Register ScratchReg = MI.getOperand(1).getReg(); in doAtomicBinOpExpansion() local 259 Register MaskReg, Register ScratchReg) { in insertMaskedMerge() 284 Register ScratchReg = MI.getOperand(1).getReg(); in doMaskedAtomicBinOpExpansion() local 536 Register ScratchReg = MI.getOperand(1).getReg(); in expandAtomicCmpXchg() local
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H A D | RISCVRegisterInfo.cpp | 207 Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in eliminateFrameIndex() local 232 Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in eliminateFrameIndex() local
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/RISCV/ |
H A D | RISCVExpandAtomicPseudoInsts.cpp | 222 Register ScratchReg = MI.getOperand(1).getReg(); in doAtomicBinOpExpansion() local 259 Register MaskReg, Register ScratchReg) { in insertMaskedMerge() 284 Register ScratchReg = MI.getOperand(1).getReg(); in doMaskedAtomicBinOpExpansion() local 536 Register ScratchReg = MI.getOperand(1).getReg(); in expandAtomicCmpXchg() local
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/RISCV/ |
H A D | RISCVExpandAtomicPseudoInsts.cpp | 222 Register ScratchReg = MI.getOperand(1).getReg(); in doAtomicBinOpExpansion() local 259 Register MaskReg, Register ScratchReg) { in insertMaskedMerge() 284 Register ScratchReg = MI.getOperand(1).getReg(); in doMaskedAtomicBinOpExpansion() local 536 Register ScratchReg = MI.getOperand(1).getReg(); in expandAtomicCmpXchg() local
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H A D | RISCVRegisterInfo.td | 207 def F3_H : RISCVReg16<3, "f3", ["ft3"]>, DwarfRegNum<[35]>; 232 def F28_H : RISCVReg16<28,"f28", ["ft8"]>, DwarfRegNum<[60]>;
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
H A D | Thumb1FrameLowering.h | 67 /// If this would clobber a return value, then generate this sequence instead: in emitPrologueEpilogueSPUpdate()
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVExpandPseudoInsts.cpp | 239 Register ScratchReg = MI.getOperand(1).getReg(); in doAtomicBinOpExpansion() local 276 Register MaskReg, Register ScratchReg) { in insertMaskedMerge() 301 Register ScratchReg = MI.getOperand(1).getReg(); in doMaskedAtomicBinOpExpansion() local 553 Register ScratchReg = MI.getOperand(1).getReg(); in expandAtomicCmpXchg() local
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/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/RISCV/ |
H A D | RISCVExpandPseudoInsts.cpp | 239 Register ScratchReg = MI.getOperand(1).getReg(); in doAtomicBinOpExpansion() local 276 Register MaskReg, Register ScratchReg) { in insertMaskedMerge() 301 Register ScratchReg = MI.getOperand(1).getReg(); in doMaskedAtomicBinOpExpansion() local 553 Register ScratchReg = MI.getOperand(1).getReg(); in expandAtomicCmpXchg() local
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
H A D | RISCVExpandPseudoInsts.cpp | 239 Register ScratchReg = MI.getOperand(1).getReg(); in doAtomicBinOpExpansion() local 276 Register MaskReg, Register ScratchReg) { in insertMaskedMerge() 301 Register ScratchReg = MI.getOperand(1).getReg(); in doMaskedAtomicBinOpExpansion() local 553 Register ScratchReg = MI.getOperand(1).getReg(); in expandAtomicCmpXchg() local
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/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/RISCV/ |
H A D | RISCVExpandPseudoInsts.cpp | 239 unsigned ScratchReg = MI.getOperand(1).getReg(); in doAtomicBinOpExpansion() local 276 unsigned MaskReg, unsigned ScratchReg) { in insertMaskedMerge() 301 unsigned ScratchReg = MI.getOperand(1).getReg(); in doMaskedAtomicBinOpExpansion() local 553 unsigned ScratchReg = MI.getOperand(1).getReg(); in expandAtomicCmpXchg() local
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H A D | RISCVRegisterInfo.cpp | 112 unsigned ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in eliminateFrameIndex() local
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/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/RISCV/ |
H A D | RISCVRegisterInfo.cpp | 97 unsigned ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in eliminateFrameIndex() local
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