/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
H A D | LoongArchISelDAGToDAG.h | 50 bool selectShiftMaskGRLen(SDValue N, SDValue &ShAmt) { in selectShiftMaskGRLen() 53 bool selectShiftMask32(SDValue N, SDValue &ShAmt) { in selectShiftMask32()
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H A D | LoongArchISelDAGToDAG.cpp | 228 SDValue &ShAmt) { in selectShiftMask()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCasts.cpp | 502 Value *ShAmt = matchShiftAmount(ShAmt0, ShAmt1, NarrowWidth); in narrowFunnelShift() local 597 if (Constant *ShAmt = ConstantFoldIntegerCast(C, A->getType(), in narrowBinOp() local 778 Constant *ShAmt = ConstantFoldSelectInstruction(Cmp, C, MaxAmt); in visitTrunc() local 785 Constant *ShAmt = GetNewShAmt(DestWidth); in visitTrunc() local 793 Constant *ShAmt = GetNewShAmt(AWidth); in visitTrunc() local 927 uint32_t ShAmt = KnownZeroMask.logBase2(); in transformZExtICmp() local 958 Value *X, *ShAmt; in transformZExtICmp() local 1427 Value *ShAmt = ConstantInt::get(DestTy, DestBitSize-SrcBitSize); in visitSExt() local 1443 Constant *ShAmt = ConstantInt::get(DestTy, DestBitSize - SrcBitSize); in visitSExt() local
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H A D | InstCombineNegator.cpp | 259 Constant *ShAmt; in visitImpl() local
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H A D | InstCombineShifts.cpp | 628 auto NewInnerShift = [&](unsigned ShAmt) { in foldShiftedShift() 904 const unsigned ShAmt = ShAmtAPInt->getZExtValue(); in foldLShrOverflowBit() local 1580 unsigned ShAmt = ShAmtAPInt->getZExtValue(); in visitAShr() local
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H A D | InstCombineAddSub.cpp | 950 unsigned ShAmt = 0; in foldAddWithConstant() local 1380 Value *X, *Y, *ShAmt; in factorizeMathWithShlOps() local 2554 const APInt *ShAmt; in visitSub() local
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H A D | InstCombineVectorOps.cpp | 291 unsigned ShAmt = Chunk * DestWidth; in foldBitcastExtElt() local 1570 uint64_t ShAmt; in foldTruncInsEltPair() local
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H A D | InstCombineAndOrXor.cpp | 2088 Value *ShAmt; in foldBinOpOfDisplacedShifts() local 2831 Value *ShAmt = matchShiftAmount(ShAmt0, ShAmt1, Width); in matchFunnelShift() local 4188 const APInt *ShAmt; in canonicalizeAbs() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPULateCodeGenPrepare.cpp | 180 unsigned ShAmt = Adjust * 8; in visitLoadInst() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelDAGToDAG.h | 88 bool selectShiftMaskXLen(SDValue N, SDValue &ShAmt) { in selectShiftMaskXLen() 91 bool selectShiftMask32(SDValue N, SDValue &ShAmt) { in selectShiftMask32()
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H A D | RISCVISelDAGToDAG.cpp | 647 uint64_t ShAmt = ShlCst->getZExtValue(); in tryShrinkShlLogicImm() local 981 unsigned ShAmt = N1C->getZExtValue(); in Select() local 1010 unsigned ShAmt = N1C->getZExtValue(); in Select() local 1094 unsigned ShAmt = N1C->getZExtValue(); in Select() local 2546 SDValue &ShAmt) { in selectShiftMask() 2731 bool RISCVDAGToDAGISel::selectSHXADDOp(SDValue N, unsigned ShAmt, in selectSHXADDOp() 2826 bool RISCVDAGToDAGISel::selectSHXADD_UWOp(SDValue N, unsigned ShAmt, in selectSHXADD_UWOp() 3004 unsigned ShAmt = User->getConstantOperandVal(1); in hasAllNBitUsers() local
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H A D | RISCVMergeBaseOffset.cpp | 279 unsigned ShAmt; in foldShiftedOffset() local
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H A D | RISCVOptWInstrs.cpp | 197 unsigned ShAmt = UserMI->getOperand(2).getImm(); in hasAllNBitUsers() local
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H A D | RISCVTargetTransformInfo.cpp | 130 unsigned ShAmt = cast<ConstantInt>(BO->getOperand(1))->getZExtValue(); in canUseShiftPair() local
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/ |
H A D | AggressiveInstCombine.cpp | 67 Value *&ShAmt) { in foldGuardedFunnelShift() 99 Value *ShVal0, *ShVal1, *ShAmt; in foldGuardedFunnelShift() local
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/freebsd/contrib/llvm-project/clang/lib/Lex/ |
H A D | PPExpressions.cpp | 744 unsigned ShAmt = static_cast<unsigned>(RHS.Val.getLimitedValue()); in EvaluateDirectiveSubExpr() local
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 789 unsigned ShAmt = MaxSA->getZExtValue(); in SimplifyMultipleUseDemandedBits() local 1729 unsigned ShAmt = SA->getZExtValue(); in SimplifyDemandedBits() local 1888 unsigned ShAmt = MaxSA->getZExtValue(); in SimplifyDemandedBits() local 1909 unsigned ShAmt = SA->getZExtValue(); in SimplifyDemandedBits() local 2015 unsigned ShAmt = SA->getZExtValue(); in SimplifyDemandedBits() local 2866 if (unsigned ShAmt = getShiftLeftAmt(Op0)) in SimplifyDemandedBits() local 2869 if (unsigned ShAmt = getShiftLeftAmt(Op1)) in SimplifyDemandedBits() local 4355 unsigned ShAmt = ShAmtC->getZExtValue(); in foldSetCCWithFunnelShift() local 7779 SDValue ShAmt, InvShAmt; in expandVPFunnelShift() local 7882 SDValue ShAmt, InvShAmt; in expandFunnelShift() local [all …]
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H A D | LegalizeIntegerTypes.cpp | 537 SDValue ShAmt = DAG.getShiftAmountConstant(DiffBits, NVT, dl); in PromoteIntRes_BSWAP() local 565 SDValue ShAmt = DAG.getShiftAmountConstant(DiffBits, NVT, dl); in PromoteIntRes_BITREVERSE() local 2162 SDValue ShAmt = DAG.getShiftAmountConstant(Diff, VT, dl); in PromoteIntOp_VP_SIGN_EXTEND() local 4423 SDValue ShAmt = N->getOperand(1); in ExpandIntRes_ShiftThroughStack() local 4634 SDValue ShAmt = DAG.getZExtOrTrunc(N->getOperand(1), dl, ShAmtTy); in ExpandIntRes_Shift() local 5037 SDValue ShAmt = N->getOperand(2); in ExpandIntRes_FunnelShift() local
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H A D | DAGCombiner.cpp | 2685 SDValue ShAmt = ShiftOp.getOperand(1); in foldAddSubOfSignBit() local 4113 SDValue ShAmt = N1.getOperand(1); in visitSUB() local 4483 unsigned ShAmt = in visitMUL() local 6452 unsigned ShAmt) { in isLegalNarrowLdSt() 10682 unsigned ShAmt = UnknownBits.countr_zero(); in visitSRL() local 10793 unsigned ShAmt = Cst->getZExtValue(); in visitFunnelShift() local 13880 SDValue ShAmt = N0.getOperand(1); in visitZERO_EXTEND() local 14190 unsigned ShAmt = 0; in reduceLoadWidth() local 14343 auto AdjustBigEndianShift = [&](unsigned ShAmt) { in reduceLoadWidth() 19606 unsigned ShAmt = Imm.countr_zero(); in ReduceLoadOpStoreWidth() local [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Support/ |
H A D | APInt.cpp | 1994 APInt APInt::sshl_ov(const APInt &ShAmt, bool &Overflow) const { in sshl_ov() argument 1998 APInt APInt::sshl_ov(unsigned ShAmt, bool &Overflow) const { in sshl_ov() 2011 APInt APInt::ushl_ov(const APInt &ShAmt, bool &Overflow) const { in ushl_ov() argument 2015 APInt APInt::ushl_ov(unsigned ShAmt, bool &Overflow) const { in ushl_ov()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiISelLowering.cpp | 1245 SDValue ShAmt = Op.getOperand(2); in LowerSHL_PARTS() local 1293 SDValue ShAmt = Op.getOperand(2); in LowerSRL_PARTS() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86InstrInfo.cpp | 1009 inline static bool isTruncatedShiftCountForLEA(unsigned ShAmt) { in isTruncatedShiftCountForLEA() 1260 unsigned ShAmt = MI.getOperand(2).getImm(); in convertToThreeAddressWithLEA() local 1419 unsigned ShAmt = getTruncatedShiftCount(MI, 2); in convertToThreeAddress() local 1439 unsigned ShAmt = getTruncatedShiftCount(MI, 2); in convertToThreeAddress() local 1473 unsigned ShAmt = getTruncatedShiftCount(MI, 2); in convertToThreeAddress() local 4849 unsigned ShAmt = getTruncatedShiftCount(MI, 2); in isDefConvertible() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 545 unsigned ShAmt) { in isShifterOpProfitable() 737 unsigned ShAmt = Log2_32(RHSC); in SelectLdStSOReg() local 765 unsigned ShAmt = 0; in SelectLdStSOReg() local 844 unsigned ShAmt = 0; in SelectAddrMode2OffsetReg() local 1505 unsigned ShAmt = 0; in SelectT2AddrModeSoReg() local
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/freebsd/contrib/llvm-project/llvm/lib/IR/ |
H A D | ConstantFold.cpp | 162 APInt ShAmt = Amt->getValue(); in ExtractConstantBytes() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 2426 SDValue ShAmt = Op.getOperand(2); in LowerShiftRightParts() local 2487 SDValue ShAmt = Op.getOperand(2); in LowerShiftLeftParts() local
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