| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstCombineIntrinsic.cpp | 2075 Value *Shifted = IC.Builder.CreateLShr(Masked, ShiftAmt); in instCombineIntrinsic() local
2118 Value *Shifted = IC.Builder.CreateShl(Input, ShiftAmt); in instCombineIntrinsic() local
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| H A D | X86ISelLowering.cpp | 27525 SDValue Shifted = in LowerSET_ROUNDING() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 2926 unsigned Shifted = 0; in alignToARMConstant() local
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| /freebsd/contrib/llvm-project/clang/lib/Format/ |
| H A D | Format.cpp | 3551 auto Shifted = tooling::Replacement(FileName, NewOffset, 0, in fixCppIncludeInsertions() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 3666 auto Shifted = MIRBuilder.buildAShr(Ty, Res, ShiftAmt); in lower() local
7773 auto Shifted = MIRBuilder.buildInstr(ShiftOp, {WideTy}, {Mul, ShiftAmt}); in lowerSMULH_UMULH() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonVectorCombine.cpp | 1852 Value *Shifted = Op.X.Sgn == Signed || Op.Y.Sgn == Signed in processFxpMulChopped() local
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | SimplifyCFG.cpp | 6769 Value *Shifted = Builder.CreateLShr(TableMask, MaskIndex, "switch.shifted"); in SwitchToLookupTable() local
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| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | ScalarEvolution.cpp | 5932 const SCEV *Shifted = SCEVShiftRewriter::rewrite(BEValue, L, *this); in createAddRecFromPHI() local
13239 const SCEV *Shifted = SE.getAddRecExpr(Operands, getLoop(), in getNumIterationsInRange() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 11278 SDValue Shifted = DAG.getNode(ISD::SRL, DL, XLenVT, in lowerGET_ROUNDING() local
11310 SDValue Shifted = DAG.getNode(ISD::SRL, DL, XLenVT, in lowerSET_ROUNDING() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 14304 SDValue Shifted = DAG.getZExtOrTrunc(Shift.getOperand(0), in performCvtF32UByteNCombine() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 13805 auto Shifted = DAG.getNode(ISD::SRL, DL, MVT::i64, SubNode, in generateEquivalentSub() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 8299 SDValue DAGCombiner::MatchRotatePosNeg(SDValue Shifted, SDValue Pos, in MatchRotatePosNeg()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 14184 SDValue Shifted = in getVectorBitwiseReduce() local
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