1 /* This file is automatically generated. DO NOT EDIT! */ 2 /* Generated from: NetBSD: mknative-gcc,v 1.102 2019/10/16 06:57:24 mrg Exp */ 3 /* Generated from: NetBSD: mknative.common,v 1.16 2018/04/15 15:13:37 christos Exp */ 4 5 /* -*- buffer-read-only: t -*- 6 Generated automatically by parsecpu.awk from arm-cpus.in. 7 Do not edit. 8 9 Copyright (C) 2011-2018 Free Software Foundation, Inc. 10 11 This file is part of GCC. 12 13 GCC is free software; you can redistribute it and/or modify 14 it under the terms of the GNU General Public License as 15 published by the Free Software Foundation; either version 3, 16 or (at your option) any later version. 17 18 GCC is distributed in the hope that it will be useful, 19 but WITHOUT ANY WARRANTY; without even the implied warranty of 20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 GNU General Public License for more details. 22 23 You should have received a copy of the GNU General Public 24 License along with GCC; see the file COPYING3. If not see 25 <http://www.gnu.org/licenses/>. */ 26 27 enum processor_type 28 { 29 TARGET_CPU_arm2, 30 TARGET_CPU_arm250, 31 TARGET_CPU_arm3, 32 TARGET_CPU_arm6, 33 TARGET_CPU_arm60, 34 TARGET_CPU_arm600, 35 TARGET_CPU_arm610, 36 TARGET_CPU_arm620, 37 TARGET_CPU_arm7, 38 TARGET_CPU_arm7d, 39 TARGET_CPU_arm7di, 40 TARGET_CPU_arm70, 41 TARGET_CPU_arm700, 42 TARGET_CPU_arm700i, 43 TARGET_CPU_arm710, 44 TARGET_CPU_arm720, 45 TARGET_CPU_arm710c, 46 TARGET_CPU_arm7100, 47 TARGET_CPU_arm7500, 48 TARGET_CPU_arm7500fe, 49 TARGET_CPU_arm7m, 50 TARGET_CPU_arm7dm, 51 TARGET_CPU_arm7dmi, 52 TARGET_CPU_arm8, 53 TARGET_CPU_arm810, 54 TARGET_CPU_strongarm, 55 TARGET_CPU_strongarm110, 56 TARGET_CPU_strongarm1100, 57 TARGET_CPU_strongarm1110, 58 TARGET_CPU_fa526, 59 TARGET_CPU_fa626, 60 TARGET_CPU_arm7tdmi, 61 TARGET_CPU_arm7tdmis, 62 TARGET_CPU_arm710t, 63 TARGET_CPU_arm720t, 64 TARGET_CPU_arm740t, 65 TARGET_CPU_arm9, 66 TARGET_CPU_arm9tdmi, 67 TARGET_CPU_arm920, 68 TARGET_CPU_arm920t, 69 TARGET_CPU_arm922t, 70 TARGET_CPU_arm940t, 71 TARGET_CPU_ep9312, 72 TARGET_CPU_arm10tdmi, 73 TARGET_CPU_arm1020t, 74 TARGET_CPU_arm9e, 75 TARGET_CPU_arm946es, 76 TARGET_CPU_arm966es, 77 TARGET_CPU_arm968es, 78 TARGET_CPU_arm10e, 79 TARGET_CPU_arm1020e, 80 TARGET_CPU_arm1022e, 81 TARGET_CPU_xscale, 82 TARGET_CPU_iwmmxt, 83 TARGET_CPU_iwmmxt2, 84 TARGET_CPU_fa606te, 85 TARGET_CPU_fa626te, 86 TARGET_CPU_fmp626, 87 TARGET_CPU_fa726te, 88 TARGET_CPU_arm926ejs, 89 TARGET_CPU_arm1026ejs, 90 TARGET_CPU_arm1136js, 91 TARGET_CPU_arm1136jfs, 92 TARGET_CPU_arm1176jzs, 93 TARGET_CPU_arm1176jzfs, 94 TARGET_CPU_mpcorenovfp, 95 TARGET_CPU_mpcore, 96 TARGET_CPU_arm1156t2s, 97 TARGET_CPU_arm1156t2fs, 98 TARGET_CPU_cortexm1, 99 TARGET_CPU_cortexm0, 100 TARGET_CPU_cortexm0plus, 101 TARGET_CPU_cortexm1smallmultiply, 102 TARGET_CPU_cortexm0smallmultiply, 103 TARGET_CPU_cortexm0plussmallmultiply, 104 TARGET_CPU_genericv7a, 105 TARGET_CPU_cortexa5, 106 TARGET_CPU_cortexa7, 107 TARGET_CPU_cortexa8, 108 TARGET_CPU_cortexa9, 109 TARGET_CPU_cortexa12, 110 TARGET_CPU_cortexa15, 111 TARGET_CPU_cortexa17, 112 TARGET_CPU_cortexr4, 113 TARGET_CPU_cortexr4f, 114 TARGET_CPU_cortexr5, 115 TARGET_CPU_cortexr7, 116 TARGET_CPU_cortexr8, 117 TARGET_CPU_cortexm7, 118 TARGET_CPU_cortexm4, 119 TARGET_CPU_cortexm3, 120 TARGET_CPU_marvell_pj4, 121 TARGET_CPU_cortexa15cortexa7, 122 TARGET_CPU_cortexa17cortexa7, 123 TARGET_CPU_cortexa32, 124 TARGET_CPU_cortexa35, 125 TARGET_CPU_cortexa53, 126 TARGET_CPU_cortexa57, 127 TARGET_CPU_cortexa72, 128 TARGET_CPU_cortexa73, 129 TARGET_CPU_exynosm1, 130 TARGET_CPU_xgene1, 131 TARGET_CPU_cortexa57cortexa53, 132 TARGET_CPU_cortexa72cortexa53, 133 TARGET_CPU_cortexa73cortexa35, 134 TARGET_CPU_cortexa73cortexa53, 135 TARGET_CPU_cortexa55, 136 TARGET_CPU_cortexa75, 137 TARGET_CPU_cortexa75cortexa55, 138 TARGET_CPU_cortexm23, 139 TARGET_CPU_cortexm33, 140 TARGET_CPU_cortexr52, 141 TARGET_CPU_arm_none 142 }; 143 144 enum arch_type 145 { 146 TARGET_ARCH_armv2, 147 TARGET_ARCH_armv2a, 148 TARGET_ARCH_armv3, 149 TARGET_ARCH_armv3m, 150 TARGET_ARCH_armv4, 151 TARGET_ARCH_armv4t, 152 TARGET_ARCH_armv5, 153 TARGET_ARCH_armv5t, 154 TARGET_ARCH_armv5e, 155 TARGET_ARCH_armv5te, 156 TARGET_ARCH_armv5tej, 157 TARGET_ARCH_armv6, 158 TARGET_ARCH_armv6j, 159 TARGET_ARCH_armv6k, 160 TARGET_ARCH_armv6z, 161 TARGET_ARCH_armv6kz, 162 TARGET_ARCH_armv6zk, 163 TARGET_ARCH_armv6t2, 164 TARGET_ARCH_armv6_m, 165 TARGET_ARCH_armv6s_m, 166 TARGET_ARCH_armv7, 167 TARGET_ARCH_armv7_a, 168 TARGET_ARCH_armv7ve, 169 TARGET_ARCH_armv7_r, 170 TARGET_ARCH_armv7_m, 171 TARGET_ARCH_armv7e_m, 172 TARGET_ARCH_armv8_a, 173 TARGET_ARCH_armv8_1_a, 174 TARGET_ARCH_armv8_2_a, 175 TARGET_ARCH_armv8_3_a, 176 TARGET_ARCH_armv8_4_a, 177 TARGET_ARCH_armv8_m_base, 178 TARGET_ARCH_armv8_m_main, 179 TARGET_ARCH_armv8_r, 180 TARGET_ARCH_iwmmxt, 181 TARGET_ARCH_iwmmxt2, 182 TARGET_ARCH_arm_none 183 }; 184 185 enum fpu_type 186 { 187 TARGET_FPU_vfp, 188 TARGET_FPU_vfpv2, 189 TARGET_FPU_vfpv3, 190 TARGET_FPU_vfpv3_fp16, 191 TARGET_FPU_vfpv3_d16, 192 TARGET_FPU_vfpv3_d16_fp16, 193 TARGET_FPU_vfpv3xd, 194 TARGET_FPU_vfpv3xd_fp16, 195 TARGET_FPU_neon, 196 TARGET_FPU_neon_vfpv3, 197 TARGET_FPU_neon_fp16, 198 TARGET_FPU_vfpv4, 199 TARGET_FPU_neon_vfpv4, 200 TARGET_FPU_vfpv4_d16, 201 TARGET_FPU_fpv4_sp_d16, 202 TARGET_FPU_fpv5_sp_d16, 203 TARGET_FPU_fpv5_d16, 204 TARGET_FPU_fp_armv8, 205 TARGET_FPU_neon_fp_armv8, 206 TARGET_FPU_crypto_neon_fp_armv8, 207 TARGET_FPU_vfp3, 208 TARGET_FPU_auto 209 }; 210