Home
last modified time | relevance | path

Searched defs:TCC_PERFCOUNTER0_SELECT1__PERF_MODE2_MASK (Results 1 – 7 of 7) sorted by path

/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21959 #define TCC_PERFCOUNTER0_SELECT1__PERF_MODE2_MASK macro
H A Dgc_9_1_sh_mask.h23395 #define TCC_PERFCOUNTER0_SELECT1__PERF_MODE2_MASK macro
H A Dgc_9_2_1_sh_mask.h23390 #define TCC_PERFCOUNTER0_SELECT1__PERF_MODE2_MASK macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h10662 #define TCC_PERFCOUNTER0_SELECT1__PERF_MODE2_MASK 0x0f000000L macro
H A Dgfx_7_2_sh_mask.h13703 #define TCC_PERFCOUNTER0_SELECT1__PERF_MODE2_MASK 0xf000000 macro
H A Dgfx_8_0_sh_mask.h15625 #define TCC_PERFCOUNTER0_SELECT1__PERF_MODE2_MASK 0xf000000 macro
H A Dgfx_8_1_sh_mask.h16195 #define TCC_PERFCOUNTER0_SELECT1__PERF_MODE2_MASK 0xf000000 macro