1 /**
2 * @file
3 * @brief The generated interface for the register allocator.
4 * Contains register classes and types and register constraints
5 * for all nodes where constraints were given in spec.
6 * @note DO NOT EDIT THIS FILE, your changes will be lost.
7 * Edit ir/be/TEMPLATE/TEMPLATE_spec.pl instead.
8 * created by: ir/be/scripts/generate_regalloc_if.pl ir/be/TEMPLATE/TEMPLATE_spec.pl ir/be/TEMPLATE
9 * $date Mon Nov 19 18:12:23 2012
10 */
11 #include "config.h"
12
13 #include "gen_TEMPLATE_regalloc_if.h"
14 #include "bearch_TEMPLATE_t.h"
15 #include "irmode.h"
16
17 static const arch_register_req_t TEMPLATE_class_reg_req_gp = {
18 arch_register_req_type_normal,
19 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
20 NULL,
21 0,
22 0,
23 1
24 };
25 static const unsigned TEMPLATE_limited_gp_r0 [] = { (1 << REG_GP_R0) };
26 static const arch_register_req_t TEMPLATE_single_reg_req_gp_r0 = {
27 arch_register_req_type_limited,
28 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
29 TEMPLATE_limited_gp_r0,
30 0,
31 0,
32 1
33 };
34 static const unsigned TEMPLATE_limited_gp_r1 [] = { (1 << REG_GP_R1) };
35 static const arch_register_req_t TEMPLATE_single_reg_req_gp_r1 = {
36 arch_register_req_type_limited,
37 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
38 TEMPLATE_limited_gp_r1,
39 0,
40 0,
41 1
42 };
43 static const unsigned TEMPLATE_limited_gp_r2 [] = { (1 << REG_GP_R2) };
44 static const arch_register_req_t TEMPLATE_single_reg_req_gp_r2 = {
45 arch_register_req_type_limited,
46 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
47 TEMPLATE_limited_gp_r2,
48 0,
49 0,
50 1
51 };
52 static const unsigned TEMPLATE_limited_gp_r3 [] = { (1 << REG_GP_R3) };
53 static const arch_register_req_t TEMPLATE_single_reg_req_gp_r3 = {
54 arch_register_req_type_limited,
55 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
56 TEMPLATE_limited_gp_r3,
57 0,
58 0,
59 1
60 };
61 static const unsigned TEMPLATE_limited_gp_r4 [] = { (1 << REG_GP_R4) };
62 static const arch_register_req_t TEMPLATE_single_reg_req_gp_r4 = {
63 arch_register_req_type_limited,
64 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
65 TEMPLATE_limited_gp_r4,
66 0,
67 0,
68 1
69 };
70 static const unsigned TEMPLATE_limited_gp_r5 [] = { (1 << REG_GP_R5) };
71 static const arch_register_req_t TEMPLATE_single_reg_req_gp_r5 = {
72 arch_register_req_type_limited,
73 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
74 TEMPLATE_limited_gp_r5,
75 0,
76 0,
77 1
78 };
79 static const unsigned TEMPLATE_limited_gp_r6 [] = { (1 << REG_GP_R6) };
80 static const arch_register_req_t TEMPLATE_single_reg_req_gp_r6 = {
81 arch_register_req_type_limited,
82 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
83 TEMPLATE_limited_gp_r6,
84 0,
85 0,
86 1
87 };
88 static const unsigned TEMPLATE_limited_gp_r7 [] = { (1 << REG_GP_R7) };
89 static const arch_register_req_t TEMPLATE_single_reg_req_gp_r7 = {
90 arch_register_req_type_limited,
91 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
92 TEMPLATE_limited_gp_r7,
93 0,
94 0,
95 1
96 };
97 static const unsigned TEMPLATE_limited_gp_r8 [] = { (1 << REG_GP_R8) };
98 static const arch_register_req_t TEMPLATE_single_reg_req_gp_r8 = {
99 arch_register_req_type_limited,
100 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
101 TEMPLATE_limited_gp_r8,
102 0,
103 0,
104 1
105 };
106 static const unsigned TEMPLATE_limited_gp_r9 [] = { (1 << REG_GP_R9) };
107 static const arch_register_req_t TEMPLATE_single_reg_req_gp_r9 = {
108 arch_register_req_type_limited,
109 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
110 TEMPLATE_limited_gp_r9,
111 0,
112 0,
113 1
114 };
115 static const unsigned TEMPLATE_limited_gp_r10 [] = { (1 << REG_GP_R10) };
116 static const arch_register_req_t TEMPLATE_single_reg_req_gp_r10 = {
117 arch_register_req_type_limited,
118 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
119 TEMPLATE_limited_gp_r10,
120 0,
121 0,
122 1
123 };
124 static const unsigned TEMPLATE_limited_gp_r11 [] = { (1 << REG_GP_R11) };
125 static const arch_register_req_t TEMPLATE_single_reg_req_gp_r11 = {
126 arch_register_req_type_limited,
127 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
128 TEMPLATE_limited_gp_r11,
129 0,
130 0,
131 1
132 };
133 static const unsigned TEMPLATE_limited_gp_r12 [] = { (1 << REG_GP_R12) };
134 static const arch_register_req_t TEMPLATE_single_reg_req_gp_r12 = {
135 arch_register_req_type_limited,
136 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
137 TEMPLATE_limited_gp_r12,
138 0,
139 0,
140 1
141 };
142 static const unsigned TEMPLATE_limited_gp_r13 [] = { (1 << REG_GP_R13) };
143 static const arch_register_req_t TEMPLATE_single_reg_req_gp_r13 = {
144 arch_register_req_type_limited,
145 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
146 TEMPLATE_limited_gp_r13,
147 0,
148 0,
149 1
150 };
151 static const unsigned TEMPLATE_limited_gp_sp [] = { (1 << REG_GP_SP) };
152 static const arch_register_req_t TEMPLATE_single_reg_req_gp_sp = {
153 arch_register_req_type_limited,
154 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
155 TEMPLATE_limited_gp_sp,
156 0,
157 0,
158 1
159 };
160 static const unsigned TEMPLATE_limited_gp_bp [] = { (1 << REG_GP_BP) };
161 static const arch_register_req_t TEMPLATE_single_reg_req_gp_bp = {
162 arch_register_req_type_limited,
163 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
164 TEMPLATE_limited_gp_bp,
165 0,
166 0,
167 1
168 };
169 static const arch_register_req_t TEMPLATE_class_reg_req_fp = {
170 arch_register_req_type_normal,
171 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
172 NULL,
173 0,
174 0,
175 1
176 };
177 static const unsigned TEMPLATE_limited_fp_f0 [] = { (1 << REG_FP_F0) };
178 static const arch_register_req_t TEMPLATE_single_reg_req_fp_f0 = {
179 arch_register_req_type_limited,
180 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
181 TEMPLATE_limited_fp_f0,
182 0,
183 0,
184 1
185 };
186 static const unsigned TEMPLATE_limited_fp_f1 [] = { (1 << REG_FP_F1) };
187 static const arch_register_req_t TEMPLATE_single_reg_req_fp_f1 = {
188 arch_register_req_type_limited,
189 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
190 TEMPLATE_limited_fp_f1,
191 0,
192 0,
193 1
194 };
195 static const unsigned TEMPLATE_limited_fp_f2 [] = { (1 << REG_FP_F2) };
196 static const arch_register_req_t TEMPLATE_single_reg_req_fp_f2 = {
197 arch_register_req_type_limited,
198 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
199 TEMPLATE_limited_fp_f2,
200 0,
201 0,
202 1
203 };
204 static const unsigned TEMPLATE_limited_fp_f3 [] = { (1 << REG_FP_F3) };
205 static const arch_register_req_t TEMPLATE_single_reg_req_fp_f3 = {
206 arch_register_req_type_limited,
207 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
208 TEMPLATE_limited_fp_f3,
209 0,
210 0,
211 1
212 };
213 static const unsigned TEMPLATE_limited_fp_f4 [] = { (1 << REG_FP_F4) };
214 static const arch_register_req_t TEMPLATE_single_reg_req_fp_f4 = {
215 arch_register_req_type_limited,
216 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
217 TEMPLATE_limited_fp_f4,
218 0,
219 0,
220 1
221 };
222 static const unsigned TEMPLATE_limited_fp_f5 [] = { (1 << REG_FP_F5) };
223 static const arch_register_req_t TEMPLATE_single_reg_req_fp_f5 = {
224 arch_register_req_type_limited,
225 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
226 TEMPLATE_limited_fp_f5,
227 0,
228 0,
229 1
230 };
231 static const unsigned TEMPLATE_limited_fp_f6 [] = { (1 << REG_FP_F6) };
232 static const arch_register_req_t TEMPLATE_single_reg_req_fp_f6 = {
233 arch_register_req_type_limited,
234 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
235 TEMPLATE_limited_fp_f6,
236 0,
237 0,
238 1
239 };
240 static const unsigned TEMPLATE_limited_fp_f7 [] = { (1 << REG_FP_F7) };
241 static const arch_register_req_t TEMPLATE_single_reg_req_fp_f7 = {
242 arch_register_req_type_limited,
243 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
244 TEMPLATE_limited_fp_f7,
245 0,
246 0,
247 1
248 };
249 static const unsigned TEMPLATE_limited_fp_f8 [] = { (1 << REG_FP_F8) };
250 static const arch_register_req_t TEMPLATE_single_reg_req_fp_f8 = {
251 arch_register_req_type_limited,
252 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
253 TEMPLATE_limited_fp_f8,
254 0,
255 0,
256 1
257 };
258 static const unsigned TEMPLATE_limited_fp_f9 [] = { (1 << REG_FP_F9) };
259 static const arch_register_req_t TEMPLATE_single_reg_req_fp_f9 = {
260 arch_register_req_type_limited,
261 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
262 TEMPLATE_limited_fp_f9,
263 0,
264 0,
265 1
266 };
267 static const unsigned TEMPLATE_limited_fp_f10 [] = { (1 << REG_FP_F10) };
268 static const arch_register_req_t TEMPLATE_single_reg_req_fp_f10 = {
269 arch_register_req_type_limited,
270 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
271 TEMPLATE_limited_fp_f10,
272 0,
273 0,
274 1
275 };
276 static const unsigned TEMPLATE_limited_fp_f11 [] = { (1 << REG_FP_F11) };
277 static const arch_register_req_t TEMPLATE_single_reg_req_fp_f11 = {
278 arch_register_req_type_limited,
279 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
280 TEMPLATE_limited_fp_f11,
281 0,
282 0,
283 1
284 };
285 static const unsigned TEMPLATE_limited_fp_f12 [] = { (1 << REG_FP_F12) };
286 static const arch_register_req_t TEMPLATE_single_reg_req_fp_f12 = {
287 arch_register_req_type_limited,
288 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
289 TEMPLATE_limited_fp_f12,
290 0,
291 0,
292 1
293 };
294 static const unsigned TEMPLATE_limited_fp_f13 [] = { (1 << REG_FP_F13) };
295 static const arch_register_req_t TEMPLATE_single_reg_req_fp_f13 = {
296 arch_register_req_type_limited,
297 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
298 TEMPLATE_limited_fp_f13,
299 0,
300 0,
301 1
302 };
303 static const unsigned TEMPLATE_limited_fp_f14 [] = { (1 << REG_FP_F14) };
304 static const arch_register_req_t TEMPLATE_single_reg_req_fp_f14 = {
305 arch_register_req_type_limited,
306 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
307 TEMPLATE_limited_fp_f14,
308 0,
309 0,
310 1
311 };
312 static const unsigned TEMPLATE_limited_fp_f15 [] = { (1 << REG_FP_F15) };
313 static const arch_register_req_t TEMPLATE_single_reg_req_fp_f15 = {
314 arch_register_req_type_limited,
315 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
316 TEMPLATE_limited_fp_f15,
317 0,
318 0,
319 1
320 };
321
322 arch_register_class_t TEMPLATE_reg_classes[] = {
323 { 0, "TEMPLATE_gp", 16, NULL, &TEMPLATE_registers[REG_R0], arch_register_class_flag_none, &TEMPLATE_class_reg_req_gp },
324 { 1, "TEMPLATE_fp", 16, NULL, &TEMPLATE_registers[REG_F0], arch_register_class_flag_none, &TEMPLATE_class_reg_req_fp }
325 };
326
327
328 /** The array of all registers in the TEMPLATE architecture, sorted by its global index.*/
329 const arch_register_t TEMPLATE_registers[] = {
330 {
331 "r0",
332 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
333 REG_GP_R0,
334 REG_R0,
335 arch_register_type_none,
336 &TEMPLATE_single_reg_req_gp_r0,
337 0
338 },
339 {
340 "r1",
341 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
342 REG_GP_R1,
343 REG_R1,
344 arch_register_type_none,
345 &TEMPLATE_single_reg_req_gp_r1,
346 0
347 },
348 {
349 "r2",
350 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
351 REG_GP_R2,
352 REG_R2,
353 arch_register_type_none,
354 &TEMPLATE_single_reg_req_gp_r2,
355 0
356 },
357 {
358 "r3",
359 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
360 REG_GP_R3,
361 REG_R3,
362 arch_register_type_none,
363 &TEMPLATE_single_reg_req_gp_r3,
364 0
365 },
366 {
367 "r4",
368 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
369 REG_GP_R4,
370 REG_R4,
371 arch_register_type_none,
372 &TEMPLATE_single_reg_req_gp_r4,
373 0
374 },
375 {
376 "r5",
377 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
378 REG_GP_R5,
379 REG_R5,
380 arch_register_type_none,
381 &TEMPLATE_single_reg_req_gp_r5,
382 0
383 },
384 {
385 "r6",
386 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
387 REG_GP_R6,
388 REG_R6,
389 arch_register_type_none,
390 &TEMPLATE_single_reg_req_gp_r6,
391 0
392 },
393 {
394 "r7",
395 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
396 REG_GP_R7,
397 REG_R7,
398 arch_register_type_none,
399 &TEMPLATE_single_reg_req_gp_r7,
400 0
401 },
402 {
403 "r8",
404 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
405 REG_GP_R8,
406 REG_R8,
407 arch_register_type_none,
408 &TEMPLATE_single_reg_req_gp_r8,
409 0
410 },
411 {
412 "r9",
413 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
414 REG_GP_R9,
415 REG_R9,
416 arch_register_type_none,
417 &TEMPLATE_single_reg_req_gp_r9,
418 0
419 },
420 {
421 "r10",
422 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
423 REG_GP_R10,
424 REG_R10,
425 arch_register_type_none,
426 &TEMPLATE_single_reg_req_gp_r10,
427 0
428 },
429 {
430 "r11",
431 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
432 REG_GP_R11,
433 REG_R11,
434 arch_register_type_none,
435 &TEMPLATE_single_reg_req_gp_r11,
436 0
437 },
438 {
439 "r12",
440 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
441 REG_GP_R12,
442 REG_R12,
443 arch_register_type_none,
444 &TEMPLATE_single_reg_req_gp_r12,
445 0
446 },
447 {
448 "r13",
449 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
450 REG_GP_R13,
451 REG_R13,
452 arch_register_type_none,
453 &TEMPLATE_single_reg_req_gp_r13,
454 0
455 },
456 {
457 "r14",
458 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
459 REG_GP_SP,
460 REG_SP,
461 arch_register_type_ignore,
462 &TEMPLATE_single_reg_req_gp_sp,
463 0
464 },
465 {
466 "r15",
467 &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],
468 REG_GP_BP,
469 REG_BP,
470 arch_register_type_ignore,
471 &TEMPLATE_single_reg_req_gp_bp,
472 0
473 },
474 {
475 "f0",
476 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
477 REG_FP_F0,
478 REG_F0,
479 arch_register_type_none,
480 &TEMPLATE_single_reg_req_fp_f0,
481 0
482 },
483 {
484 "f1",
485 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
486 REG_FP_F1,
487 REG_F1,
488 arch_register_type_none,
489 &TEMPLATE_single_reg_req_fp_f1,
490 0
491 },
492 {
493 "f2",
494 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
495 REG_FP_F2,
496 REG_F2,
497 arch_register_type_none,
498 &TEMPLATE_single_reg_req_fp_f2,
499 0
500 },
501 {
502 "f3",
503 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
504 REG_FP_F3,
505 REG_F3,
506 arch_register_type_none,
507 &TEMPLATE_single_reg_req_fp_f3,
508 0
509 },
510 {
511 "f4",
512 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
513 REG_FP_F4,
514 REG_F4,
515 arch_register_type_none,
516 &TEMPLATE_single_reg_req_fp_f4,
517 0
518 },
519 {
520 "f5",
521 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
522 REG_FP_F5,
523 REG_F5,
524 arch_register_type_none,
525 &TEMPLATE_single_reg_req_fp_f5,
526 0
527 },
528 {
529 "f6",
530 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
531 REG_FP_F6,
532 REG_F6,
533 arch_register_type_none,
534 &TEMPLATE_single_reg_req_fp_f6,
535 0
536 },
537 {
538 "f7",
539 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
540 REG_FP_F7,
541 REG_F7,
542 arch_register_type_none,
543 &TEMPLATE_single_reg_req_fp_f7,
544 0
545 },
546 {
547 "f8",
548 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
549 REG_FP_F8,
550 REG_F8,
551 arch_register_type_none,
552 &TEMPLATE_single_reg_req_fp_f8,
553 0
554 },
555 {
556 "f9",
557 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
558 REG_FP_F9,
559 REG_F9,
560 arch_register_type_none,
561 &TEMPLATE_single_reg_req_fp_f9,
562 0
563 },
564 {
565 "f10",
566 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
567 REG_FP_F10,
568 REG_F10,
569 arch_register_type_none,
570 &TEMPLATE_single_reg_req_fp_f10,
571 0
572 },
573 {
574 "f11",
575 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
576 REG_FP_F11,
577 REG_F11,
578 arch_register_type_none,
579 &TEMPLATE_single_reg_req_fp_f11,
580 0
581 },
582 {
583 "f12",
584 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
585 REG_FP_F12,
586 REG_F12,
587 arch_register_type_none,
588 &TEMPLATE_single_reg_req_fp_f12,
589 0
590 },
591 {
592 "f13",
593 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
594 REG_FP_F13,
595 REG_F13,
596 arch_register_type_none,
597 &TEMPLATE_single_reg_req_fp_f13,
598 0
599 },
600 {
601 "f14",
602 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
603 REG_FP_F14,
604 REG_F14,
605 arch_register_type_none,
606 &TEMPLATE_single_reg_req_fp_f14,
607 0
608 },
609 {
610 "f15",
611 &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp],
612 REG_FP_F15,
613 REG_F15,
614 arch_register_type_none,
615 &TEMPLATE_single_reg_req_fp_f15,
616 0
617 },
618
619 };
620
621 /**
622 * Initializes TEMPLATE register classes.
623 */
TEMPLATE_register_init(void)624 void TEMPLATE_register_init(void)
625 {
626 TEMPLATE_reg_classes[CLASS_TEMPLATE_gp].mode = mode_Iu;
627 TEMPLATE_reg_classes[CLASS_TEMPLATE_fp].mode = mode_F;
628
629 }
630