1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /*
3  * Copyright (C) 2005-2014, 2018-2020 Intel Corporation
4  * Copyright (C) 2015 Intel Mobile Communications GmbH
5  */
6 #include <linux/types.h>
7 #include <linux/slab.h>
8 #include <linux/export.h>
9 #include "iwl-drv.h"
10 #include "iwl-modparams.h"
11 #include "iwl-eeprom-parse.h"
12 
13 #if IS_ENABLED(CONFIG_IWLDVM)
14 /* EEPROM offset definitions */
15 
16 /* indirect access definitions */
17 #define ADDRESS_MSK                 0x0000FFFF
18 #define INDIRECT_TYPE_MSK           0x000F0000
19 #define INDIRECT_HOST               0x00010000
20 #define INDIRECT_GENERAL            0x00020000
21 #define INDIRECT_REGULATORY         0x00030000
22 #define INDIRECT_CALIBRATION        0x00040000
23 #define INDIRECT_PROCESS_ADJST      0x00050000
24 #define INDIRECT_OTHERS             0x00060000
25 #define INDIRECT_TXP_LIMIT          0x00070000
26 #define INDIRECT_TXP_LIMIT_SIZE     0x00080000
27 #define INDIRECT_ADDRESS            0x00100000
28 
29 /* corresponding link offsets in EEPROM */
30 #define EEPROM_LINK_HOST             (2*0x64)
31 #define EEPROM_LINK_GENERAL          (2*0x65)
32 #define EEPROM_LINK_REGULATORY       (2*0x66)
33 #define EEPROM_LINK_CALIBRATION      (2*0x67)
34 #define EEPROM_LINK_PROCESS_ADJST    (2*0x68)
35 #define EEPROM_LINK_OTHERS           (2*0x69)
36 #define EEPROM_LINK_TXP_LIMIT        (2*0x6a)
37 #define EEPROM_LINK_TXP_LIMIT_SIZE   (2*0x6b)
38 
39 /* General */
40 #define EEPROM_DEVICE_ID                    (2*0x08)	/* 2 bytes */
41 #define EEPROM_SUBSYSTEM_ID		    (2*0x0A)	/* 2 bytes */
42 #define EEPROM_MAC_ADDRESS                  (2*0x15)	/* 6  bytes */
43 #define EEPROM_BOARD_REVISION               (2*0x35)	/* 2  bytes */
44 #define EEPROM_BOARD_PBA_NUMBER             (2*0x3B+1)	/* 9  bytes */
45 #define EEPROM_VERSION                      (2*0x44)	/* 2  bytes */
46 #define EEPROM_SKU_CAP                      (2*0x45)	/* 2  bytes */
47 #define EEPROM_OEM_MODE                     (2*0x46)	/* 2  bytes */
48 #define EEPROM_RADIO_CONFIG                 (2*0x48)	/* 2  bytes */
49 #define EEPROM_NUM_MAC_ADDRESS              (2*0x4C)	/* 2  bytes */
50 
51 /* calibration */
52 struct iwl_eeprom_calib_hdr {
53 	u8 version;
54 	u8 pa_type;
55 	__le16 voltage;
56 } __packed;
57 
58 #define EEPROM_CALIB_ALL	(INDIRECT_ADDRESS | INDIRECT_CALIBRATION)
59 #define EEPROM_XTAL		((2*0x128) | EEPROM_CALIB_ALL)
60 
61 /* temperature */
62 #define EEPROM_KELVIN_TEMPERATURE	((2*0x12A) | EEPROM_CALIB_ALL)
63 #define EEPROM_RAW_TEMPERATURE		((2*0x12B) | EEPROM_CALIB_ALL)
64 
65 /* SKU Capabilities (actual values from EEPROM definition) */
66 enum eeprom_sku_bits {
67 	EEPROM_SKU_CAP_BAND_24GHZ	= BIT(4),
68 	EEPROM_SKU_CAP_BAND_52GHZ	= BIT(5),
69 	EEPROM_SKU_CAP_11N_ENABLE	= BIT(6),
70 	EEPROM_SKU_CAP_AMT_ENABLE	= BIT(7),
71 	EEPROM_SKU_CAP_IPAN_ENABLE	= BIT(8)
72 };
73 
74 /* radio config bits (actual values from EEPROM definition) */
75 #define EEPROM_RF_CFG_TYPE_MSK(x)   (x & 0x3)         /* bits 0-1   */
76 #define EEPROM_RF_CFG_STEP_MSK(x)   ((x >> 2)  & 0x3) /* bits 2-3   */
77 #define EEPROM_RF_CFG_DASH_MSK(x)   ((x >> 4)  & 0x3) /* bits 4-5   */
78 #define EEPROM_RF_CFG_PNUM_MSK(x)   ((x >> 6)  & 0x3) /* bits 6-7   */
79 #define EEPROM_RF_CFG_TX_ANT_MSK(x) ((x >> 8)  & 0xF) /* bits 8-11  */
80 #define EEPROM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */
81 
82 
83 /*
84  * EEPROM bands
85  * These are the channel numbers from each band in the order
86  * that they are stored in the EEPROM band information. Note
87  * that EEPROM bands aren't the same as mac80211 bands, and
88  * there are even special "ht40 bands" in the EEPROM.
89  */
90 static const u8 iwl_eeprom_band_1[14] = { /* 2.4 GHz */
91 	1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
92 };
93 
94 static const u8 iwl_eeprom_band_2[] = {	/* 4915-5080MHz */
95 	183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
96 };
97 
98 static const u8 iwl_eeprom_band_3[] = {	/* 5170-5320MHz */
99 	34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
100 };
101 
102 static const u8 iwl_eeprom_band_4[] = {	/* 5500-5700MHz */
103 	100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
104 };
105 
106 static const u8 iwl_eeprom_band_5[] = {	/* 5725-5825MHz */
107 	145, 149, 153, 157, 161, 165
108 };
109 
110 static const u8 iwl_eeprom_band_6[] = {	/* 2.4 ht40 channel */
111 	1, 2, 3, 4, 5, 6, 7
112 };
113 
114 static const u8 iwl_eeprom_band_7[] = {	/* 5.2 ht40 channel */
115 	36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
116 };
117 
118 #define IWL_NUM_CHANNELS	(ARRAY_SIZE(iwl_eeprom_band_1) + \
119 				 ARRAY_SIZE(iwl_eeprom_band_2) + \
120 				 ARRAY_SIZE(iwl_eeprom_band_3) + \
121 				 ARRAY_SIZE(iwl_eeprom_band_4) + \
122 				 ARRAY_SIZE(iwl_eeprom_band_5))
123 
124 /* rate data (static) */
125 static struct ieee80211_rate iwl_cfg80211_rates[] = {
126 	{ .bitrate = 1 * 10, .hw_value = 0, .hw_value_short = 0, },
127 	{ .bitrate = 2 * 10, .hw_value = 1, .hw_value_short = 1,
128 	  .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
129 	{ .bitrate = 5.5 * 10, .hw_value = 2, .hw_value_short = 2,
130 	  .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
131 	{ .bitrate = 11 * 10, .hw_value = 3, .hw_value_short = 3,
132 	  .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
133 	{ .bitrate = 6 * 10, .hw_value = 4, .hw_value_short = 4, },
134 	{ .bitrate = 9 * 10, .hw_value = 5, .hw_value_short = 5, },
135 	{ .bitrate = 12 * 10, .hw_value = 6, .hw_value_short = 6, },
136 	{ .bitrate = 18 * 10, .hw_value = 7, .hw_value_short = 7, },
137 	{ .bitrate = 24 * 10, .hw_value = 8, .hw_value_short = 8, },
138 	{ .bitrate = 36 * 10, .hw_value = 9, .hw_value_short = 9, },
139 	{ .bitrate = 48 * 10, .hw_value = 10, .hw_value_short = 10, },
140 	{ .bitrate = 54 * 10, .hw_value = 11, .hw_value_short = 11, },
141 };
142 #define RATES_24_OFFS	0
143 #define N_RATES_24	ARRAY_SIZE(iwl_cfg80211_rates)
144 #define RATES_52_OFFS	4
145 #define N_RATES_52	(N_RATES_24 - RATES_52_OFFS)
146 
147 /* EEPROM reading functions */
148 
iwl_eeprom_query16(const u8 * eeprom,size_t eeprom_size,int offset)149 static u16 iwl_eeprom_query16(const u8 *eeprom, size_t eeprom_size, int offset)
150 {
151 	if (WARN_ON(offset + sizeof(u16) > eeprom_size))
152 		return 0;
153 	return le16_to_cpup((__le16 *)(eeprom + offset));
154 }
155 
eeprom_indirect_address(const u8 * eeprom,size_t eeprom_size,u32 address)156 static u32 eeprom_indirect_address(const u8 *eeprom, size_t eeprom_size,
157 				   u32 address)
158 {
159 	u16 offset = 0;
160 
161 	if ((address & INDIRECT_ADDRESS) == 0)
162 		return address;
163 
164 	switch (address & INDIRECT_TYPE_MSK) {
165 	case INDIRECT_HOST:
166 		offset = iwl_eeprom_query16(eeprom, eeprom_size,
167 					    EEPROM_LINK_HOST);
168 		break;
169 	case INDIRECT_GENERAL:
170 		offset = iwl_eeprom_query16(eeprom, eeprom_size,
171 					    EEPROM_LINK_GENERAL);
172 		break;
173 	case INDIRECT_REGULATORY:
174 		offset = iwl_eeprom_query16(eeprom, eeprom_size,
175 					    EEPROM_LINK_REGULATORY);
176 		break;
177 	case INDIRECT_TXP_LIMIT:
178 		offset = iwl_eeprom_query16(eeprom, eeprom_size,
179 					    EEPROM_LINK_TXP_LIMIT);
180 		break;
181 	case INDIRECT_TXP_LIMIT_SIZE:
182 		offset = iwl_eeprom_query16(eeprom, eeprom_size,
183 					    EEPROM_LINK_TXP_LIMIT_SIZE);
184 		break;
185 	case INDIRECT_CALIBRATION:
186 		offset = iwl_eeprom_query16(eeprom, eeprom_size,
187 					    EEPROM_LINK_CALIBRATION);
188 		break;
189 	case INDIRECT_PROCESS_ADJST:
190 		offset = iwl_eeprom_query16(eeprom, eeprom_size,
191 					    EEPROM_LINK_PROCESS_ADJST);
192 		break;
193 	case INDIRECT_OTHERS:
194 		offset = iwl_eeprom_query16(eeprom, eeprom_size,
195 					    EEPROM_LINK_OTHERS);
196 		break;
197 	default:
198 		WARN_ON(1);
199 		break;
200 	}
201 
202 	/* translate the offset from words to byte */
203 	return (address & ADDRESS_MSK) + (offset << 1);
204 }
205 
iwl_eeprom_query_addr(const u8 * eeprom,size_t eeprom_size,u32 offset)206 static const u8 *iwl_eeprom_query_addr(const u8 *eeprom, size_t eeprom_size,
207 				       u32 offset)
208 {
209 	u32 address = eeprom_indirect_address(eeprom, eeprom_size, offset);
210 
211 	if (WARN_ON(address >= eeprom_size))
212 		return NULL;
213 
214 	return &eeprom[address];
215 }
216 
iwl_eeprom_read_calib(const u8 * eeprom,size_t eeprom_size,struct iwl_nvm_data * data)217 static int iwl_eeprom_read_calib(const u8 *eeprom, size_t eeprom_size,
218 				 struct iwl_nvm_data *data)
219 {
220 	struct iwl_eeprom_calib_hdr *hdr;
221 
222 	hdr = (void *)iwl_eeprom_query_addr(eeprom, eeprom_size,
223 					    EEPROM_CALIB_ALL);
224 	if (!hdr)
225 		return -ENODATA;
226 	data->calib_version = hdr->version;
227 	data->calib_voltage = hdr->voltage;
228 
229 	return 0;
230 }
231 
232 /**
233  * enum iwl_eeprom_channel_flags - channel flags in EEPROM
234  * @EEPROM_CHANNEL_VALID: channel is usable for this SKU/geo
235  * @EEPROM_CHANNEL_IBSS: usable as an IBSS channel
236  * @EEPROM_CHANNEL_ACTIVE: active scanning allowed
237  * @EEPROM_CHANNEL_RADAR: radar detection required
238  * @EEPROM_CHANNEL_WIDE: 20 MHz channel okay (?)
239  * @EEPROM_CHANNEL_DFS: dynamic freq selection candidate
240  */
241 enum iwl_eeprom_channel_flags {
242 	EEPROM_CHANNEL_VALID = BIT(0),
243 	EEPROM_CHANNEL_IBSS = BIT(1),
244 	EEPROM_CHANNEL_ACTIVE = BIT(3),
245 	EEPROM_CHANNEL_RADAR = BIT(4),
246 	EEPROM_CHANNEL_WIDE = BIT(5),
247 	EEPROM_CHANNEL_DFS = BIT(7),
248 };
249 
250 /**
251  * struct iwl_eeprom_channel - EEPROM channel data
252  * @flags: %EEPROM_CHANNEL_* flags
253  * @max_power_avg: max power (in dBm) on this channel, at most 31 dBm
254  */
255 struct iwl_eeprom_channel {
256 	u8 flags;
257 	s8 max_power_avg;
258 } __packed;
259 
260 
261 enum iwl_eeprom_enhanced_txpwr_flags {
262 	IWL_EEPROM_ENH_TXP_FL_VALID = BIT(0),
263 	IWL_EEPROM_ENH_TXP_FL_BAND_52G = BIT(1),
264 	IWL_EEPROM_ENH_TXP_FL_OFDM = BIT(2),
265 	IWL_EEPROM_ENH_TXP_FL_40MHZ = BIT(3),
266 	IWL_EEPROM_ENH_TXP_FL_HT_AP = BIT(4),
267 	IWL_EEPROM_ENH_TXP_FL_RES1 = BIT(5),
268 	IWL_EEPROM_ENH_TXP_FL_RES2 = BIT(6),
269 	IWL_EEPROM_ENH_TXP_FL_COMMON_TYPE = BIT(7),
270 };
271 
272 /**
273  * struct iwl_eeprom_enhanced_txpwr
274  * @flags: entry flags
275  * @channel: channel number
276  * @chain_a_max: chain a max power in 1/2 dBm
277  * @chain_b_max: chain b max power in 1/2 dBm
278  * @chain_c_max: chain c max power in 1/2 dBm
279  * @delta_20_in_40: 20-in-40 deltas (hi/lo)
280  * @mimo2_max: mimo2 max power in 1/2 dBm
281  * @mimo3_max: mimo3 max power in 1/2 dBm
282  *
283  * This structure presents the enhanced regulatory tx power limit layout
284  * in an EEPROM image.
285  */
286 struct iwl_eeprom_enhanced_txpwr {
287 	u8 flags;
288 	u8 channel;
289 	s8 chain_a_max;
290 	s8 chain_b_max;
291 	s8 chain_c_max;
292 	u8 delta_20_in_40;
293 	s8 mimo2_max;
294 	s8 mimo3_max;
295 } __packed;
296 
iwl_get_max_txpwr_half_dbm(const struct iwl_nvm_data * data,struct iwl_eeprom_enhanced_txpwr * txp)297 static s8 iwl_get_max_txpwr_half_dbm(const struct iwl_nvm_data *data,
298 				     struct iwl_eeprom_enhanced_txpwr *txp)
299 {
300 	s8 result = 0; /* (.5 dBm) */
301 
302 	/* Take the highest tx power from any valid chains */
303 	if (data->valid_tx_ant & ANT_A && txp->chain_a_max > result)
304 		result = txp->chain_a_max;
305 
306 	if (data->valid_tx_ant & ANT_B && txp->chain_b_max > result)
307 		result = txp->chain_b_max;
308 
309 	if (data->valid_tx_ant & ANT_C && txp->chain_c_max > result)
310 		result = txp->chain_c_max;
311 
312 	if ((data->valid_tx_ant == ANT_AB ||
313 	     data->valid_tx_ant == ANT_BC ||
314 	     data->valid_tx_ant == ANT_AC) && txp->mimo2_max > result)
315 		result = txp->mimo2_max;
316 
317 	if (data->valid_tx_ant == ANT_ABC && txp->mimo3_max > result)
318 		result = txp->mimo3_max;
319 
320 	return result;
321 }
322 
323 #define EEPROM_TXP_OFFS	(0x00 | INDIRECT_ADDRESS | INDIRECT_TXP_LIMIT)
324 #define EEPROM_TXP_ENTRY_LEN sizeof(struct iwl_eeprom_enhanced_txpwr)
325 #define EEPROM_TXP_SZ_OFFS (0x00 | INDIRECT_ADDRESS | INDIRECT_TXP_LIMIT_SIZE)
326 
327 #define TXP_CHECK_AND_PRINT(x) \
328 	((txp->flags & IWL_EEPROM_ENH_TXP_FL_##x) ? # x " " : "")
329 
330 static void
iwl_eeprom_enh_txp_read_element(struct iwl_nvm_data * data,struct iwl_eeprom_enhanced_txpwr * txp,int n_channels,s8 max_txpower_avg)331 iwl_eeprom_enh_txp_read_element(struct iwl_nvm_data *data,
332 				struct iwl_eeprom_enhanced_txpwr *txp,
333 				int n_channels, s8 max_txpower_avg)
334 {
335 	int ch_idx;
336 	enum nl80211_band band;
337 
338 	band = txp->flags & IWL_EEPROM_ENH_TXP_FL_BAND_52G ?
339 		NL80211_BAND_5GHZ : NL80211_BAND_2GHZ;
340 
341 	for (ch_idx = 0; ch_idx < n_channels; ch_idx++) {
342 		struct ieee80211_channel *chan = &data->channels[ch_idx];
343 
344 		/* update matching channel or from common data only */
345 		if (txp->channel != 0 && chan->hw_value != txp->channel)
346 			continue;
347 
348 		/* update matching band only */
349 		if (band != chan->band)
350 			continue;
351 
352 		if (chan->max_power < max_txpower_avg &&
353 		    !(txp->flags & IWL_EEPROM_ENH_TXP_FL_40MHZ))
354 			chan->max_power = max_txpower_avg;
355 	}
356 }
357 
iwl_eeprom_enhanced_txpower(struct device * dev,struct iwl_nvm_data * data,const u8 * eeprom,size_t eeprom_size,int n_channels)358 static void iwl_eeprom_enhanced_txpower(struct device *dev,
359 					struct iwl_nvm_data *data,
360 					const u8 *eeprom, size_t eeprom_size,
361 					int n_channels)
362 {
363 	struct iwl_eeprom_enhanced_txpwr *txp_array, *txp;
364 	int idx, entries;
365 	__le16 *txp_len;
366 	s8 max_txp_avg_halfdbm;
367 
368 	BUILD_BUG_ON(sizeof(struct iwl_eeprom_enhanced_txpwr) != 8);
369 
370 	/* the length is in 16-bit words, but we want entries */
371 	txp_len = (__le16 *)iwl_eeprom_query_addr(eeprom, eeprom_size,
372 						  EEPROM_TXP_SZ_OFFS);
373 	entries = le16_to_cpup(txp_len) * 2 / EEPROM_TXP_ENTRY_LEN;
374 
375 	txp_array = (void *)iwl_eeprom_query_addr(eeprom, eeprom_size,
376 						  EEPROM_TXP_OFFS);
377 
378 	for (idx = 0; idx < entries; idx++) {
379 		txp = &txp_array[idx];
380 		/* skip invalid entries */
381 		if (!(txp->flags & IWL_EEPROM_ENH_TXP_FL_VALID))
382 			continue;
383 
384 		IWL_DEBUG_EEPROM(dev, "%s %d:\t %s%s%s%s%s%s%s%s (0x%02x)\n",
385 				 (txp->channel && (txp->flags &
386 					IWL_EEPROM_ENH_TXP_FL_COMMON_TYPE)) ?
387 					"Common " : (txp->channel) ?
388 					"Channel" : "Common",
389 				 (txp->channel),
390 				 TXP_CHECK_AND_PRINT(VALID),
391 				 TXP_CHECK_AND_PRINT(BAND_52G),
392 				 TXP_CHECK_AND_PRINT(OFDM),
393 				 TXP_CHECK_AND_PRINT(40MHZ),
394 				 TXP_CHECK_AND_PRINT(HT_AP),
395 				 TXP_CHECK_AND_PRINT(RES1),
396 				 TXP_CHECK_AND_PRINT(RES2),
397 				 TXP_CHECK_AND_PRINT(COMMON_TYPE),
398 				 txp->flags);
399 		IWL_DEBUG_EEPROM(dev,
400 				 "\t\t chain_A: %d chain_B: %d chain_C: %d\n",
401 				 txp->chain_a_max, txp->chain_b_max,
402 				 txp->chain_c_max);
403 		IWL_DEBUG_EEPROM(dev,
404 				 "\t\t MIMO2: %d MIMO3: %d High 20_on_40: 0x%02x Low 20_on_40: 0x%02x\n",
405 				 txp->mimo2_max, txp->mimo3_max,
406 				 ((txp->delta_20_in_40 & 0xf0) >> 4),
407 				 (txp->delta_20_in_40 & 0x0f));
408 
409 		max_txp_avg_halfdbm = iwl_get_max_txpwr_half_dbm(data, txp);
410 
411 		iwl_eeprom_enh_txp_read_element(data, txp, n_channels,
412 				DIV_ROUND_UP(max_txp_avg_halfdbm, 2));
413 
414 		if (max_txp_avg_halfdbm > data->max_tx_pwr_half_dbm)
415 			data->max_tx_pwr_half_dbm = max_txp_avg_halfdbm;
416 	}
417 }
418 
iwl_init_band_reference(const struct iwl_cfg * cfg,const u8 * eeprom,size_t eeprom_size,int eeprom_band,int * eeprom_ch_count,const struct iwl_eeprom_channel ** ch_info,const u8 ** eeprom_ch_array)419 static void iwl_init_band_reference(const struct iwl_cfg *cfg,
420 				    const u8 *eeprom, size_t eeprom_size,
421 				    int eeprom_band, int *eeprom_ch_count,
422 				    const struct iwl_eeprom_channel **ch_info,
423 				    const u8 **eeprom_ch_array)
424 {
425 	u32 offset = cfg->eeprom_params->regulatory_bands[eeprom_band - 1];
426 
427 	offset |= INDIRECT_ADDRESS | INDIRECT_REGULATORY;
428 
429 	*ch_info = (void *)iwl_eeprom_query_addr(eeprom, eeprom_size, offset);
430 
431 	switch (eeprom_band) {
432 	case 1:		/* 2.4GHz band */
433 		*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
434 		*eeprom_ch_array = iwl_eeprom_band_1;
435 		break;
436 	case 2:		/* 4.9GHz band */
437 		*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
438 		*eeprom_ch_array = iwl_eeprom_band_2;
439 		break;
440 	case 3:		/* 5.2GHz band */
441 		*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
442 		*eeprom_ch_array = iwl_eeprom_band_3;
443 		break;
444 	case 4:		/* 5.5GHz band */
445 		*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
446 		*eeprom_ch_array = iwl_eeprom_band_4;
447 		break;
448 	case 5:		/* 5.7GHz band */
449 		*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
450 		*eeprom_ch_array = iwl_eeprom_band_5;
451 		break;
452 	case 6:		/* 2.4GHz ht40 channels */
453 		*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6);
454 		*eeprom_ch_array = iwl_eeprom_band_6;
455 		break;
456 	case 7:		/* 5 GHz ht40 channels */
457 		*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7);
458 		*eeprom_ch_array = iwl_eeprom_band_7;
459 		break;
460 	default:
461 		*eeprom_ch_count = 0;
462 		*eeprom_ch_array = NULL;
463 		WARN_ON(1);
464 	}
465 }
466 
467 #define CHECK_AND_PRINT(x) \
468 	((eeprom_ch->flags & EEPROM_CHANNEL_##x) ? # x " " : "")
469 
iwl_mod_ht40_chan_info(struct device * dev,struct iwl_nvm_data * data,int n_channels,enum nl80211_band band,u16 channel,const struct iwl_eeprom_channel * eeprom_ch,u8 clear_ht40_extension_channel)470 static void iwl_mod_ht40_chan_info(struct device *dev,
471 				   struct iwl_nvm_data *data, int n_channels,
472 				   enum nl80211_band band, u16 channel,
473 				   const struct iwl_eeprom_channel *eeprom_ch,
474 				   u8 clear_ht40_extension_channel)
475 {
476 	struct ieee80211_channel *chan = NULL;
477 	int i;
478 
479 	for (i = 0; i < n_channels; i++) {
480 		if (data->channels[i].band != band)
481 			continue;
482 		if (data->channels[i].hw_value != channel)
483 			continue;
484 		chan = &data->channels[i];
485 		break;
486 	}
487 
488 	if (!chan)
489 		return;
490 
491 	IWL_DEBUG_EEPROM(dev,
492 			 "HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm): Ad-Hoc %ssupported\n",
493 			 channel,
494 			 band == NL80211_BAND_5GHZ ? "5.2" : "2.4",
495 			 CHECK_AND_PRINT(IBSS),
496 			 CHECK_AND_PRINT(ACTIVE),
497 			 CHECK_AND_PRINT(RADAR),
498 			 CHECK_AND_PRINT(WIDE),
499 			 CHECK_AND_PRINT(DFS),
500 			 eeprom_ch->flags,
501 			 eeprom_ch->max_power_avg,
502 			 ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS) &&
503 			  !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ? ""
504 								      : "not ");
505 
506 	if (eeprom_ch->flags & EEPROM_CHANNEL_VALID)
507 		chan->flags &= ~clear_ht40_extension_channel;
508 }
509 
510 #define CHECK_AND_PRINT_I(x)	\
511 	((eeprom_ch_info[ch_idx].flags & EEPROM_CHANNEL_##x) ? # x " " : "")
512 
iwl_init_channel_map(struct device * dev,const struct iwl_cfg * cfg,struct iwl_nvm_data * data,const u8 * eeprom,size_t eeprom_size)513 static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
514 				struct iwl_nvm_data *data,
515 				const u8 *eeprom, size_t eeprom_size)
516 {
517 	int band, ch_idx;
518 	const struct iwl_eeprom_channel *eeprom_ch_info;
519 	const u8 *eeprom_ch_array;
520 	int eeprom_ch_count;
521 	int n_channels = 0;
522 
523 	/*
524 	 * Loop through the 5 EEPROM bands and add them to the parse list
525 	 */
526 	for (band = 1; band <= 5; band++) {
527 		struct ieee80211_channel *channel;
528 
529 		iwl_init_band_reference(cfg, eeprom, eeprom_size, band,
530 					&eeprom_ch_count, &eeprom_ch_info,
531 					&eeprom_ch_array);
532 
533 		/* Loop through each band adding each of the channels */
534 		for (ch_idx = 0; ch_idx < eeprom_ch_count; ch_idx++) {
535 			const struct iwl_eeprom_channel *eeprom_ch;
536 
537 			eeprom_ch = &eeprom_ch_info[ch_idx];
538 
539 			if (!(eeprom_ch->flags & EEPROM_CHANNEL_VALID)) {
540 				IWL_DEBUG_EEPROM(dev,
541 						 "Ch. %d Flags %x [%sGHz] - No traffic\n",
542 						 eeprom_ch_array[ch_idx],
543 						 eeprom_ch_info[ch_idx].flags,
544 						 (band != 1) ? "5.2" : "2.4");
545 				continue;
546 			}
547 
548 			channel = &data->channels[n_channels];
549 			n_channels++;
550 
551 			channel->hw_value = eeprom_ch_array[ch_idx];
552 			channel->band = (band == 1) ? NL80211_BAND_2GHZ
553 						    : NL80211_BAND_5GHZ;
554 			channel->center_freq =
555 				ieee80211_channel_to_frequency(
556 					channel->hw_value, channel->band);
557 
558 			/* set no-HT40, will enable as appropriate later */
559 			channel->flags = IEEE80211_CHAN_NO_HT40;
560 
561 			if (!(eeprom_ch->flags & EEPROM_CHANNEL_IBSS))
562 				channel->flags |= IEEE80211_CHAN_NO_IR;
563 
564 			if (!(eeprom_ch->flags & EEPROM_CHANNEL_ACTIVE))
565 				channel->flags |= IEEE80211_CHAN_NO_IR;
566 
567 			if (eeprom_ch->flags & EEPROM_CHANNEL_RADAR)
568 				channel->flags |= IEEE80211_CHAN_RADAR;
569 
570 			/* Initialize regulatory-based run-time data */
571 			channel->max_power =
572 				eeprom_ch_info[ch_idx].max_power_avg;
573 			IWL_DEBUG_EEPROM(dev,
574 					 "Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x %ddBm): Ad-Hoc %ssupported\n",
575 					 channel->hw_value,
576 					 (band != 1) ? "5.2" : "2.4",
577 					 CHECK_AND_PRINT_I(VALID),
578 					 CHECK_AND_PRINT_I(IBSS),
579 					 CHECK_AND_PRINT_I(ACTIVE),
580 					 CHECK_AND_PRINT_I(RADAR),
581 					 CHECK_AND_PRINT_I(WIDE),
582 					 CHECK_AND_PRINT_I(DFS),
583 					 eeprom_ch_info[ch_idx].flags,
584 					 eeprom_ch_info[ch_idx].max_power_avg,
585 					 ((eeprom_ch_info[ch_idx].flags &
586 							EEPROM_CHANNEL_IBSS) &&
587 					  !(eeprom_ch_info[ch_idx].flags &
588 							EEPROM_CHANNEL_RADAR))
589 						? "" : "not ");
590 		}
591 	}
592 
593 	if (cfg->eeprom_params->enhanced_txpower) {
594 		/*
595 		 * for newer device (6000 series and up)
596 		 * EEPROM contain enhanced tx power information
597 		 * driver need to process addition information
598 		 * to determine the max channel tx power limits
599 		 */
600 		iwl_eeprom_enhanced_txpower(dev, data, eeprom, eeprom_size,
601 					    n_channels);
602 	} else {
603 		/* All others use data from channel map */
604 		int i;
605 
606 		data->max_tx_pwr_half_dbm = -128;
607 
608 		for (i = 0; i < n_channels; i++)
609 			data->max_tx_pwr_half_dbm =
610 				max_t(s8, data->max_tx_pwr_half_dbm,
611 				      data->channels[i].max_power * 2);
612 	}
613 
614 	/* Check if we do have HT40 channels */
615 	if (cfg->eeprom_params->regulatory_bands[5] ==
616 				EEPROM_REGULATORY_BAND_NO_HT40 &&
617 	    cfg->eeprom_params->regulatory_bands[6] ==
618 				EEPROM_REGULATORY_BAND_NO_HT40)
619 		return n_channels;
620 
621 	/* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
622 	for (band = 6; band <= 7; band++) {
623 		enum nl80211_band ieeeband;
624 
625 		iwl_init_band_reference(cfg, eeprom, eeprom_size, band,
626 					&eeprom_ch_count, &eeprom_ch_info,
627 					&eeprom_ch_array);
628 
629 		/* EEPROM band 6 is 2.4, band 7 is 5 GHz */
630 		ieeeband = (band == 6) ? NL80211_BAND_2GHZ
631 				       : NL80211_BAND_5GHZ;
632 
633 		/* Loop through each band adding each of the channels */
634 		for (ch_idx = 0; ch_idx < eeprom_ch_count; ch_idx++) {
635 			/* Set up driver's info for lower half */
636 			iwl_mod_ht40_chan_info(dev, data, n_channels, ieeeband,
637 					       eeprom_ch_array[ch_idx],
638 					       &eeprom_ch_info[ch_idx],
639 					       IEEE80211_CHAN_NO_HT40PLUS);
640 
641 			/* Set up driver's info for upper half */
642 			iwl_mod_ht40_chan_info(dev, data, n_channels, ieeeband,
643 					       eeprom_ch_array[ch_idx] + 4,
644 					       &eeprom_ch_info[ch_idx],
645 					       IEEE80211_CHAN_NO_HT40MINUS);
646 		}
647 	}
648 
649 	return n_channels;
650 }
651 #endif
652 
iwl_init_sband_channels(struct iwl_nvm_data * data,struct ieee80211_supported_band * sband,int n_channels,enum nl80211_band band)653 int iwl_init_sband_channels(struct iwl_nvm_data *data,
654 			    struct ieee80211_supported_band *sband,
655 			    int n_channels, enum nl80211_band band)
656 {
657 	struct ieee80211_channel *chan = &data->channels[0];
658 	int n = 0, idx = 0;
659 
660 	while (idx < n_channels && chan->band != band)
661 		chan = &data->channels[++idx];
662 
663 	sband->channels = &data->channels[idx];
664 
665 	while (idx < n_channels && chan->band == band) {
666 		chan = &data->channels[++idx];
667 		n++;
668 	}
669 
670 	sband->n_channels = n;
671 
672 	return n;
673 }
674 
675 #define MAX_BIT_RATE_40_MHZ	150 /* Mbps */
676 #define MAX_BIT_RATE_20_MHZ	72 /* Mbps */
677 
iwl_init_ht_hw_capab(struct iwl_trans * trans,struct iwl_nvm_data * data,struct ieee80211_sta_ht_cap * ht_info,enum nl80211_band band,u8 tx_chains,u8 rx_chains)678 void iwl_init_ht_hw_capab(struct iwl_trans *trans,
679 			  struct iwl_nvm_data *data,
680 			  struct ieee80211_sta_ht_cap *ht_info,
681 			  enum nl80211_band band,
682 			  u8 tx_chains, u8 rx_chains)
683 {
684 	const struct iwl_cfg *cfg = trans->cfg;
685 	int max_bit_rate = 0;
686 
687 	tx_chains = hweight8(tx_chains);
688 	if (cfg->rx_with_siso_diversity)
689 		rx_chains = 1;
690 	else
691 		rx_chains = hweight8(rx_chains);
692 
693 	if (!(data->sku_cap_11n_enable) ||
694 	    (iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL) ||
695 	    !cfg->ht_params) {
696 		ht_info->ht_supported = false;
697 		return;
698 	}
699 
700 	if (data->sku_cap_mimo_disabled)
701 		rx_chains = 1;
702 
703 	ht_info->ht_supported = true;
704 	ht_info->cap = IEEE80211_HT_CAP_DSSSCCK40;
705 
706 	if (cfg->ht_params->stbc) {
707 		ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
708 
709 		if (tx_chains > 1)
710 			ht_info->cap |= IEEE80211_HT_CAP_TX_STBC;
711 	}
712 
713 	if (cfg->ht_params->ldpc)
714 		ht_info->cap |= IEEE80211_HT_CAP_LDPC_CODING;
715 
716 	if (trans->trans_cfg->mq_rx_supported ||
717 	    iwlwifi_mod_params.amsdu_size >= IWL_AMSDU_8K)
718 		ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
719 
720 	ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
721 	ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_4;
722 
723 	ht_info->mcs.rx_mask[0] = 0xFF;
724 	if (rx_chains >= 2)
725 		ht_info->mcs.rx_mask[1] = 0xFF;
726 	if (rx_chains >= 3)
727 		ht_info->mcs.rx_mask[2] = 0xFF;
728 
729 	if (cfg->ht_params->ht_greenfield_support)
730 		ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
731 	ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
732 
733 	max_bit_rate = MAX_BIT_RATE_20_MHZ;
734 
735 	if (cfg->ht_params->ht40_bands & BIT(band)) {
736 		ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
737 		ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
738 		max_bit_rate = MAX_BIT_RATE_40_MHZ;
739 	}
740 
741 	/* Highest supported Rx data rate */
742 	max_bit_rate *= rx_chains;
743 	WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
744 	ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
745 
746 	/* Tx MCS capabilities */
747 	ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
748 	if (tx_chains != rx_chains) {
749 		ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
750 		ht_info->mcs.tx_params |= ((tx_chains - 1) <<
751 				IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
752 	}
753 }
754 
755 #if IS_ENABLED(CONFIG_IWLDVM)
iwl_init_sbands(struct iwl_trans * trans,const struct iwl_cfg * cfg,struct iwl_nvm_data * data,const u8 * eeprom,size_t eeprom_size)756 static void iwl_init_sbands(struct iwl_trans *trans, const struct iwl_cfg *cfg,
757 			    struct iwl_nvm_data *data,
758 			    const u8 *eeprom, size_t eeprom_size)
759 {
760 	struct device *dev = trans->dev;
761 	int n_channels = iwl_init_channel_map(dev, cfg, data,
762 					      eeprom, eeprom_size);
763 	int n_used = 0;
764 	struct ieee80211_supported_band *sband;
765 
766 	sband = &data->bands[NL80211_BAND_2GHZ];
767 	sband->band = NL80211_BAND_2GHZ;
768 	sband->bitrates = &iwl_cfg80211_rates[RATES_24_OFFS];
769 	sband->n_bitrates = N_RATES_24;
770 	n_used += iwl_init_sband_channels(data, sband, n_channels,
771 					  NL80211_BAND_2GHZ);
772 	iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_2GHZ,
773 			     data->valid_tx_ant, data->valid_rx_ant);
774 
775 	sband = &data->bands[NL80211_BAND_5GHZ];
776 	sband->band = NL80211_BAND_5GHZ;
777 	sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS];
778 	sband->n_bitrates = N_RATES_52;
779 	n_used += iwl_init_sband_channels(data, sband, n_channels,
780 					  NL80211_BAND_5GHZ);
781 	iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_5GHZ,
782 			     data->valid_tx_ant, data->valid_rx_ant);
783 
784 	if (n_channels != n_used)
785 		IWL_ERR_DEV(dev, "EEPROM: used only %d of %d channels\n",
786 			    n_used, n_channels);
787 }
788 
789 /* EEPROM data functions */
790 
791 struct iwl_nvm_data *
iwl_parse_eeprom_data(struct iwl_trans * trans,const struct iwl_cfg * cfg,const u8 * eeprom,size_t eeprom_size)792 iwl_parse_eeprom_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
793 		      const u8 *eeprom, size_t eeprom_size)
794 {
795 	struct iwl_nvm_data *data;
796 	struct device *dev = trans->dev;
797 	const void *tmp;
798 	u16 radio_cfg, sku;
799 
800 	if (WARN_ON(!cfg || !cfg->eeprom_params))
801 		return NULL;
802 
803 	data = kzalloc(struct_size(data, channels, IWL_NUM_CHANNELS),
804 		       GFP_KERNEL);
805 	if (!data)
806 		return NULL;
807 
808 	/* get MAC address(es) */
809 	tmp = iwl_eeprom_query_addr(eeprom, eeprom_size, EEPROM_MAC_ADDRESS);
810 	if (!tmp)
811 		goto err_free;
812 	memcpy(data->hw_addr, tmp, ETH_ALEN);
813 	data->n_hw_addrs = iwl_eeprom_query16(eeprom, eeprom_size,
814 					      EEPROM_NUM_MAC_ADDRESS);
815 
816 	if (iwl_eeprom_read_calib(eeprom, eeprom_size, data))
817 		goto err_free;
818 
819 	tmp = iwl_eeprom_query_addr(eeprom, eeprom_size, EEPROM_XTAL);
820 	if (!tmp)
821 		goto err_free;
822 	memcpy(data->xtal_calib, tmp, sizeof(data->xtal_calib));
823 
824 	tmp = iwl_eeprom_query_addr(eeprom, eeprom_size,
825 				    EEPROM_RAW_TEMPERATURE);
826 	if (!tmp)
827 		goto err_free;
828 	data->raw_temperature = *(__le16 *)tmp;
829 
830 	tmp = iwl_eeprom_query_addr(eeprom, eeprom_size,
831 				    EEPROM_KELVIN_TEMPERATURE);
832 	if (!tmp)
833 		goto err_free;
834 	data->kelvin_temperature = *(__le16 *)tmp;
835 	data->kelvin_voltage = *((__le16 *)tmp + 1);
836 
837 	radio_cfg = iwl_eeprom_query16(eeprom, eeprom_size,
838 					     EEPROM_RADIO_CONFIG);
839 	data->radio_cfg_dash = EEPROM_RF_CFG_DASH_MSK(radio_cfg);
840 	data->radio_cfg_pnum = EEPROM_RF_CFG_PNUM_MSK(radio_cfg);
841 	data->radio_cfg_step = EEPROM_RF_CFG_STEP_MSK(radio_cfg);
842 	data->radio_cfg_type = EEPROM_RF_CFG_TYPE_MSK(radio_cfg);
843 	data->valid_rx_ant = EEPROM_RF_CFG_RX_ANT_MSK(radio_cfg);
844 	data->valid_tx_ant = EEPROM_RF_CFG_TX_ANT_MSK(radio_cfg);
845 
846 	sku = iwl_eeprom_query16(eeprom, eeprom_size,
847 				 EEPROM_SKU_CAP);
848 	data->sku_cap_11n_enable = sku & EEPROM_SKU_CAP_11N_ENABLE;
849 	data->sku_cap_amt_enable = sku & EEPROM_SKU_CAP_AMT_ENABLE;
850 	data->sku_cap_band_24ghz_enable = sku & EEPROM_SKU_CAP_BAND_24GHZ;
851 	data->sku_cap_band_52ghz_enable = sku & EEPROM_SKU_CAP_BAND_52GHZ;
852 	data->sku_cap_ipan_enable = sku & EEPROM_SKU_CAP_IPAN_ENABLE;
853 	if (iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL)
854 		data->sku_cap_11n_enable = false;
855 
856 	data->nvm_version = iwl_eeprom_query16(eeprom, eeprom_size,
857 					       EEPROM_VERSION);
858 
859 	/* check overrides (some devices have wrong EEPROM) */
860 	if (cfg->valid_tx_ant)
861 		data->valid_tx_ant = cfg->valid_tx_ant;
862 	if (cfg->valid_rx_ant)
863 		data->valid_rx_ant = cfg->valid_rx_ant;
864 
865 	if (!data->valid_tx_ant || !data->valid_rx_ant) {
866 		IWL_ERR_DEV(dev, "invalid antennas (0x%x, 0x%x)\n",
867 			    data->valid_tx_ant, data->valid_rx_ant);
868 		goto err_free;
869 	}
870 
871 	iwl_init_sbands(trans, cfg, data, eeprom, eeprom_size);
872 
873 	return data;
874  err_free:
875 	kfree(data);
876 	return NULL;
877 }
878 IWL_EXPORT_SYMBOL(iwl_parse_eeprom_data);
879 #endif
880