1 /* $NetBSD: uchcom.c,v 1.1 2007/09/03 17:57:37 tshiozak Exp $ */
2
3 /*-
4 * SPDX-License-Identifier: BSD-2-Clause
5 *
6 * Copyright (c) 2007, Takanori Watanabe
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30
31 /*
32 * Copyright (c) 2007 The NetBSD Foundation, Inc.
33 * All rights reserved.
34 *
35 * This code is derived from software contributed to The NetBSD Foundation
36 * by Takuya SHIOZAKI (tshiozak@netbsd.org).
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 * 1. Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * 2. Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in the
45 * documentation and/or other materials provided with the distribution.
46 *
47 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
48 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
49 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
50 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
51 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
52 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
53 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
54 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
55 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
56 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
57 * POSSIBILITY OF SUCH DAMAGE.
58 */
59
60 #include <sys/cdefs.h>
61 /*
62 * Driver for WinChipHead CH341/340, the worst USB-serial chip in the
63 * world.
64 */
65
66 #include <sys/stdint.h>
67 #include <sys/stddef.h>
68 #include <sys/param.h>
69 #include <sys/queue.h>
70 #include <sys/types.h>
71 #include <sys/systm.h>
72 #include <sys/kernel.h>
73 #include <sys/bus.h>
74 #include <sys/module.h>
75 #include <sys/lock.h>
76 #include <sys/mutex.h>
77 #include <sys/condvar.h>
78 #include <sys/sysctl.h>
79 #include <sys/sx.h>
80 #include <sys/unistd.h>
81 #include <sys/callout.h>
82 #include <sys/malloc.h>
83 #include <sys/priv.h>
84
85 #include <dev/usb/usb.h>
86 #include <dev/usb/usbdi.h>
87 #include <dev/usb/usbdi_util.h>
88 #include "usbdevs.h"
89
90 #define USB_DEBUG_VAR uchcom_debug
91 #include <dev/usb/usb_debug.h>
92 #include <dev/usb/usb_process.h>
93
94 #include <dev/usb/serial/usb_serial.h>
95
96 #ifdef USB_DEBUG
97 static int uchcom_debug = 0;
98
99 static SYSCTL_NODE(_hw_usb, OID_AUTO, uchcom, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
100 "USB uchcom");
101 SYSCTL_INT(_hw_usb_uchcom, OID_AUTO, debug, CTLFLAG_RWTUN,
102 &uchcom_debug, 0, "uchcom debug level");
103 #endif
104
105 #define UCHCOM_IFACE_INDEX 0
106 #define UCHCOM_CONFIG_INDEX 0
107
108 #define UCHCOM_REV_CH340 0x0250
109 #define UCHCOM_INPUT_BUF_SIZE 8
110
111 #define UCHCOM_REQ_GET_VERSION 0x5F
112 #define UCHCOM_REQ_READ_REG 0x95
113 #define UCHCOM_REQ_WRITE_REG 0x9A
114 #define UCHCOM_REQ_RESET 0xA1
115 #define UCHCOM_REQ_SET_DTRRTS 0xA4
116
117 #define UCHCOM_REG_STAT1 0x06
118 #define UCHCOM_REG_STAT2 0x07
119 #define UCHCOM_REG_BPS_PRE 0x12
120 #define UCHCOM_REG_BPS_DIV 0x13
121 #define UCHCOM_REG_BPS_MOD 0x14
122 #define UCHCOM_REG_BPS_PAD 0x0F
123 #define UCHCOM_REG_BREAK1 0x05
124 #define UCHCOM_REG_LCR1 0x18
125 #define UCHCOM_REG_LCR2 0x25
126
127 #define UCHCOM_VER_20 0x20
128 #define UCHCOM_VER_30 0x30
129
130 #define UCHCOM_BASE_UNKNOWN 0
131 #define UCHCOM_BPS_MOD_BASE 20000000
132 #define UCHCOM_BPS_MOD_BASE_OFS 1100
133
134 #define UCHCOM_DTR_MASK 0x20
135 #define UCHCOM_RTS_MASK 0x40
136
137 #define UCHCOM_BRK_MASK 0x01
138
139 #define UCHCOM_LCR1_MASK 0xAF
140 #define UCHCOM_LCR2_MASK 0x07
141 #define UCHCOM_LCR1_RX 0x80
142 #define UCHCOM_LCR1_TX 0x40
143 #define UCHCOM_LCR1_PARENB 0x08
144 #define UCHCOM_LCR1_CS8 0x03
145 #define UCHCOM_LCR2_PAREVEN 0x07
146 #define UCHCOM_LCR2_PARODD 0x06
147 #define UCHCOM_LCR2_PARMARK 0x05
148 #define UCHCOM_LCR2_PARSPACE 0x04
149
150 #define UCHCOM_INTR_STAT1 0x02
151 #define UCHCOM_INTR_STAT2 0x03
152 #define UCHCOM_INTR_LEAST 4
153
154 #define UCHCOM_BULK_BUF_SIZE 1024 /* bytes */
155
156 enum {
157 UCHCOM_BULK_DT_WR,
158 UCHCOM_BULK_DT_RD,
159 UCHCOM_INTR_DT_RD,
160 UCHCOM_N_TRANSFER,
161 };
162
163 struct uchcom_softc {
164 struct ucom_super_softc sc_super_ucom;
165 struct ucom_softc sc_ucom;
166
167 struct usb_xfer *sc_xfer[UCHCOM_N_TRANSFER];
168 struct usb_device *sc_udev;
169 struct mtx sc_mtx;
170
171 uint8_t sc_dtr; /* local copy */
172 uint8_t sc_rts; /* local copy */
173 uint8_t sc_version;
174 uint8_t sc_msr;
175 uint8_t sc_lsr; /* local status register */
176 };
177
178 struct uchcom_divider {
179 uint8_t dv_prescaler;
180 uint8_t dv_div;
181 uint8_t dv_mod;
182 };
183
184 struct uchcom_divider_record {
185 uint32_t dvr_high;
186 uint32_t dvr_low;
187 uint32_t dvr_base_clock;
188 struct uchcom_divider dvr_divider;
189 };
190
191 static const struct uchcom_divider_record dividers[] =
192 {
193 {307200, 307200, UCHCOM_BASE_UNKNOWN, {7, 0xD9, 0}},
194 {921600, 921600, UCHCOM_BASE_UNKNOWN, {7, 0xF3, 0}},
195 {2999999, 23530, 6000000, {3, 0, 0}},
196 {23529, 2942, 750000, {2, 0, 0}},
197 {2941, 368, 93750, {1, 0, 0}},
198 {367, 1, 11719, {0, 0, 0}},
199 };
200
201 #define NUM_DIVIDERS nitems(dividers)
202
203 static const STRUCT_USB_HOST_ID uchcom_devs[] = {
204 {USB_VPI(USB_VENDOR_WCH, USB_PRODUCT_WCH_CH341SER, 0)},
205 {USB_VPI(USB_VENDOR_WCH2, USB_PRODUCT_WCH2_CH341SER, 0)},
206 {USB_VPI(USB_VENDOR_WCH2, USB_PRODUCT_WCH2_CH341SER_2, 0)},
207 {USB_VPI(USB_VENDOR_WCH2, USB_PRODUCT_WCH2_CH341SER_3, 0)},
208 };
209
210 /* protypes */
211
212 static void uchcom_free(struct ucom_softc *);
213 static int uchcom_pre_param(struct ucom_softc *, struct termios *);
214 static void uchcom_cfg_get_status(struct ucom_softc *, uint8_t *,
215 uint8_t *);
216 static void uchcom_cfg_open(struct ucom_softc *ucom);
217 static void uchcom_cfg_param(struct ucom_softc *, struct termios *);
218 static void uchcom_cfg_set_break(struct ucom_softc *, uint8_t);
219 static void uchcom_cfg_set_dtr(struct ucom_softc *, uint8_t);
220 static void uchcom_cfg_set_rts(struct ucom_softc *, uint8_t);
221 static void uchcom_start_read(struct ucom_softc *);
222 static void uchcom_start_write(struct ucom_softc *);
223 static void uchcom_stop_read(struct ucom_softc *);
224 static void uchcom_stop_write(struct ucom_softc *);
225 static void uchcom_update_version(struct uchcom_softc *);
226 static void uchcom_convert_status(struct uchcom_softc *, uint8_t);
227 static void uchcom_update_status(struct uchcom_softc *);
228 static void uchcom_set_dtr_rts(struct uchcom_softc *);
229 static int uchcom_calc_divider_settings(struct uchcom_divider *, uint32_t);
230 static void uchcom_set_baudrate(struct uchcom_softc *, uint32_t);
231 static void uchcom_poll(struct ucom_softc *ucom);
232
233 static device_probe_t uchcom_probe;
234 static device_attach_t uchcom_attach;
235 static device_detach_t uchcom_detach;
236 static void uchcom_free_softc(struct uchcom_softc *);
237
238 static usb_callback_t uchcom_intr_callback;
239 static usb_callback_t uchcom_write_callback;
240 static usb_callback_t uchcom_read_callback;
241
242 static const struct usb_config uchcom_config_data[UCHCOM_N_TRANSFER] = {
243 [UCHCOM_BULK_DT_WR] = {
244 .type = UE_BULK,
245 .endpoint = UE_ADDR_ANY,
246 .direction = UE_DIR_OUT,
247 .bufsize = UCHCOM_BULK_BUF_SIZE,
248 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
249 .callback = &uchcom_write_callback,
250 },
251
252 [UCHCOM_BULK_DT_RD] = {
253 .type = UE_BULK,
254 .endpoint = UE_ADDR_ANY,
255 .direction = UE_DIR_IN,
256 .bufsize = UCHCOM_BULK_BUF_SIZE,
257 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
258 .callback = &uchcom_read_callback,
259 },
260
261 [UCHCOM_INTR_DT_RD] = {
262 .type = UE_INTERRUPT,
263 .endpoint = UE_ADDR_ANY,
264 .direction = UE_DIR_IN,
265 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
266 .bufsize = 0, /* use wMaxPacketSize */
267 .callback = &uchcom_intr_callback,
268 },
269 };
270
271 static struct ucom_callback uchcom_callback = {
272 .ucom_cfg_get_status = &uchcom_cfg_get_status,
273 .ucom_cfg_set_dtr = &uchcom_cfg_set_dtr,
274 .ucom_cfg_set_rts = &uchcom_cfg_set_rts,
275 .ucom_cfg_set_break = &uchcom_cfg_set_break,
276 .ucom_cfg_open = &uchcom_cfg_open,
277 .ucom_cfg_param = &uchcom_cfg_param,
278 .ucom_pre_param = &uchcom_pre_param,
279 .ucom_start_read = &uchcom_start_read,
280 .ucom_stop_read = &uchcom_stop_read,
281 .ucom_start_write = &uchcom_start_write,
282 .ucom_stop_write = &uchcom_stop_write,
283 .ucom_poll = &uchcom_poll,
284 .ucom_free = &uchcom_free,
285 };
286
287 /* ----------------------------------------------------------------------
288 * driver entry points
289 */
290
291 static int
uchcom_probe(device_t dev)292 uchcom_probe(device_t dev)
293 {
294 struct usb_attach_arg *uaa = device_get_ivars(dev);
295
296 DPRINTFN(11, "\n");
297
298 if (uaa->usb_mode != USB_MODE_HOST) {
299 return (ENXIO);
300 }
301 if (uaa->info.bConfigIndex != UCHCOM_CONFIG_INDEX) {
302 return (ENXIO);
303 }
304 if (uaa->info.bIfaceIndex != UCHCOM_IFACE_INDEX) {
305 return (ENXIO);
306 }
307 return (usbd_lookup_id_by_uaa(uchcom_devs, sizeof(uchcom_devs), uaa));
308 }
309
310 static int
uchcom_attach(device_t dev)311 uchcom_attach(device_t dev)
312 {
313 struct uchcom_softc *sc = device_get_softc(dev);
314 struct usb_attach_arg *uaa = device_get_ivars(dev);
315 int error;
316 uint8_t iface_index;
317
318 DPRINTFN(11, "\n");
319
320 device_set_usb_desc(dev);
321 mtx_init(&sc->sc_mtx, "uchcom", NULL, MTX_DEF);
322 ucom_ref(&sc->sc_super_ucom);
323
324 sc->sc_udev = uaa->device;
325
326 switch (uaa->info.idProduct) {
327 case USB_PRODUCT_WCH2_CH341SER:
328 device_printf(dev, "CH340 detected\n");
329 break;
330 case USB_PRODUCT_WCH2_CH341SER_2:
331 case USB_PRODUCT_WCH2_CH341SER_3:
332 device_printf(dev, "CH341 detected\n");
333 break;
334 default:
335 device_printf(dev, "New CH340/CH341 product 0x%04x detected\n",
336 uaa->info.idProduct);
337 break;
338 }
339
340 iface_index = UCHCOM_IFACE_INDEX;
341 error = usbd_transfer_setup(uaa->device,
342 &iface_index, sc->sc_xfer, uchcom_config_data,
343 UCHCOM_N_TRANSFER, sc, &sc->sc_mtx);
344
345 if (error) {
346 DPRINTF("one or more missing USB endpoints, "
347 "error=%s\n", usbd_errstr(error));
348 goto detach;
349 }
350
351 /* clear stall at first run */
352 mtx_lock(&sc->sc_mtx);
353 usbd_xfer_set_stall(sc->sc_xfer[UCHCOM_BULK_DT_WR]);
354 usbd_xfer_set_stall(sc->sc_xfer[UCHCOM_BULK_DT_RD]);
355 mtx_unlock(&sc->sc_mtx);
356
357 error = ucom_attach(&sc->sc_super_ucom, &sc->sc_ucom, 1, sc,
358 &uchcom_callback, &sc->sc_mtx);
359 if (error) {
360 goto detach;
361 }
362 ucom_set_pnpinfo_usb(&sc->sc_super_ucom, dev);
363
364 return (0);
365
366 detach:
367 uchcom_detach(dev);
368 return (ENXIO);
369 }
370
371 static int
uchcom_detach(device_t dev)372 uchcom_detach(device_t dev)
373 {
374 struct uchcom_softc *sc = device_get_softc(dev);
375
376 DPRINTFN(11, "\n");
377
378 ucom_detach(&sc->sc_super_ucom, &sc->sc_ucom);
379 usbd_transfer_unsetup(sc->sc_xfer, UCHCOM_N_TRANSFER);
380
381 device_claim_softc(dev);
382
383 uchcom_free_softc(sc);
384
385 return (0);
386 }
387
388 UCOM_UNLOAD_DRAIN(uchcom);
389
390 static void
uchcom_free_softc(struct uchcom_softc * sc)391 uchcom_free_softc(struct uchcom_softc *sc)
392 {
393 if (ucom_unref(&sc->sc_super_ucom)) {
394 mtx_destroy(&sc->sc_mtx);
395 device_free_softc(sc);
396 }
397 }
398
399 static void
uchcom_free(struct ucom_softc * ucom)400 uchcom_free(struct ucom_softc *ucom)
401 {
402 uchcom_free_softc(ucom->sc_parent);
403 }
404
405 /* ----------------------------------------------------------------------
406 * low level i/o
407 */
408
409 static void
uchcom_ctrl_write(struct uchcom_softc * sc,uint8_t reqno,uint16_t value,uint16_t index)410 uchcom_ctrl_write(struct uchcom_softc *sc, uint8_t reqno,
411 uint16_t value, uint16_t index)
412 {
413 struct usb_device_request req;
414
415 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
416 req.bRequest = reqno;
417 USETW(req.wValue, value);
418 USETW(req.wIndex, index);
419 USETW(req.wLength, 0);
420
421 DPRINTF("WR REQ 0x%02X VAL 0x%04X IDX 0x%04X\n",
422 reqno, value, index);
423 ucom_cfg_do_request(sc->sc_udev,
424 &sc->sc_ucom, &req, NULL, 0, 1000);
425 }
426
427 static void
uchcom_ctrl_read(struct uchcom_softc * sc,uint8_t reqno,uint16_t value,uint16_t index,void * buf,uint16_t buflen)428 uchcom_ctrl_read(struct uchcom_softc *sc, uint8_t reqno,
429 uint16_t value, uint16_t index, void *buf, uint16_t buflen)
430 {
431 struct usb_device_request req;
432
433 req.bmRequestType = UT_READ_VENDOR_DEVICE;
434 req.bRequest = reqno;
435 USETW(req.wValue, value);
436 USETW(req.wIndex, index);
437 USETW(req.wLength, buflen);
438
439 DPRINTF("RD REQ 0x%02X VAL 0x%04X IDX 0x%04X LEN %d\n",
440 reqno, value, index, buflen);
441 ucom_cfg_do_request(sc->sc_udev,
442 &sc->sc_ucom, &req, buf, USB_SHORT_XFER_OK, 1000);
443 }
444
445 static void
uchcom_write_reg(struct uchcom_softc * sc,uint8_t reg1,uint8_t val1,uint8_t reg2,uint8_t val2)446 uchcom_write_reg(struct uchcom_softc *sc,
447 uint8_t reg1, uint8_t val1, uint8_t reg2, uint8_t val2)
448 {
449 DPRINTF("0x%02X<-0x%02X, 0x%02X<-0x%02X\n",
450 (unsigned)reg1, (unsigned)val1,
451 (unsigned)reg2, (unsigned)val2);
452 uchcom_ctrl_write(
453 sc, UCHCOM_REQ_WRITE_REG,
454 reg1 | ((uint16_t)reg2 << 8), val1 | ((uint16_t)val2 << 8));
455 }
456
457 static void
uchcom_read_reg(struct uchcom_softc * sc,uint8_t reg1,uint8_t * rval1,uint8_t reg2,uint8_t * rval2)458 uchcom_read_reg(struct uchcom_softc *sc,
459 uint8_t reg1, uint8_t *rval1, uint8_t reg2, uint8_t *rval2)
460 {
461 uint8_t buf[UCHCOM_INPUT_BUF_SIZE];
462
463 uchcom_ctrl_read(
464 sc, UCHCOM_REQ_READ_REG,
465 reg1 | ((uint16_t)reg2 << 8), 0, buf, sizeof(buf));
466
467 DPRINTF("0x%02X->0x%02X, 0x%02X->0x%02X\n",
468 (unsigned)reg1, (unsigned)buf[0],
469 (unsigned)reg2, (unsigned)buf[1]);
470
471 if (rval1)
472 *rval1 = buf[0];
473 if (rval2)
474 *rval2 = buf[1];
475 }
476
477 static void
uchcom_get_version(struct uchcom_softc * sc,uint8_t * rver)478 uchcom_get_version(struct uchcom_softc *sc, uint8_t *rver)
479 {
480 uint8_t buf[UCHCOM_INPUT_BUF_SIZE];
481
482 uchcom_ctrl_read(sc, UCHCOM_REQ_GET_VERSION, 0, 0, buf, sizeof(buf));
483
484 if (rver)
485 *rver = buf[0];
486 }
487
488 static void
uchcom_get_status(struct uchcom_softc * sc,uint8_t * rval)489 uchcom_get_status(struct uchcom_softc *sc, uint8_t *rval)
490 {
491 uchcom_read_reg(sc, UCHCOM_REG_STAT1, rval, UCHCOM_REG_STAT2, NULL);
492 }
493
494 static void
uchcom_set_dtr_rts_10(struct uchcom_softc * sc,uint8_t val)495 uchcom_set_dtr_rts_10(struct uchcom_softc *sc, uint8_t val)
496 {
497 uchcom_write_reg(sc, UCHCOM_REG_STAT1, val, UCHCOM_REG_STAT1, val);
498 }
499
500 static void
uchcom_set_dtr_rts_20(struct uchcom_softc * sc,uint8_t val)501 uchcom_set_dtr_rts_20(struct uchcom_softc *sc, uint8_t val)
502 {
503 uchcom_ctrl_write(sc, UCHCOM_REQ_SET_DTRRTS, val, 0);
504 }
505
506 /* ----------------------------------------------------------------------
507 * middle layer
508 */
509
510 static void
uchcom_update_version(struct uchcom_softc * sc)511 uchcom_update_version(struct uchcom_softc *sc)
512 {
513 uchcom_get_version(sc, &sc->sc_version);
514 DPRINTF("Chip version: 0x%02x\n", sc->sc_version);
515 }
516
517 static void
uchcom_convert_status(struct uchcom_softc * sc,uint8_t cur)518 uchcom_convert_status(struct uchcom_softc *sc, uint8_t cur)
519 {
520 sc->sc_dtr = !(cur & UCHCOM_DTR_MASK);
521 sc->sc_rts = !(cur & UCHCOM_RTS_MASK);
522
523 cur = ~cur & 0x0F;
524 sc->sc_msr = (cur << 4) | ((sc->sc_msr >> 4) ^ cur);
525 }
526
527 static void
uchcom_update_status(struct uchcom_softc * sc)528 uchcom_update_status(struct uchcom_softc *sc)
529 {
530 uint8_t cur;
531
532 uchcom_get_status(sc, &cur);
533 uchcom_convert_status(sc, cur);
534 }
535
536 static void
uchcom_set_dtr_rts(struct uchcom_softc * sc)537 uchcom_set_dtr_rts(struct uchcom_softc *sc)
538 {
539 uint8_t val = 0;
540
541 if (sc->sc_dtr)
542 val |= UCHCOM_DTR_MASK;
543 if (sc->sc_rts)
544 val |= UCHCOM_RTS_MASK;
545
546 if (sc->sc_version < UCHCOM_VER_20)
547 uchcom_set_dtr_rts_10(sc, ~val);
548 else
549 uchcom_set_dtr_rts_20(sc, ~val);
550 }
551
552 static void
uchcom_cfg_set_break(struct ucom_softc * ucom,uint8_t onoff)553 uchcom_cfg_set_break(struct ucom_softc *ucom, uint8_t onoff)
554 {
555 struct uchcom_softc *sc = ucom->sc_parent;
556 uint8_t brk1;
557 uint8_t brk2;
558
559 uchcom_read_reg(sc, UCHCOM_REG_BREAK1, &brk1, UCHCOM_REG_LCR1, &brk2);
560 if (onoff) {
561 /* on - clear bits */
562 brk1 &= ~UCHCOM_BRK_MASK;
563 brk2 &= ~UCHCOM_LCR1_TX;
564 } else {
565 /* off - set bits */
566 brk1 |= UCHCOM_BRK_MASK;
567 brk2 |= UCHCOM_LCR1_TX;
568 }
569 uchcom_write_reg(sc, UCHCOM_REG_BREAK1, brk1, UCHCOM_REG_LCR1, brk2);
570 }
571
572 static int
uchcom_calc_divider_settings(struct uchcom_divider * dp,uint32_t rate)573 uchcom_calc_divider_settings(struct uchcom_divider *dp, uint32_t rate)
574 {
575 const struct uchcom_divider_record *rp;
576 uint32_t div;
577 uint32_t rem;
578 uint32_t mod;
579 uint8_t i;
580
581 /* find record */
582 for (i = 0; i != NUM_DIVIDERS; i++) {
583 if (dividers[i].dvr_high >= rate &&
584 dividers[i].dvr_low <= rate) {
585 rp = ÷rs[i];
586 goto found;
587 }
588 }
589 return (-1);
590
591 found:
592 dp->dv_prescaler = rp->dvr_divider.dv_prescaler;
593 if (rp->dvr_base_clock == UCHCOM_BASE_UNKNOWN)
594 dp->dv_div = rp->dvr_divider.dv_div;
595 else {
596 div = rp->dvr_base_clock / rate;
597 rem = rp->dvr_base_clock % rate;
598 if (div == 0 || div >= 0xFF)
599 return (-1);
600 if ((rem << 1) >= rate)
601 div += 1;
602 dp->dv_div = (uint8_t)-div;
603 }
604
605 mod = (UCHCOM_BPS_MOD_BASE / rate) + UCHCOM_BPS_MOD_BASE_OFS;
606 mod = mod + (mod / 2);
607
608 dp->dv_mod = (mod + 0xFF) / 0x100;
609
610 return (0);
611 }
612
613 static void
uchcom_set_baudrate(struct uchcom_softc * sc,uint32_t rate)614 uchcom_set_baudrate(struct uchcom_softc *sc, uint32_t rate)
615 {
616 struct uchcom_divider dv;
617
618 if (uchcom_calc_divider_settings(&dv, rate))
619 return;
620
621 /*
622 * According to linux code we need to set bit 7 of UCHCOM_REG_BPS_PRE,
623 * otherwise the chip will buffer data.
624 */
625 uchcom_write_reg(sc,
626 UCHCOM_REG_BPS_PRE, dv.dv_prescaler | 0x80,
627 UCHCOM_REG_BPS_DIV, dv.dv_div);
628 uchcom_write_reg(sc,
629 UCHCOM_REG_BPS_MOD, dv.dv_mod,
630 UCHCOM_REG_BPS_PAD, 0);
631 }
632
633 /* ----------------------------------------------------------------------
634 * methods for ucom
635 */
636 static void
uchcom_cfg_get_status(struct ucom_softc * ucom,uint8_t * lsr,uint8_t * msr)637 uchcom_cfg_get_status(struct ucom_softc *ucom, uint8_t *lsr, uint8_t *msr)
638 {
639 struct uchcom_softc *sc = ucom->sc_parent;
640
641 DPRINTF("\n");
642
643 /* XXX Note: sc_lsr is always zero */
644 *lsr = sc->sc_lsr;
645 *msr = sc->sc_msr;
646 }
647
648 static void
uchcom_cfg_set_dtr(struct ucom_softc * ucom,uint8_t onoff)649 uchcom_cfg_set_dtr(struct ucom_softc *ucom, uint8_t onoff)
650 {
651 struct uchcom_softc *sc = ucom->sc_parent;
652
653 DPRINTF("onoff = %d\n", onoff);
654
655 sc->sc_dtr = onoff;
656 uchcom_set_dtr_rts(sc);
657 }
658
659 static void
uchcom_cfg_set_rts(struct ucom_softc * ucom,uint8_t onoff)660 uchcom_cfg_set_rts(struct ucom_softc *ucom, uint8_t onoff)
661 {
662 struct uchcom_softc *sc = ucom->sc_parent;
663
664 DPRINTF("onoff = %d\n", onoff);
665
666 sc->sc_rts = onoff;
667 uchcom_set_dtr_rts(sc);
668 }
669
670 static void
uchcom_cfg_open(struct ucom_softc * ucom)671 uchcom_cfg_open(struct ucom_softc *ucom)
672 {
673 struct uchcom_softc *sc = ucom->sc_parent;
674
675 DPRINTF("\n");
676
677 uchcom_update_version(sc);
678 uchcom_update_status(sc);
679 }
680
681 static int
uchcom_pre_param(struct ucom_softc * ucom,struct termios * t)682 uchcom_pre_param(struct ucom_softc *ucom, struct termios *t)
683 {
684 struct uchcom_divider dv;
685
686 switch (t->c_cflag & CSIZE) {
687 case CS8:
688 break;
689 default:
690 return (EIO);
691 }
692 if ((t->c_cflag & CSTOPB) != 0)
693 return (EIO);
694 if ((t->c_cflag & PARENB) != 0)
695 return (EIO);
696
697 if (uchcom_calc_divider_settings(&dv, t->c_ospeed)) {
698 return (EIO);
699 }
700 return (0); /* success */
701 }
702
703 static void
uchcom_cfg_param(struct ucom_softc * ucom,struct termios * t)704 uchcom_cfg_param(struct ucom_softc *ucom, struct termios *t)
705 {
706 struct uchcom_softc *sc = ucom->sc_parent;
707
708 uchcom_get_version(sc, NULL);
709 uchcom_ctrl_write(sc, UCHCOM_REQ_RESET, 0, 0);
710 uchcom_set_baudrate(sc, t->c_ospeed);
711 if (sc->sc_version < UCHCOM_VER_30) {
712 uchcom_read_reg(sc, UCHCOM_REG_LCR1, NULL,
713 UCHCOM_REG_LCR2, NULL);
714 uchcom_write_reg(sc, UCHCOM_REG_LCR1, 0x50,
715 UCHCOM_REG_LCR2, 0x00);
716 } else {
717 /*
718 * Set up line control:
719 * - enable transmit and receive
720 * - set 8n1 mode
721 * To do: support other sizes, parity, stop bits.
722 */
723 uchcom_write_reg(sc,
724 UCHCOM_REG_LCR1,
725 UCHCOM_LCR1_RX | UCHCOM_LCR1_TX | UCHCOM_LCR1_CS8,
726 UCHCOM_REG_LCR2, 0x00);
727 }
728 uchcom_update_status(sc);
729 uchcom_ctrl_write(sc, UCHCOM_REQ_RESET, 0x501f, 0xd90a);
730 uchcom_set_baudrate(sc, t->c_ospeed);
731 uchcom_set_dtr_rts(sc);
732 uchcom_update_status(sc);
733 }
734
735 static void
uchcom_start_read(struct ucom_softc * ucom)736 uchcom_start_read(struct ucom_softc *ucom)
737 {
738 struct uchcom_softc *sc = ucom->sc_parent;
739
740 /* start interrupt endpoint */
741 usbd_transfer_start(sc->sc_xfer[UCHCOM_INTR_DT_RD]);
742
743 /* start read endpoint */
744 usbd_transfer_start(sc->sc_xfer[UCHCOM_BULK_DT_RD]);
745 }
746
747 static void
uchcom_stop_read(struct ucom_softc * ucom)748 uchcom_stop_read(struct ucom_softc *ucom)
749 {
750 struct uchcom_softc *sc = ucom->sc_parent;
751
752 /* stop interrupt endpoint */
753 usbd_transfer_stop(sc->sc_xfer[UCHCOM_INTR_DT_RD]);
754
755 /* stop read endpoint */
756 usbd_transfer_stop(sc->sc_xfer[UCHCOM_BULK_DT_RD]);
757 }
758
759 static void
uchcom_start_write(struct ucom_softc * ucom)760 uchcom_start_write(struct ucom_softc *ucom)
761 {
762 struct uchcom_softc *sc = ucom->sc_parent;
763
764 usbd_transfer_start(sc->sc_xfer[UCHCOM_BULK_DT_WR]);
765 }
766
767 static void
uchcom_stop_write(struct ucom_softc * ucom)768 uchcom_stop_write(struct ucom_softc *ucom)
769 {
770 struct uchcom_softc *sc = ucom->sc_parent;
771
772 usbd_transfer_stop(sc->sc_xfer[UCHCOM_BULK_DT_WR]);
773 }
774
775 /* ----------------------------------------------------------------------
776 * callback when the modem status is changed.
777 */
778 static void
uchcom_intr_callback(struct usb_xfer * xfer,usb_error_t error)779 uchcom_intr_callback(struct usb_xfer *xfer, usb_error_t error)
780 {
781 struct uchcom_softc *sc = usbd_xfer_softc(xfer);
782 struct usb_page_cache *pc;
783 uint8_t buf[UCHCOM_INTR_LEAST];
784 int actlen;
785
786 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
787
788 switch (USB_GET_STATE(xfer)) {
789 case USB_ST_TRANSFERRED:
790
791 DPRINTF("actlen = %u\n", actlen);
792
793 if (actlen >= UCHCOM_INTR_LEAST) {
794 pc = usbd_xfer_get_frame(xfer, 0);
795 usbd_copy_out(pc, 0, buf, UCHCOM_INTR_LEAST);
796
797 DPRINTF("data = 0x%02X 0x%02X 0x%02X 0x%02X\n",
798 (unsigned)buf[0], (unsigned)buf[1],
799 (unsigned)buf[2], (unsigned)buf[3]);
800
801 uchcom_convert_status(sc, buf[UCHCOM_INTR_STAT1]);
802 ucom_status_change(&sc->sc_ucom);
803 }
804 case USB_ST_SETUP:
805 tr_setup:
806 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
807 usbd_transfer_submit(xfer);
808 break;
809
810 default: /* Error */
811 if (error != USB_ERR_CANCELLED) {
812 /* try to clear stall first */
813 usbd_xfer_set_stall(xfer);
814 goto tr_setup;
815 }
816 break;
817 }
818 }
819
820 static void
uchcom_write_callback(struct usb_xfer * xfer,usb_error_t error)821 uchcom_write_callback(struct usb_xfer *xfer, usb_error_t error)
822 {
823 struct uchcom_softc *sc = usbd_xfer_softc(xfer);
824 struct usb_page_cache *pc;
825 uint32_t actlen;
826
827 switch (USB_GET_STATE(xfer)) {
828 case USB_ST_SETUP:
829 case USB_ST_TRANSFERRED:
830 tr_setup:
831 pc = usbd_xfer_get_frame(xfer, 0);
832 if (ucom_get_data(&sc->sc_ucom, pc, 0,
833 usbd_xfer_max_len(xfer), &actlen)) {
834 DPRINTF("actlen = %d\n", actlen);
835
836 usbd_xfer_set_frame_len(xfer, 0, actlen);
837 usbd_transfer_submit(xfer);
838 }
839 break;
840
841 default: /* Error */
842 if (error != USB_ERR_CANCELLED) {
843 /* try to clear stall first */
844 usbd_xfer_set_stall(xfer);
845 goto tr_setup;
846 }
847 break;
848 }
849 }
850
851 static void
uchcom_read_callback(struct usb_xfer * xfer,usb_error_t error)852 uchcom_read_callback(struct usb_xfer *xfer, usb_error_t error)
853 {
854 struct uchcom_softc *sc = usbd_xfer_softc(xfer);
855 struct usb_page_cache *pc;
856 int actlen;
857
858 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
859
860 switch (USB_GET_STATE(xfer)) {
861 case USB_ST_TRANSFERRED:
862
863 if (actlen > 0) {
864 pc = usbd_xfer_get_frame(xfer, 0);
865 ucom_put_data(&sc->sc_ucom, pc, 0, actlen);
866 }
867
868 case USB_ST_SETUP:
869 tr_setup:
870 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
871 usbd_transfer_submit(xfer);
872 break;
873
874 default: /* Error */
875 if (error != USB_ERR_CANCELLED) {
876 /* try to clear stall first */
877 usbd_xfer_set_stall(xfer);
878 goto tr_setup;
879 }
880 break;
881 }
882 }
883
884 static void
uchcom_poll(struct ucom_softc * ucom)885 uchcom_poll(struct ucom_softc *ucom)
886 {
887 struct uchcom_softc *sc = ucom->sc_parent;
888 usbd_transfer_poll(sc->sc_xfer, UCHCOM_N_TRANSFER);
889 }
890
891 static device_method_t uchcom_methods[] = {
892 /* Device interface */
893 DEVMETHOD(device_probe, uchcom_probe),
894 DEVMETHOD(device_attach, uchcom_attach),
895 DEVMETHOD(device_detach, uchcom_detach),
896 DEVMETHOD_END
897 };
898
899 static driver_t uchcom_driver = {
900 .name = "uchcom",
901 .methods = uchcom_methods,
902 .size = sizeof(struct uchcom_softc)
903 };
904
905 DRIVER_MODULE(uchcom, uhub, uchcom_driver, NULL, NULL);
906 MODULE_DEPEND(uchcom, ucom, 1, 1, 1);
907 MODULE_DEPEND(uchcom, usb, 1, 1, 1);
908 MODULE_VERSION(uchcom, 1);
909 USB_PNP_HOST_INFO(uchcom_devs);
910