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Searched defs:VGT_DEBUG_REG16__num_gs_r2_q_not_0_MASK (Results 1 – 4 of 4) sorted by path

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h11272 #define VGT_DEBUG_REG16__num_gs_r2_q_not_0_MASK 0x40000000L macro
H A Dgfx_7_2_sh_mask.h17327 #define VGT_DEBUG_REG16__num_gs_r2_q_not_0_MASK 0x40000000 macro
H A Dgfx_8_0_sh_mask.h19637 #define VGT_DEBUG_REG16__num_gs_r2_q_not_0_MASK 0x40000000 macro
H A Dgfx_8_1_sh_mask.h20239 #define VGT_DEBUG_REG16__num_gs_r2_q_not_0_MASK 0x40000000 macro