xref: /openbsd/sys/arch/i386/pci/opti82c558reg.h (revision 8c563d9c)
1 /*	$OpenBSD: opti82c558reg.h,v 1.3 2000/03/28 03:37:59 mickey Exp $	*/
2 /*	$NetBSD: opti82c558reg.h,v 1.1 1999/11/17 01:21:20 thorpej Exp $  */
3 
4 /*
5  * Copyright (c) 1999, by UCHIYAMA Yasushi
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. The name of the developer may NOT be used to endorse or promote products
14  *    derived from this software without specific prior written permission.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 /*
30  * Register definitions for the Opti 82c558 PCI-ISA bridge interrupt
31  * controller.
32  */
33 
34 /*
35  * PCI IRQ Select Register
36  */
37 
38 #define	VIPER_CFG_PIRQ		0x40	/* PCI configuration space */
39 
40 /*
41  * Trigger setting:
42  *
43  *	[1:7]=>5,9,10,11,12,14,15 Edge = 0 Level = 1
44  */
45 #define	VIPER_CFG_TRIGGER_SHIFT	16
46 
47 #define	VIPER_LEGAL_LINK(link)	((link) >= 0 && (link) <= 3)
48 
49 #define	VIPER_PIRQ_MASK		0xde20
50 #define	VIPER_LEGAL_IRQ(irq)	((irq) >= 0 && (irq) <= 15 &&		\
51 				 ((1 << (irq)) & VIPER_PIRQ_MASK) != 0)
52 
53 #define	VIPER_PIRQ_NONE		0
54 #define	VIPER_PIRQ_5		1
55 #define	VIPER_PIRQ_9		2
56 #define	VIPER_PIRQ_10		3
57 #define	VIPER_PIRQ_11		4
58 #define	VIPER_PIRQ_12		5
59 #define	VIPER_PIRQ_14		6
60 #define	VIPER_PIRQ_15		7
61 
62 #define	VIPER_PIRQ_SELECT_MASK	0x07
63 #define	VIPER_PIRQ_SELECT_SHIFT	3
64 
65 #define	VIPER_PIRQ(reg, x)	(((reg) >> ((x) * VIPER_PIRQ_SELECT_SHIFT)) \
66 				 & VIPER_PIRQ_SELECT_MASK)
67