xref: /freebsd/sys/contrib/dev/athk/ath11k/wmi.h (revision 28348cae)
1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /*
3  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
5  */
6 
7 #ifndef ATH11K_WMI_H
8 #define ATH11K_WMI_H
9 
10 #if defined(__FreeBSD__)
11 #include <linux/wait.h>
12 #endif
13 #include <net/mac80211.h>
14 #include "htc.h"
15 
16 struct ath11k_base;
17 struct ath11k;
18 struct ath11k_fw_stats;
19 struct ath11k_fw_dbglog;
20 struct ath11k_vif;
21 
22 #define PSOC_HOST_MAX_NUM_SS (8)
23 
24 /* defines to set Packet extension values which can be 0 us, 8 usec or 16 usec */
25 #define MAX_HE_NSS               8
26 #define MAX_HE_MODULATION        8
27 #define MAX_HE_RU                4
28 #define HE_MODULATION_NONE       7
29 #define HE_PET_0_USEC            0
30 #define HE_PET_8_USEC            1
31 #define HE_PET_16_USEC           2
32 
33 #define WMI_MAX_CHAINS		 8
34 
35 #define WMI_MAX_NUM_SS                    MAX_HE_NSS
36 #define WMI_MAX_NUM_RU                    MAX_HE_RU
37 
38 #define WMI_TLV_CMD(grp_id) (((grp_id) << 12) | 0x1)
39 #define WMI_TLV_EV(grp_id) (((grp_id) << 12) | 0x1)
40 #define WMI_TLV_CMD_UNSUPPORTED 0
41 #define WMI_TLV_PDEV_PARAM_UNSUPPORTED 0
42 #define WMI_TLV_VDEV_PARAM_UNSUPPORTED 0
43 
44 struct wmi_cmd_hdr {
45 	u32 cmd_id;
46 } __packed;
47 
48 struct wmi_tlv {
49 	u32 header;
50 	u8 value[];
51 } __packed;
52 
53 #define WMI_TLV_LEN	GENMASK(15, 0)
54 #define WMI_TLV_TAG	GENMASK(31, 16)
55 #define TLV_HDR_SIZE	sizeof_field(struct wmi_tlv, header)
56 
57 #define WMI_CMD_HDR_CMD_ID      GENMASK(23, 0)
58 #define WMI_MAX_MEM_REQS        32
59 #define ATH11K_MAX_HW_LISTEN_INTERVAL 5
60 
61 #define WLAN_SCAN_MAX_HINT_S_SSID        10
62 #define WLAN_SCAN_MAX_HINT_BSSID         10
63 #define MAX_RNR_BSS                    5
64 
65 #define WLAN_SCAN_MAX_HINT_S_SSID        10
66 #define WLAN_SCAN_MAX_HINT_BSSID         10
67 #define MAX_RNR_BSS                    5
68 
69 #define WLAN_SCAN_PARAMS_MAX_SSID    16
70 #define WLAN_SCAN_PARAMS_MAX_BSSID   4
71 #define WLAN_SCAN_PARAMS_MAX_IE_LEN  256
72 
73 #define WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG 1
74 
75 #define MAX_WMI_UTF_LEN 252
76 #define WMI_BA_MODE_BUFFER_SIZE_256  3
77 /*
78  * HW mode config type replicated from FW header
79  * @WMI_HOST_HW_MODE_SINGLE: Only one PHY is active.
80  * @WMI_HOST_HW_MODE_DBS: Both PHYs are active in different bands,
81  *                        one in 2G and another in 5G.
82  * @WMI_HOST_HW_MODE_SBS_PASSIVE: Both PHYs are in passive mode (only rx) in
83  *                        same band; no tx allowed.
84  * @WMI_HOST_HW_MODE_SBS: Both PHYs are active in the same band.
85  *                        Support for both PHYs within one band is planned
86  *                        for 5G only(as indicated in WMI_MAC_PHY_CAPABILITIES),
87  *                        but could be extended to other bands in the future.
88  *                        The separation of the band between the two PHYs needs
89  *                        to be communicated separately.
90  * @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS
91  *                           as in WMI_HW_MODE_SBS, and 3rd on the other band
92  * @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and
93  *                        5G. It can support SBS (5G + 5G) OR DBS (5G + 2G).
94  * @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode.
95  */
96 enum wmi_host_hw_mode_config_type {
97 	WMI_HOST_HW_MODE_SINGLE       = 0,
98 	WMI_HOST_HW_MODE_DBS          = 1,
99 	WMI_HOST_HW_MODE_SBS_PASSIVE  = 2,
100 	WMI_HOST_HW_MODE_SBS          = 3,
101 	WMI_HOST_HW_MODE_DBS_SBS      = 4,
102 	WMI_HOST_HW_MODE_DBS_OR_SBS   = 5,
103 
104 	/* keep last */
105 	WMI_HOST_HW_MODE_MAX
106 };
107 
108 /* HW mode priority values used to detect the preferred HW mode
109  * on the available modes.
110  */
111 enum wmi_host_hw_mode_priority {
112 	WMI_HOST_HW_MODE_DBS_SBS_PRI,
113 	WMI_HOST_HW_MODE_DBS_PRI,
114 	WMI_HOST_HW_MODE_DBS_OR_SBS_PRI,
115 	WMI_HOST_HW_MODE_SBS_PRI,
116 	WMI_HOST_HW_MODE_SBS_PASSIVE_PRI,
117 	WMI_HOST_HW_MODE_SINGLE_PRI,
118 
119 	/* keep last the lowest priority */
120 	WMI_HOST_HW_MODE_MAX_PRI
121 };
122 
123 enum WMI_HOST_WLAN_BAND {
124 	WMI_HOST_WLAN_2G_CAP	= 0x1,
125 	WMI_HOST_WLAN_5G_CAP	= 0x2,
126 	WMI_HOST_WLAN_2G_5G_CAP	= WMI_HOST_WLAN_2G_CAP | WMI_HOST_WLAN_5G_CAP,
127 };
128 
129 /* Parameters used for WMI_VDEV_PARAM_AUTORATE_MISC_CFG command.
130  * Used only for HE auto rate mode.
131  */
132 enum {
133 	/* HE LTF related configuration */
134 	WMI_HE_AUTORATE_LTF_1X = BIT(0),
135 	WMI_HE_AUTORATE_LTF_2X = BIT(1),
136 	WMI_HE_AUTORATE_LTF_4X = BIT(2),
137 
138 	/* HE GI related configuration */
139 	WMI_AUTORATE_400NS_GI = BIT(8),
140 	WMI_AUTORATE_800NS_GI = BIT(9),
141 	WMI_AUTORATE_1600NS_GI = BIT(10),
142 	WMI_AUTORATE_3200NS_GI = BIT(11),
143 };
144 
145 enum {
146 	WMI_HOST_VDEV_FLAGS_NON_MBSSID_AP       = 0x00000001,
147 	WMI_HOST_VDEV_FLAGS_TRANSMIT_AP         = 0x00000002,
148 	WMI_HOST_VDEV_FLAGS_NON_TRANSMIT_AP     = 0x00000004,
149 	WMI_HOST_VDEV_FLAGS_EMA_MODE            = 0x00000008,
150 	WMI_HOST_VDEV_FLAGS_SCAN_MODE_VAP       = 0x00000010,
151 };
152 
153 /*
154  * wmi command groups.
155  */
156 enum wmi_cmd_group {
157 	/* 0 to 2 are reserved */
158 	WMI_GRP_START = 0x3,
159 	WMI_GRP_SCAN = WMI_GRP_START,
160 	WMI_GRP_PDEV		= 0x4,
161 	WMI_GRP_VDEV           = 0x5,
162 	WMI_GRP_PEER           = 0x6,
163 	WMI_GRP_MGMT           = 0x7,
164 	WMI_GRP_BA_NEG         = 0x8,
165 	WMI_GRP_STA_PS         = 0x9,
166 	WMI_GRP_DFS            = 0xa,
167 	WMI_GRP_ROAM           = 0xb,
168 	WMI_GRP_OFL_SCAN       = 0xc,
169 	WMI_GRP_P2P            = 0xd,
170 	WMI_GRP_AP_PS          = 0xe,
171 	WMI_GRP_RATE_CTRL      = 0xf,
172 	WMI_GRP_PROFILE        = 0x10,
173 	WMI_GRP_SUSPEND        = 0x11,
174 	WMI_GRP_BCN_FILTER     = 0x12,
175 	WMI_GRP_WOW            = 0x13,
176 	WMI_GRP_RTT            = 0x14,
177 	WMI_GRP_SPECTRAL       = 0x15,
178 	WMI_GRP_STATS          = 0x16,
179 	WMI_GRP_ARP_NS_OFL     = 0x17,
180 	WMI_GRP_NLO_OFL        = 0x18,
181 	WMI_GRP_GTK_OFL        = 0x19,
182 	WMI_GRP_CSA_OFL        = 0x1a,
183 	WMI_GRP_CHATTER        = 0x1b,
184 	WMI_GRP_TID_ADDBA      = 0x1c,
185 	WMI_GRP_MISC           = 0x1d,
186 	WMI_GRP_GPIO           = 0x1e,
187 	WMI_GRP_FWTEST         = 0x1f,
188 	WMI_GRP_TDLS           = 0x20,
189 	WMI_GRP_RESMGR         = 0x21,
190 	WMI_GRP_STA_SMPS       = 0x22,
191 	WMI_GRP_WLAN_HB        = 0x23,
192 	WMI_GRP_RMC            = 0x24,
193 	WMI_GRP_MHF_OFL        = 0x25,
194 	WMI_GRP_LOCATION_SCAN  = 0x26,
195 	WMI_GRP_OEM            = 0x27,
196 	WMI_GRP_NAN            = 0x28,
197 	WMI_GRP_COEX           = 0x29,
198 	WMI_GRP_OBSS_OFL       = 0x2a,
199 	WMI_GRP_LPI            = 0x2b,
200 	WMI_GRP_EXTSCAN        = 0x2c,
201 	WMI_GRP_DHCP_OFL       = 0x2d,
202 	WMI_GRP_IPA            = 0x2e,
203 	WMI_GRP_MDNS_OFL       = 0x2f,
204 	WMI_GRP_SAP_OFL        = 0x30,
205 	WMI_GRP_OCB            = 0x31,
206 	WMI_GRP_SOC            = 0x32,
207 	WMI_GRP_PKT_FILTER     = 0x33,
208 	WMI_GRP_MAWC           = 0x34,
209 	WMI_GRP_PMF_OFFLOAD    = 0x35,
210 	WMI_GRP_BPF_OFFLOAD    = 0x36,
211 	WMI_GRP_NAN_DATA       = 0x37,
212 	WMI_GRP_PROTOTYPE      = 0x38,
213 	WMI_GRP_MONITOR        = 0x39,
214 	WMI_GRP_REGULATORY     = 0x3a,
215 	WMI_GRP_HW_DATA_FILTER = 0x3b,
216 	WMI_GRP_WLM            = 0x3c,
217 	WMI_GRP_11K_OFFLOAD    = 0x3d,
218 	WMI_GRP_TWT            = 0x3e,
219 	WMI_GRP_MOTION_DET     = 0x3f,
220 	WMI_GRP_SPATIAL_REUSE  = 0x40,
221 };
222 
223 #define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1)
224 #define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1)
225 
226 #define WMI_CMD_UNSUPPORTED 0
227 
228 enum wmi_tlv_cmd_id {
229 	WMI_INIT_CMDID = 0x1,
230 	WMI_START_SCAN_CMDID = WMI_TLV_CMD(WMI_GRP_SCAN),
231 	WMI_STOP_SCAN_CMDID,
232 	WMI_SCAN_CHAN_LIST_CMDID,
233 	WMI_SCAN_SCH_PRIO_TBL_CMDID,
234 	WMI_SCAN_UPDATE_REQUEST_CMDID,
235 	WMI_SCAN_PROB_REQ_OUI_CMDID,
236 	WMI_SCAN_ADAPTIVE_DWELL_CONFIG_CMDID,
237 	WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_TLV_CMD(WMI_GRP_PDEV),
238 	WMI_PDEV_SET_CHANNEL_CMDID,
239 	WMI_PDEV_SET_PARAM_CMDID,
240 	WMI_PDEV_PKTLOG_ENABLE_CMDID,
241 	WMI_PDEV_PKTLOG_DISABLE_CMDID,
242 	WMI_PDEV_SET_WMM_PARAMS_CMDID,
243 	WMI_PDEV_SET_HT_CAP_IE_CMDID,
244 	WMI_PDEV_SET_VHT_CAP_IE_CMDID,
245 	WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
246 	WMI_PDEV_SET_QUIET_MODE_CMDID,
247 	WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
248 	WMI_PDEV_GET_TPC_CONFIG_CMDID,
249 	WMI_PDEV_SET_BASE_MACADDR_CMDID,
250 	WMI_PDEV_DUMP_CMDID,
251 	WMI_PDEV_SET_LED_CONFIG_CMDID,
252 	WMI_PDEV_GET_TEMPERATURE_CMDID,
253 	WMI_PDEV_SET_LED_FLASHING_CMDID,
254 	WMI_PDEV_SMART_ANT_ENABLE_CMDID,
255 	WMI_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
256 	WMI_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
257 	WMI_PDEV_SET_CTL_TABLE_CMDID,
258 	WMI_PDEV_SET_MIMOGAIN_TABLE_CMDID,
259 	WMI_PDEV_FIPS_CMDID,
260 	WMI_PDEV_GET_ANI_CCK_CONFIG_CMDID,
261 	WMI_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
262 	WMI_PDEV_GET_NFCAL_POWER_CMDID,
263 	WMI_PDEV_GET_TPC_CMDID,
264 	WMI_MIB_STATS_ENABLE_CMDID,
265 	WMI_PDEV_SET_PCL_CMDID,
266 	WMI_PDEV_SET_HW_MODE_CMDID,
267 	WMI_PDEV_SET_MAC_CONFIG_CMDID,
268 	WMI_PDEV_SET_ANTENNA_MODE_CMDID,
269 	WMI_SET_PERIODIC_CHANNEL_STATS_CONFIG_CMDID,
270 	WMI_PDEV_WAL_POWER_DEBUG_CMDID,
271 	WMI_PDEV_SET_REORDER_TIMEOUT_VAL_CMDID,
272 	WMI_PDEV_SET_WAKEUP_CONFIG_CMDID,
273 	WMI_PDEV_GET_ANTDIV_STATUS_CMDID,
274 	WMI_PDEV_GET_CHIP_POWER_STATS_CMDID,
275 	WMI_PDEV_SET_STATS_THRESHOLD_CMDID,
276 	WMI_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMDID,
277 	WMI_PDEV_UPDATE_PKT_ROUTING_CMDID,
278 	WMI_PDEV_CHECK_CAL_VERSION_CMDID,
279 	WMI_PDEV_SET_DIVERSITY_GAIN_CMDID,
280 	WMI_PDEV_DIV_GET_RSSI_ANTID_CMDID,
281 	WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
282 	WMI_PDEV_UPDATE_PMK_CACHE_CMDID,
283 	WMI_PDEV_UPDATE_FILS_HLP_PKT_CMDID,
284 	WMI_PDEV_UPDATE_CTLTABLE_REQUEST_CMDID,
285 	WMI_PDEV_CONFIG_VENDOR_OUI_ACTION_CMDID,
286 	WMI_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMDID,
287 	WMI_PDEV_SET_RX_FILTER_PROMISCUOUS_CMDID,
288 	WMI_PDEV_DMA_RING_CFG_REQ_CMDID,
289 	WMI_PDEV_HE_TB_ACTION_FRM_CMDID,
290 	WMI_PDEV_PKTLOG_FILTER_CMDID,
291 	WMI_PDEV_SET_RAP_CONFIG_CMDID,
292 	WMI_PDEV_DSM_FILTER_CMDID,
293 	WMI_PDEV_FRAME_INJECT_CMDID,
294 	WMI_PDEV_TBTT_OFFSET_SYNC_CMDID,
295 	WMI_PDEV_SET_SRG_BSS_COLOR_BITMAP_CMDID,
296 	WMI_PDEV_SET_SRG_PARTIAL_BSSID_BITMAP_CMDID,
297 	WMI_PDEV_SET_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID,
298 	WMI_PDEV_SET_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID,
299 	WMI_PDEV_SET_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID,
300 	WMI_PDEV_SET_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID,
301 	WMI_PDEV_GET_TPC_STATS_CMDID,
302 	WMI_PDEV_ENABLE_DURATION_BASED_TX_MODE_SELECTION_CMDID,
303 	WMI_PDEV_GET_DPD_STATUS_CMDID,
304 	WMI_PDEV_SET_BIOS_SAR_TABLE_CMDID,
305 	WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID,
306 	WMI_VDEV_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_VDEV),
307 	WMI_VDEV_DELETE_CMDID,
308 	WMI_VDEV_START_REQUEST_CMDID,
309 	WMI_VDEV_RESTART_REQUEST_CMDID,
310 	WMI_VDEV_UP_CMDID,
311 	WMI_VDEV_STOP_CMDID,
312 	WMI_VDEV_DOWN_CMDID,
313 	WMI_VDEV_SET_PARAM_CMDID,
314 	WMI_VDEV_INSTALL_KEY_CMDID,
315 	WMI_VDEV_WNM_SLEEPMODE_CMDID,
316 	WMI_VDEV_WMM_ADDTS_CMDID,
317 	WMI_VDEV_WMM_DELTS_CMDID,
318 	WMI_VDEV_SET_WMM_PARAMS_CMDID,
319 	WMI_VDEV_SET_GTX_PARAMS_CMDID,
320 	WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID,
321 	WMI_VDEV_PLMREQ_START_CMDID,
322 	WMI_VDEV_PLMREQ_STOP_CMDID,
323 	WMI_VDEV_TSF_TSTAMP_ACTION_CMDID,
324 	WMI_VDEV_SET_IE_CMDID,
325 	WMI_VDEV_RATEMASK_CMDID,
326 	WMI_VDEV_ATF_REQUEST_CMDID,
327 	WMI_VDEV_SET_DSCP_TID_MAP_CMDID,
328 	WMI_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
329 	WMI_VDEV_SET_QUIET_MODE_CMDID,
330 	WMI_VDEV_SET_CUSTOM_AGGR_SIZE_CMDID,
331 	WMI_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMDID,
332 	WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMDID,
333 	WMI_PEER_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_PEER),
334 	WMI_PEER_DELETE_CMDID,
335 	WMI_PEER_FLUSH_TIDS_CMDID,
336 	WMI_PEER_SET_PARAM_CMDID,
337 	WMI_PEER_ASSOC_CMDID,
338 	WMI_PEER_ADD_WDS_ENTRY_CMDID,
339 	WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
340 	WMI_PEER_MCAST_GROUP_CMDID,
341 	WMI_PEER_INFO_REQ_CMDID,
342 	WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID,
343 	WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID,
344 	WMI_PEER_UPDATE_WDS_ENTRY_CMDID,
345 	WMI_PEER_ADD_PROXY_STA_ENTRY_CMDID,
346 	WMI_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
347 	WMI_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
348 	WMI_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
349 	WMI_PEER_ATF_REQUEST_CMDID,
350 	WMI_PEER_BWF_REQUEST_CMDID,
351 	WMI_PEER_REORDER_QUEUE_SETUP_CMDID,
352 	WMI_PEER_REORDER_QUEUE_REMOVE_CMDID,
353 	WMI_PEER_SET_RX_BLOCKSIZE_CMDID,
354 	WMI_PEER_ANTDIV_INFO_REQ_CMDID,
355 	WMI_BCN_TX_CMDID = WMI_TLV_CMD(WMI_GRP_MGMT),
356 	WMI_PDEV_SEND_BCN_CMDID,
357 	WMI_BCN_TMPL_CMDID,
358 	WMI_BCN_FILTER_RX_CMDID,
359 	WMI_PRB_REQ_FILTER_RX_CMDID,
360 	WMI_MGMT_TX_CMDID,
361 	WMI_PRB_TMPL_CMDID,
362 	WMI_MGMT_TX_SEND_CMDID,
363 	WMI_OFFCHAN_DATA_TX_SEND_CMDID,
364 	WMI_PDEV_SEND_FD_CMDID,
365 	WMI_BCN_OFFLOAD_CTRL_CMDID,
366 	WMI_BSS_COLOR_CHANGE_ENABLE_CMDID,
367 	WMI_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMDID,
368 	WMI_FILS_DISCOVERY_TMPL_CMDID,
369 	WMI_ADDBA_CLEAR_RESP_CMDID = WMI_TLV_CMD(WMI_GRP_BA_NEG),
370 	WMI_ADDBA_SEND_CMDID,
371 	WMI_ADDBA_STATUS_CMDID,
372 	WMI_DELBA_SEND_CMDID,
373 	WMI_ADDBA_SET_RESP_CMDID,
374 	WMI_SEND_SINGLEAMSDU_CMDID,
375 	WMI_STA_POWERSAVE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_PS),
376 	WMI_STA_POWERSAVE_PARAM_CMDID,
377 	WMI_STA_MIMO_PS_MODE_CMDID,
378 	WMI_PDEV_DFS_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_DFS),
379 	WMI_PDEV_DFS_DISABLE_CMDID,
380 	WMI_DFS_PHYERR_FILTER_ENA_CMDID,
381 	WMI_DFS_PHYERR_FILTER_DIS_CMDID,
382 	WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID,
383 	WMI_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMDID,
384 	WMI_VDEV_ADFS_CH_CFG_CMDID,
385 	WMI_VDEV_ADFS_OCAC_ABORT_CMDID,
386 	WMI_ROAM_SCAN_MODE = WMI_TLV_CMD(WMI_GRP_ROAM),
387 	WMI_ROAM_SCAN_RSSI_THRESHOLD,
388 	WMI_ROAM_SCAN_PERIOD,
389 	WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
390 	WMI_ROAM_AP_PROFILE,
391 	WMI_ROAM_CHAN_LIST,
392 	WMI_ROAM_SCAN_CMD,
393 	WMI_ROAM_SYNCH_COMPLETE,
394 	WMI_ROAM_SET_RIC_REQUEST_CMDID,
395 	WMI_ROAM_INVOKE_CMDID,
396 	WMI_ROAM_FILTER_CMDID,
397 	WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID,
398 	WMI_ROAM_CONFIGURE_MAWC_CMDID,
399 	WMI_ROAM_SET_MBO_PARAM_CMDID,
400 	WMI_ROAM_PER_CONFIG_CMDID,
401 	WMI_ROAM_BTM_CONFIG_CMDID,
402 	WMI_ENABLE_FILS_CMDID,
403 	WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_TLV_CMD(WMI_GRP_OFL_SCAN),
404 	WMI_OFL_SCAN_REMOVE_AP_PROFILE,
405 	WMI_OFL_SCAN_PERIOD,
406 	WMI_P2P_DEV_SET_DEVICE_INFO = WMI_TLV_CMD(WMI_GRP_P2P),
407 	WMI_P2P_DEV_SET_DISCOVERABILITY,
408 	WMI_P2P_GO_SET_BEACON_IE,
409 	WMI_P2P_GO_SET_PROBE_RESP_IE,
410 	WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
411 	WMI_P2P_DISC_OFFLOAD_CONFIG_CMDID,
412 	WMI_P2P_DISC_OFFLOAD_APPIE_CMDID,
413 	WMI_P2P_DISC_OFFLOAD_PATTERN_CMDID,
414 	WMI_P2P_SET_OPPPS_PARAM_CMDID,
415 	WMI_P2P_LISTEN_OFFLOAD_START_CMDID,
416 	WMI_P2P_LISTEN_OFFLOAD_STOP_CMDID,
417 	WMI_AP_PS_PEER_PARAM_CMDID = WMI_TLV_CMD(WMI_GRP_AP_PS),
418 	WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
419 	WMI_AP_PS_EGAP_PARAM_CMDID,
420 	WMI_PEER_RATE_RETRY_SCHED_CMDID = WMI_TLV_CMD(WMI_GRP_RATE_CTRL),
421 	WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_TLV_CMD(WMI_GRP_PROFILE),
422 	WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
423 	WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
424 	WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
425 	WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
426 	WMI_PDEV_SUSPEND_CMDID = WMI_TLV_CMD(WMI_GRP_SUSPEND),
427 	WMI_PDEV_RESUME_CMDID,
428 	WMI_ADD_BCN_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_BCN_FILTER),
429 	WMI_RMV_BCN_FILTER_CMDID,
430 	WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_TLV_CMD(WMI_GRP_WOW),
431 	WMI_WOW_DEL_WAKE_PATTERN_CMDID,
432 	WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
433 	WMI_WOW_ENABLE_CMDID,
434 	WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
435 	WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID,
436 	WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID,
437 	WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID,
438 	WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID,
439 	WMI_D0_WOW_ENABLE_DISABLE_CMDID,
440 	WMI_EXTWOW_ENABLE_CMDID,
441 	WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID,
442 	WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID,
443 	WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID,
444 	WMI_WOW_UDP_SVC_OFLD_CMDID,
445 	WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID,
446 	WMI_WOW_SET_ACTION_WAKE_UP_CMDID,
447 	WMI_RTT_MEASREQ_CMDID = WMI_TLV_CMD(WMI_GRP_RTT),
448 	WMI_RTT_TSF_CMDID,
449 	WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_TLV_CMD(WMI_GRP_SPECTRAL),
450 	WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
451 	WMI_REQUEST_STATS_CMDID = WMI_TLV_CMD(WMI_GRP_STATS),
452 	WMI_MCC_SCHED_TRAFFIC_STATS_CMDID,
453 	WMI_REQUEST_STATS_EXT_CMDID,
454 	WMI_REQUEST_LINK_STATS_CMDID,
455 	WMI_START_LINK_STATS_CMDID,
456 	WMI_CLEAR_LINK_STATS_CMDID,
457 	WMI_GET_FW_MEM_DUMP_CMDID,
458 	WMI_DEBUG_MESG_FLUSH_CMDID,
459 	WMI_DIAG_EVENT_LOG_CONFIG_CMDID,
460 	WMI_REQUEST_WLAN_STATS_CMDID,
461 	WMI_REQUEST_RCPI_CMDID,
462 	WMI_REQUEST_PEER_STATS_INFO_CMDID,
463 	WMI_REQUEST_RADIO_CHAN_STATS_CMDID,
464 	WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_ARP_NS_OFL),
465 	WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID,
466 	WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID,
467 	WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_NLO_OFL),
468 	WMI_APFIND_CMDID,
469 	WMI_PASSPOINT_LIST_CONFIG_CMDID,
470 	WMI_NLO_CONFIGURE_MAWC_CMDID,
471 	WMI_GTK_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_GTK_OFL),
472 	WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_CSA_OFL),
473 	WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
474 	WMI_CHATTER_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_CHATTER),
475 	WMI_CHATTER_ADD_COALESCING_FILTER_CMDID,
476 	WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID,
477 	WMI_CHATTER_COALESCING_QUERY_CMDID,
478 	WMI_PEER_TID_ADDBA_CMDID = WMI_TLV_CMD(WMI_GRP_TID_ADDBA),
479 	WMI_PEER_TID_DELBA_CMDID,
480 	WMI_STA_DTIM_PS_METHOD_CMDID,
481 	WMI_STA_UAPSD_AUTO_TRIG_CMDID,
482 	WMI_STA_KEEPALIVE_CMDID,
483 	WMI_BA_REQ_SSN_CMDID,
484 	WMI_ECHO_CMDID = WMI_TLV_CMD(WMI_GRP_MISC),
485 	WMI_PDEV_UTF_CMDID,
486 	WMI_DBGLOG_CFG_CMDID,
487 	WMI_PDEV_QVIT_CMDID,
488 	WMI_PDEV_FTM_INTG_CMDID,
489 	WMI_VDEV_SET_KEEPALIVE_CMDID,
490 	WMI_VDEV_GET_KEEPALIVE_CMDID,
491 	WMI_FORCE_FW_HANG_CMDID,
492 	WMI_SET_MCASTBCAST_FILTER_CMDID,
493 	WMI_THERMAL_MGMT_CMDID,
494 	WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID,
495 	WMI_TPC_CHAINMASK_CONFIG_CMDID,
496 	WMI_SET_ANTENNA_DIVERSITY_CMDID,
497 	WMI_OCB_SET_SCHED_CMDID,
498 	WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID,
499 	WMI_LRO_CONFIG_CMDID,
500 	WMI_TRANSFER_DATA_TO_FLASH_CMDID,
501 	WMI_CONFIG_ENHANCED_MCAST_FILTER_CMDID,
502 	WMI_VDEV_WISA_CMDID,
503 	WMI_DBGLOG_TIME_STAMP_SYNC_CMDID,
504 	WMI_SET_MULTIPLE_MCAST_FILTER_CMDID,
505 	WMI_READ_DATA_FROM_FLASH_CMDID,
506 	WMI_THERM_THROT_SET_CONF_CMDID,
507 	WMI_RUNTIME_DPD_RECAL_CMDID,
508 	WMI_GET_TPC_POWER_CMDID,
509 	WMI_IDLE_TRIGGER_MONITOR_CMDID,
510 	WMI_GPIO_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_GPIO),
511 	WMI_GPIO_OUTPUT_CMDID,
512 	WMI_TXBF_CMDID,
513 	WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_FWTEST),
514 	WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID,
515 	WMI_UNIT_TEST_CMDID,
516 	WMI_FWTEST_CMDID,
517 	WMI_QBOOST_CFG_CMDID,
518 	WMI_TDLS_SET_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_TDLS),
519 	WMI_TDLS_PEER_UPDATE_CMDID,
520 	WMI_TDLS_SET_OFFCHAN_MODE_CMDID,
521 	WMI_RESMGR_ADAPTIVE_OCS_EN_DIS_CMDID = WMI_TLV_CMD(WMI_GRP_RESMGR),
522 	WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID,
523 	WMI_RESMGR_SET_CHAN_LATENCY_CMDID,
524 	WMI_STA_SMPS_FORCE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_SMPS),
525 	WMI_STA_SMPS_PARAM_CMDID,
526 	WMI_HB_SET_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_WLAN_HB),
527 	WMI_HB_SET_TCP_PARAMS_CMDID,
528 	WMI_HB_SET_TCP_PKT_FILTER_CMDID,
529 	WMI_HB_SET_UDP_PARAMS_CMDID,
530 	WMI_HB_SET_UDP_PKT_FILTER_CMDID,
531 	WMI_RMC_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_RMC),
532 	WMI_RMC_SET_ACTION_PERIOD_CMDID,
533 	WMI_RMC_CONFIG_CMDID,
534 	WMI_RMC_SET_MANUAL_LEADER_CMDID,
535 	WMI_MHF_OFFLOAD_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_MHF_OFL),
536 	WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID,
537 	WMI_BATCH_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN),
538 	WMI_BATCH_SCAN_DISABLE_CMDID,
539 	WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID,
540 	WMI_OEM_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_OEM),
541 	WMI_OEM_REQUEST_CMDID,
542 	WMI_LPI_OEM_REQ_CMDID,
543 	WMI_NAN_CMDID = WMI_TLV_CMD(WMI_GRP_NAN),
544 	WMI_MODEM_POWER_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_COEX),
545 	WMI_CHAN_AVOID_UPDATE_CMDID,
546 	WMI_COEX_CONFIG_CMDID,
547 	WMI_CHAN_AVOID_RPT_ALLOW_CMDID,
548 	WMI_COEX_GET_ANTENNA_ISOLATION_CMDID,
549 	WMI_SAR_LIMITS_CMDID,
550 	WMI_OBSS_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_OBSS_OFL),
551 	WMI_OBSS_SCAN_DISABLE_CMDID,
552 	WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID,
553 	WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_LPI),
554 	WMI_LPI_START_SCAN_CMDID,
555 	WMI_LPI_STOP_SCAN_CMDID,
556 	WMI_EXTSCAN_START_CMDID = WMI_TLV_CMD(WMI_GRP_EXTSCAN),
557 	WMI_EXTSCAN_STOP_CMDID,
558 	WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID,
559 	WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID,
560 	WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID,
561 	WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID,
562 	WMI_EXTSCAN_SET_CAPABILITIES_CMDID,
563 	WMI_EXTSCAN_GET_CAPABILITIES_CMDID,
564 	WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID,
565 	WMI_EXTSCAN_CONFIGURE_MAWC_CMDID,
566 	WMI_SET_DHCP_SERVER_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_DHCP_OFL),
567 	WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID = WMI_TLV_CMD(WMI_GRP_IPA),
568 	WMI_MDNS_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL),
569 	WMI_MDNS_SET_FQDN_CMDID,
570 	WMI_MDNS_SET_RESPONSE_CMDID,
571 	WMI_MDNS_GET_STATS_CMDID,
572 	WMI_SAP_OFL_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_SAP_OFL),
573 	WMI_SAP_SET_BLACKLIST_PARAM_CMDID,
574 	WMI_OCB_SET_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_OCB),
575 	WMI_OCB_SET_UTC_TIME_CMDID,
576 	WMI_OCB_START_TIMING_ADVERT_CMDID,
577 	WMI_OCB_STOP_TIMING_ADVERT_CMDID,
578 	WMI_OCB_GET_TSF_TIMER_CMDID,
579 	WMI_DCC_GET_STATS_CMDID,
580 	WMI_DCC_CLEAR_STATS_CMDID,
581 	WMI_DCC_UPDATE_NDL_CMDID,
582 	WMI_SOC_SET_PCL_CMDID = WMI_TLV_CMD(WMI_GRP_SOC),
583 	WMI_SOC_SET_HW_MODE_CMDID,
584 	WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID,
585 	WMI_SOC_SET_ANTENNA_MODE_CMDID,
586 	WMI_PACKET_FILTER_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_PKT_FILTER),
587 	WMI_PACKET_FILTER_ENABLE_CMDID,
588 	WMI_MAWC_SENSOR_REPORT_IND_CMDID = WMI_TLV_CMD(WMI_GRP_MAWC),
589 	WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID = WMI_TLV_CMD(WMI_GRP_PMF_OFFLOAD),
590 	WMI_BPF_GET_CAPABILITY_CMDID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD),
591 	WMI_BPF_GET_VDEV_STATS_CMDID,
592 	WMI_BPF_SET_VDEV_INSTRUCTIONS_CMDID,
593 	WMI_BPF_DEL_VDEV_INSTRUCTIONS_CMDID,
594 	WMI_BPF_SET_VDEV_ACTIVE_MODE_CMDID,
595 	WMI_MNT_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_MONITOR),
596 	WMI_SET_CURRENT_COUNTRY_CMDID = WMI_TLV_CMD(WMI_GRP_REGULATORY),
597 	WMI_11D_SCAN_START_CMDID,
598 	WMI_11D_SCAN_STOP_CMDID,
599 	WMI_SET_INIT_COUNTRY_CMDID,
600 	WMI_NDI_GET_CAP_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE),
601 	WMI_NDP_INITIATOR_REQ_CMDID,
602 	WMI_NDP_RESPONDER_REQ_CMDID,
603 	WMI_NDP_END_REQ_CMDID,
604 	WMI_HW_DATA_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_HW_DATA_FILTER),
605 	WMI_TWT_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_TWT),
606 	WMI_TWT_DISABLE_CMDID,
607 	WMI_TWT_ADD_DIALOG_CMDID,
608 	WMI_TWT_DEL_DIALOG_CMDID,
609 	WMI_TWT_PAUSE_DIALOG_CMDID,
610 	WMI_TWT_RESUME_DIALOG_CMDID,
611 	WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID =
612 				WMI_TLV_CMD(WMI_GRP_SPATIAL_REUSE),
613 	WMI_PDEV_OBSS_PD_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMDID,
614 };
615 
616 enum wmi_tlv_event_id {
617 	WMI_SERVICE_READY_EVENTID = 0x1,
618 	WMI_READY_EVENTID,
619 	WMI_SERVICE_AVAILABLE_EVENTID,
620 	WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN),
621 	WMI_PDEV_TPC_CONFIG_EVENTID = WMI_TLV_CMD(WMI_GRP_PDEV),
622 	WMI_CHAN_INFO_EVENTID,
623 	WMI_PHYERR_EVENTID,
624 	WMI_PDEV_DUMP_EVENTID,
625 	WMI_TX_PAUSE_EVENTID,
626 	WMI_DFS_RADAR_EVENTID,
627 	WMI_PDEV_L1SS_TRACK_EVENTID,
628 	WMI_PDEV_TEMPERATURE_EVENTID,
629 	WMI_SERVICE_READY_EXT_EVENTID,
630 	WMI_PDEV_FIPS_EVENTID,
631 	WMI_PDEV_CHANNEL_HOPPING_EVENTID,
632 	WMI_PDEV_ANI_CCK_LEVEL_EVENTID,
633 	WMI_PDEV_ANI_OFDM_LEVEL_EVENTID,
634 	WMI_PDEV_TPC_EVENTID,
635 	WMI_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID,
636 	WMI_PDEV_SET_HW_MODE_RESP_EVENTID,
637 	WMI_PDEV_HW_MODE_TRANSITION_EVENTID,
638 	WMI_PDEV_SET_MAC_CONFIG_RESP_EVENTID,
639 	WMI_PDEV_ANTDIV_STATUS_EVENTID,
640 	WMI_PDEV_CHIP_POWER_STATS_EVENTID,
641 	WMI_PDEV_CHIP_POWER_SAVE_FAILURE_DETECTED_EVENTID,
642 	WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID,
643 	WMI_PDEV_CHECK_CAL_VERSION_EVENTID,
644 	WMI_PDEV_DIV_RSSI_ANTID_EVENTID,
645 	WMI_PDEV_BSS_CHAN_INFO_EVENTID,
646 	WMI_PDEV_UPDATE_CTLTABLE_EVENTID,
647 	WMI_PDEV_DMA_RING_CFG_RSP_EVENTID,
648 	WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID,
649 	WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID,
650 	WMI_PDEV_CSC_SWITCH_COUNT_STATUS_EVENTID,
651 	WMI_PDEV_COLD_BOOT_CAL_DATA_EVENTID,
652 	WMI_PDEV_RAP_INFO_EVENTID,
653 	WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENTID,
654 	WMI_SERVICE_READY_EXT2_EVENTID,
655 	WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV),
656 	WMI_VDEV_STOPPED_EVENTID,
657 	WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
658 	WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID,
659 	WMI_VDEV_TSF_REPORT_EVENTID,
660 	WMI_VDEV_DELETE_RESP_EVENTID,
661 	WMI_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENTID,
662 	WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENTID,
663 	WMI_PEER_STA_KICKOUT_EVENTID = WMI_TLV_CMD(WMI_GRP_PEER),
664 	WMI_PEER_INFO_EVENTID,
665 	WMI_PEER_TX_FAIL_CNT_THR_EVENTID,
666 	WMI_PEER_ESTIMATED_LINKSPEED_EVENTID,
667 	WMI_PEER_STATE_EVENTID,
668 	WMI_PEER_ASSOC_CONF_EVENTID,
669 	WMI_PEER_DELETE_RESP_EVENTID,
670 	WMI_PEER_RATECODE_LIST_EVENTID,
671 	WMI_WDS_PEER_EVENTID,
672 	WMI_PEER_STA_PS_STATECHG_EVENTID,
673 	WMI_PEER_ANTDIV_INFO_EVENTID,
674 	WMI_PEER_RESERVED0_EVENTID,
675 	WMI_PEER_RESERVED1_EVENTID,
676 	WMI_PEER_RESERVED2_EVENTID,
677 	WMI_PEER_RESERVED3_EVENTID,
678 	WMI_PEER_RESERVED4_EVENTID,
679 	WMI_PEER_RESERVED5_EVENTID,
680 	WMI_PEER_RESERVED6_EVENTID,
681 	WMI_PEER_RESERVED7_EVENTID,
682 	WMI_PEER_RESERVED8_EVENTID,
683 	WMI_PEER_RESERVED9_EVENTID,
684 	WMI_PEER_RESERVED10_EVENTID,
685 	WMI_PEER_OPER_MODE_CHANGE_EVENTID,
686 	WMI_PEER_TX_PN_RESPONSE_EVENTID,
687 	WMI_PEER_CFR_CAPTURE_EVENTID,
688 	WMI_PEER_CREATE_CONF_EVENTID,
689 	WMI_MGMT_RX_EVENTID = WMI_TLV_CMD(WMI_GRP_MGMT),
690 	WMI_HOST_SWBA_EVENTID,
691 	WMI_TBTTOFFSET_UPDATE_EVENTID,
692 	WMI_OFFLOAD_BCN_TX_STATUS_EVENTID,
693 	WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID,
694 	WMI_MGMT_TX_COMPLETION_EVENTID,
695 	WMI_MGMT_TX_BUNDLE_COMPLETION_EVENTID,
696 	WMI_TBTTOFFSET_EXT_UPDATE_EVENTID,
697 	WMI_OFFCHAN_DATA_TX_COMPLETION_EVENTID,
698 	WMI_HOST_FILS_DISCOVERY_EVENTID,
699 	WMI_TX_DELBA_COMPLETE_EVENTID = WMI_TLV_CMD(WMI_GRP_BA_NEG),
700 	WMI_TX_ADDBA_COMPLETE_EVENTID,
701 	WMI_BA_RSP_SSN_EVENTID,
702 	WMI_AGGR_STATE_TRIG_EVENTID,
703 	WMI_ROAM_EVENTID = WMI_TLV_CMD(WMI_GRP_ROAM),
704 	WMI_PROFILE_MATCH,
705 	WMI_ROAM_SYNCH_EVENTID,
706 	WMI_P2P_DISC_EVENTID = WMI_TLV_CMD(WMI_GRP_P2P),
707 	WMI_P2P_NOA_EVENTID,
708 	WMI_P2P_LISTEN_OFFLOAD_STOPPED_EVENTID,
709 	WMI_AP_PS_EGAP_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_AP_PS),
710 	WMI_PDEV_RESUME_EVENTID = WMI_TLV_CMD(WMI_GRP_SUSPEND),
711 	WMI_WOW_WAKEUP_HOST_EVENTID = WMI_TLV_CMD(WMI_GRP_WOW),
712 	WMI_D0_WOW_DISABLE_ACK_EVENTID,
713 	WMI_WOW_INITIAL_WAKEUP_EVENTID,
714 	WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_TLV_CMD(WMI_GRP_RTT),
715 	WMI_TSF_MEASUREMENT_REPORT_EVENTID,
716 	WMI_RTT_ERROR_REPORT_EVENTID,
717 	WMI_STATS_EXT_EVENTID = WMI_TLV_CMD(WMI_GRP_STATS),
718 	WMI_IFACE_LINK_STATS_EVENTID,
719 	WMI_PEER_LINK_STATS_EVENTID,
720 	WMI_RADIO_LINK_STATS_EVENTID,
721 	WMI_UPDATE_FW_MEM_DUMP_EVENTID,
722 	WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID,
723 	WMI_INST_RSSI_STATS_EVENTID,
724 	WMI_RADIO_TX_POWER_LEVEL_STATS_EVENTID,
725 	WMI_REPORT_STATS_EVENTID,
726 	WMI_UPDATE_RCPI_EVENTID,
727 	WMI_PEER_STATS_INFO_EVENTID,
728 	WMI_RADIO_CHAN_STATS_EVENTID,
729 	WMI_NLO_MATCH_EVENTID = WMI_TLV_CMD(WMI_GRP_NLO_OFL),
730 	WMI_NLO_SCAN_COMPLETE_EVENTID,
731 	WMI_APFIND_EVENTID,
732 	WMI_PASSPOINT_MATCH_EVENTID,
733 	WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_TLV_CMD(WMI_GRP_GTK_OFL),
734 	WMI_GTK_REKEY_FAIL_EVENTID,
735 	WMI_CSA_HANDLING_EVENTID = WMI_TLV_CMD(WMI_GRP_CSA_OFL),
736 	WMI_CHATTER_PC_QUERY_EVENTID = WMI_TLV_CMD(WMI_GRP_CHATTER),
737 	WMI_PDEV_DFS_RADAR_DETECTION_EVENTID = WMI_TLV_CMD(WMI_GRP_DFS),
738 	WMI_VDEV_DFS_CAC_COMPLETE_EVENTID,
739 	WMI_VDEV_ADFS_OCAC_COMPLETE_EVENTID,
740 	WMI_ECHO_EVENTID = WMI_TLV_CMD(WMI_GRP_MISC),
741 	WMI_PDEV_UTF_EVENTID,
742 	WMI_DEBUG_MESG_EVENTID,
743 	WMI_UPDATE_STATS_EVENTID,
744 	WMI_DEBUG_PRINT_EVENTID,
745 	WMI_DCS_INTERFERENCE_EVENTID,
746 	WMI_PDEV_QVIT_EVENTID,
747 	WMI_WLAN_PROFILE_DATA_EVENTID,
748 	WMI_PDEV_FTM_INTG_EVENTID,
749 	WMI_WLAN_FREQ_AVOID_EVENTID,
750 	WMI_VDEV_GET_KEEPALIVE_EVENTID,
751 	WMI_THERMAL_MGMT_EVENTID,
752 	WMI_DIAG_DATA_CONTAINER_EVENTID,
753 	WMI_HOST_AUTO_SHUTDOWN_EVENTID,
754 	WMI_UPDATE_WHAL_MIB_STATS_EVENTID,
755 	WMI_UPDATE_VDEV_RATE_STATS_EVENTID,
756 	WMI_DIAG_EVENTID,
757 	WMI_OCB_SET_SCHED_EVENTID,
758 	WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID,
759 	WMI_RSSI_BREACH_EVENTID,
760 	WMI_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENTID,
761 	WMI_PDEV_UTF_SCPC_EVENTID,
762 	WMI_READ_DATA_FROM_FLASH_EVENTID,
763 	WMI_REPORT_RX_AGGR_FAILURE_EVENTID,
764 	WMI_PKGID_EVENTID,
765 	WMI_GPIO_INPUT_EVENTID = WMI_TLV_CMD(WMI_GRP_GPIO),
766 	WMI_UPLOADH_EVENTID,
767 	WMI_CAPTUREH_EVENTID,
768 	WMI_RFKILL_STATE_CHANGE_EVENTID,
769 	WMI_TDLS_PEER_EVENTID = WMI_TLV_CMD(WMI_GRP_TDLS),
770 	WMI_STA_SMPS_FORCE_MODE_COMPL_EVENTID = WMI_TLV_CMD(WMI_GRP_STA_SMPS),
771 	WMI_BATCH_SCAN_ENABLED_EVENTID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN),
772 	WMI_BATCH_SCAN_RESULT_EVENTID,
773 	WMI_OEM_CAPABILITY_EVENTID = WMI_TLV_CMD(WMI_GRP_OEM),
774 	WMI_OEM_MEASUREMENT_REPORT_EVENTID,
775 	WMI_OEM_ERROR_REPORT_EVENTID,
776 	WMI_OEM_RESPONSE_EVENTID,
777 	WMI_NAN_EVENTID = WMI_TLV_CMD(WMI_GRP_NAN),
778 	WMI_NAN_DISC_IFACE_CREATED_EVENTID,
779 	WMI_NAN_DISC_IFACE_DELETED_EVENTID,
780 	WMI_NAN_STARTED_CLUSTER_EVENTID,
781 	WMI_NAN_JOINED_CLUSTER_EVENTID,
782 	WMI_COEX_REPORT_ANTENNA_ISOLATION_EVENTID = WMI_TLV_CMD(WMI_GRP_COEX),
783 	WMI_LPI_RESULT_EVENTID = WMI_TLV_CMD(WMI_GRP_LPI),
784 	WMI_LPI_STATUS_EVENTID,
785 	WMI_LPI_HANDOFF_EVENTID,
786 	WMI_EXTSCAN_START_STOP_EVENTID = WMI_TLV_CMD(WMI_GRP_EXTSCAN),
787 	WMI_EXTSCAN_OPERATION_EVENTID,
788 	WMI_EXTSCAN_TABLE_USAGE_EVENTID,
789 	WMI_EXTSCAN_CACHED_RESULTS_EVENTID,
790 	WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID,
791 	WMI_EXTSCAN_HOTLIST_MATCH_EVENTID,
792 	WMI_EXTSCAN_CAPABILITIES_EVENTID,
793 	WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID,
794 	WMI_MDNS_STATS_EVENTID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL),
795 	WMI_SAP_OFL_ADD_STA_EVENTID = WMI_TLV_CMD(WMI_GRP_SAP_OFL),
796 	WMI_SAP_OFL_DEL_STA_EVENTID,
797 	WMI_OBSS_COLOR_COLLISION_DETECTION_EVENTID =
798 		WMI_EVT_GRP_START_ID(WMI_GRP_OBSS_OFL),
799 	WMI_OCB_SET_CONFIG_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_OCB),
800 	WMI_OCB_GET_TSF_TIMER_RESP_EVENTID,
801 	WMI_DCC_GET_STATS_RESP_EVENTID,
802 	WMI_DCC_UPDATE_NDL_RESP_EVENTID,
803 	WMI_DCC_STATS_EVENTID,
804 	WMI_SOC_SET_HW_MODE_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_SOC),
805 	WMI_SOC_HW_MODE_TRANSITION_EVENTID,
806 	WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID,
807 	WMI_MAWC_ENABLE_SENSOR_EVENTID = WMI_TLV_CMD(WMI_GRP_MAWC),
808 	WMI_BPF_CAPABILIY_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD),
809 	WMI_BPF_VDEV_STATS_INFO_EVENTID,
810 	WMI_RMC_NEW_LEADER_EVENTID = WMI_TLV_CMD(WMI_GRP_RMC),
811 	WMI_REG_CHAN_LIST_CC_EVENTID = WMI_TLV_CMD(WMI_GRP_REGULATORY),
812 	WMI_11D_NEW_COUNTRY_EVENTID,
813 	WMI_REG_CHAN_LIST_CC_EXT_EVENTID,
814 	WMI_NDI_CAP_RSP_EVENTID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE),
815 	WMI_NDP_INITIATOR_RSP_EVENTID,
816 	WMI_NDP_RESPONDER_RSP_EVENTID,
817 	WMI_NDP_END_RSP_EVENTID,
818 	WMI_NDP_INDICATION_EVENTID,
819 	WMI_NDP_CONFIRM_EVENTID,
820 	WMI_NDP_END_INDICATION_EVENTID,
821 
822 	WMI_TWT_ENABLE_EVENTID = WMI_TLV_CMD(WMI_GRP_TWT),
823 	WMI_TWT_DISABLE_EVENTID,
824 	WMI_TWT_ADD_DIALOG_EVENTID,
825 	WMI_TWT_DEL_DIALOG_EVENTID,
826 	WMI_TWT_PAUSE_DIALOG_EVENTID,
827 	WMI_TWT_RESUME_DIALOG_EVENTID,
828 };
829 
830 enum wmi_tlv_pdev_param {
831 	WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
832 	WMI_PDEV_PARAM_RX_CHAIN_MASK,
833 	WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
834 	WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
835 	WMI_PDEV_PARAM_TXPOWER_SCALE,
836 	WMI_PDEV_PARAM_BEACON_GEN_MODE,
837 	WMI_PDEV_PARAM_BEACON_TX_MODE,
838 	WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
839 	WMI_PDEV_PARAM_PROTECTION_MODE,
840 	WMI_PDEV_PARAM_DYNAMIC_BW,
841 	WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
842 	WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
843 	WMI_PDEV_PARAM_STA_KICKOUT_TH,
844 	WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
845 	WMI_PDEV_PARAM_LTR_ENABLE,
846 	WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
847 	WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
848 	WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
849 	WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
850 	WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
851 	WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
852 	WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
853 	WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
854 	WMI_PDEV_PARAM_L1SS_ENABLE,
855 	WMI_PDEV_PARAM_DSLEEP_ENABLE,
856 	WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
857 	WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
858 	WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
859 	WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
860 	WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
861 	WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
862 	WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
863 	WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
864 	WMI_PDEV_PARAM_PMF_QOS,
865 	WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
866 	WMI_PDEV_PARAM_DCS,
867 	WMI_PDEV_PARAM_ANI_ENABLE,
868 	WMI_PDEV_PARAM_ANI_POLL_PERIOD,
869 	WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
870 	WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
871 	WMI_PDEV_PARAM_ANI_CCK_LEVEL,
872 	WMI_PDEV_PARAM_DYNTXCHAIN,
873 	WMI_PDEV_PARAM_PROXY_STA,
874 	WMI_PDEV_PARAM_IDLE_PS_CONFIG,
875 	WMI_PDEV_PARAM_POWER_GATING_SLEEP,
876 	WMI_PDEV_PARAM_RFKILL_ENABLE,
877 	WMI_PDEV_PARAM_BURST_DUR,
878 	WMI_PDEV_PARAM_BURST_ENABLE,
879 	WMI_PDEV_PARAM_HW_RFKILL_CONFIG,
880 	WMI_PDEV_PARAM_LOW_POWER_RF_ENABLE,
881 	WMI_PDEV_PARAM_L1SS_TRACK,
882 	WMI_PDEV_PARAM_HYST_EN,
883 	WMI_PDEV_PARAM_POWER_COLLAPSE_ENABLE,
884 	WMI_PDEV_PARAM_LED_SYS_STATE,
885 	WMI_PDEV_PARAM_LED_ENABLE,
886 	WMI_PDEV_PARAM_AUDIO_OVER_WLAN_LATENCY,
887 	WMI_PDEV_PARAM_AUDIO_OVER_WLAN_ENABLE,
888 	WMI_PDEV_PARAM_WHAL_MIB_STATS_UPDATE_ENABLE,
889 	WMI_PDEV_PARAM_VDEV_RATE_STATS_UPDATE_PERIOD,
890 	WMI_PDEV_PARAM_CTS_CBW,
891 	WMI_PDEV_PARAM_WNTS_CONFIG,
892 	WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_ENABLE,
893 	WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_MIN_SLEEP_SLOP,
894 	WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_INC_DEC_STEP,
895 	WMI_PDEV_PARAM_EARLY_RX_FIX_SLEEP_SLOP,
896 	WMI_PDEV_PARAM_BMISS_BASED_ADAPTIVE_BTO_ENABLE,
897 	WMI_PDEV_PARAM_BMISS_BTO_MIN_BCN_TIMEOUT,
898 	WMI_PDEV_PARAM_BMISS_BTO_INC_DEC_STEP,
899 	WMI_PDEV_PARAM_BTO_FIX_BCN_TIMEOUT,
900 	WMI_PDEV_PARAM_CE_BASED_ADAPTIVE_BTO_ENABLE,
901 	WMI_PDEV_PARAM_CE_BTO_COMBO_CE_VALUE,
902 	WMI_PDEV_PARAM_TX_CHAIN_MASK_2G,
903 	WMI_PDEV_PARAM_RX_CHAIN_MASK_2G,
904 	WMI_PDEV_PARAM_TX_CHAIN_MASK_5G,
905 	WMI_PDEV_PARAM_RX_CHAIN_MASK_5G,
906 	WMI_PDEV_PARAM_TX_CHAIN_MASK_CCK,
907 	WMI_PDEV_PARAM_TX_CHAIN_MASK_1SS,
908 	WMI_PDEV_PARAM_CTS2SELF_FOR_P2P_GO_CONFIG,
909 	WMI_PDEV_PARAM_TXPOWER_DECR_DB,
910 	WMI_PDEV_PARAM_AGGR_BURST,
911 	WMI_PDEV_PARAM_RX_DECAP_MODE,
912 	WMI_PDEV_PARAM_FAST_CHANNEL_RESET,
913 	WMI_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
914 	WMI_PDEV_PARAM_ANTENNA_GAIN,
915 	WMI_PDEV_PARAM_RX_FILTER,
916 	WMI_PDEV_SET_MCAST_TO_UCAST_TID,
917 	WMI_PDEV_PARAM_PROXY_STA_MODE,
918 	WMI_PDEV_PARAM_SET_MCAST2UCAST_MODE,
919 	WMI_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
920 	WMI_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
921 	WMI_PDEV_PEER_STA_PS_STATECHG_ENABLE,
922 	WMI_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
923 	WMI_PDEV_PARAM_BLOCK_INTERBSS,
924 	WMI_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
925 	WMI_PDEV_PARAM_SET_MSDU_TTL_CMDID,
926 	WMI_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
927 	WMI_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
928 	WMI_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
929 	WMI_PDEV_PARAM_SET_BURST_MODE_CMDID,
930 	WMI_PDEV_PARAM_EN_STATS,
931 	WMI_PDEV_PARAM_MU_GROUP_POLICY,
932 	WMI_PDEV_PARAM_NOISE_DETECTION,
933 	WMI_PDEV_PARAM_NOISE_THRESHOLD,
934 	WMI_PDEV_PARAM_DPD_ENABLE,
935 	WMI_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
936 	WMI_PDEV_PARAM_ATF_STRICT_SCH,
937 	WMI_PDEV_PARAM_ATF_SCHED_DURATION,
938 	WMI_PDEV_PARAM_ANT_PLZN,
939 	WMI_PDEV_PARAM_MGMT_RETRY_LIMIT,
940 	WMI_PDEV_PARAM_SENSITIVITY_LEVEL,
941 	WMI_PDEV_PARAM_SIGNED_TXPOWER_2G,
942 	WMI_PDEV_PARAM_SIGNED_TXPOWER_5G,
943 	WMI_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
944 	WMI_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
945 	WMI_PDEV_PARAM_CCA_THRESHOLD,
946 	WMI_PDEV_PARAM_RTS_FIXED_RATE,
947 	WMI_PDEV_PARAM_PDEV_RESET,
948 	WMI_PDEV_PARAM_WAPI_MBSSID_OFFSET,
949 	WMI_PDEV_PARAM_ARP_DBG_SRCADDR,
950 	WMI_PDEV_PARAM_ARP_DBG_DSTADDR,
951 	WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCH,
952 	WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR,
953 	WMI_PDEV_PARAM_CUST_TXPOWER_SCALE,
954 	WMI_PDEV_PARAM_ATF_DYNAMIC_ENABLE,
955 	WMI_PDEV_PARAM_CTRL_RETRY_LIMIT,
956 	WMI_PDEV_PARAM_PROPAGATION_DELAY,
957 	WMI_PDEV_PARAM_ENA_ANT_DIV,
958 	WMI_PDEV_PARAM_FORCE_CHAIN_ANT,
959 	WMI_PDEV_PARAM_ANT_DIV_SELFTEST,
960 	WMI_PDEV_PARAM_ANT_DIV_SELFTEST_INTVL,
961 	WMI_PDEV_PARAM_STATS_OBSERVATION_PERIOD,
962 	WMI_PDEV_PARAM_TX_PPDU_DELAY_BIN_SIZE_MS,
963 	WMI_PDEV_PARAM_TX_PPDU_DELAY_ARRAY_LEN,
964 	WMI_PDEV_PARAM_TX_MPDU_AGGR_ARRAY_LEN,
965 	WMI_PDEV_PARAM_RX_MPDU_AGGR_ARRAY_LEN,
966 	WMI_PDEV_PARAM_TX_SCH_DELAY,
967 	WMI_PDEV_PARAM_ENABLE_RTS_SIFS_BURSTING,
968 	WMI_PDEV_PARAM_MAX_MPDUS_IN_AMPDU,
969 	WMI_PDEV_PARAM_PEER_STATS_INFO_ENABLE,
970 	WMI_PDEV_PARAM_FAST_PWR_TRANSITION,
971 	WMI_PDEV_PARAM_RADIO_CHAN_STATS_ENABLE,
972 	WMI_PDEV_PARAM_RADIO_DIAGNOSIS_ENABLE,
973 	WMI_PDEV_PARAM_MESH_MCAST_ENABLE,
974 	WMI_PDEV_PARAM_SET_CMD_OBSS_PD_THRESHOLD = 0xbc,
975 	WMI_PDEV_PARAM_SET_CMD_OBSS_PD_PER_AC = 0xbe,
976 	WMI_PDEV_PARAM_ENABLE_SR_PROHIBIT = 0xc6,
977 };
978 
979 enum wmi_tlv_vdev_param {
980 	WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1,
981 	WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
982 	WMI_VDEV_PARAM_BEACON_INTERVAL,
983 	WMI_VDEV_PARAM_LISTEN_INTERVAL,
984 	WMI_VDEV_PARAM_MULTICAST_RATE,
985 	WMI_VDEV_PARAM_MGMT_TX_RATE,
986 	WMI_VDEV_PARAM_SLOT_TIME,
987 	WMI_VDEV_PARAM_PREAMBLE,
988 	WMI_VDEV_PARAM_SWBA_TIME,
989 	WMI_VDEV_STATS_UPDATE_PERIOD,
990 	WMI_VDEV_PWRSAVE_AGEOUT_TIME,
991 	WMI_VDEV_HOST_SWBA_INTERVAL,
992 	WMI_VDEV_PARAM_DTIM_PERIOD,
993 	WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
994 	WMI_VDEV_PARAM_WDS,
995 	WMI_VDEV_PARAM_ATIM_WINDOW,
996 	WMI_VDEV_PARAM_BMISS_COUNT_MAX,
997 	WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
998 	WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
999 	WMI_VDEV_PARAM_FEATURE_WMM,
1000 	WMI_VDEV_PARAM_CHWIDTH,
1001 	WMI_VDEV_PARAM_CHEXTOFFSET,
1002 	WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
1003 	WMI_VDEV_PARAM_STA_QUICKKICKOUT,
1004 	WMI_VDEV_PARAM_MGMT_RATE,
1005 	WMI_VDEV_PARAM_PROTECTION_MODE,
1006 	WMI_VDEV_PARAM_FIXED_RATE,
1007 	WMI_VDEV_PARAM_SGI,
1008 	WMI_VDEV_PARAM_LDPC,
1009 	WMI_VDEV_PARAM_TX_STBC,
1010 	WMI_VDEV_PARAM_RX_STBC,
1011 	WMI_VDEV_PARAM_INTRA_BSS_FWD,
1012 	WMI_VDEV_PARAM_DEF_KEYID,
1013 	WMI_VDEV_PARAM_NSS,
1014 	WMI_VDEV_PARAM_BCAST_DATA_RATE,
1015 	WMI_VDEV_PARAM_MCAST_DATA_RATE,
1016 	WMI_VDEV_PARAM_MCAST_INDICATE,
1017 	WMI_VDEV_PARAM_DHCP_INDICATE,
1018 	WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
1019 	WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
1020 	WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
1021 	WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
1022 	WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
1023 	WMI_VDEV_PARAM_ENABLE_RTSCTS,
1024 	WMI_VDEV_PARAM_TXBF,
1025 	WMI_VDEV_PARAM_PACKET_POWERSAVE,
1026 	WMI_VDEV_PARAM_DROP_UNENCRY,
1027 	WMI_VDEV_PARAM_TX_ENCAP_TYPE,
1028 	WMI_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
1029 	WMI_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
1030 	WMI_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
1031 	WMI_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
1032 	WMI_VDEV_PARAM_EARLY_RX_SLOP_STEP,
1033 	WMI_VDEV_PARAM_EARLY_RX_INIT_SLOP,
1034 	WMI_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
1035 	WMI_VDEV_PARAM_TX_PWRLIMIT,
1036 	WMI_VDEV_PARAM_SNR_NUM_FOR_CAL,
1037 	WMI_VDEV_PARAM_ROAM_FW_OFFLOAD,
1038 	WMI_VDEV_PARAM_ENABLE_RMC,
1039 	WMI_VDEV_PARAM_IBSS_MAX_BCN_LOST_MS,
1040 	WMI_VDEV_PARAM_MAX_RATE,
1041 	WMI_VDEV_PARAM_EARLY_RX_DRIFT_SAMPLE,
1042 	WMI_VDEV_PARAM_SET_IBSS_TX_FAIL_CNT_THR,
1043 	WMI_VDEV_PARAM_EBT_RESYNC_TIMEOUT,
1044 	WMI_VDEV_PARAM_AGGR_TRIG_EVENT_ENABLE,
1045 	WMI_VDEV_PARAM_IS_IBSS_POWER_SAVE_ALLOWED,
1046 	WMI_VDEV_PARAM_IS_POWER_COLLAPSE_ALLOWED,
1047 	WMI_VDEV_PARAM_IS_AWAKE_ON_TXRX_ENABLED,
1048 	WMI_VDEV_PARAM_INACTIVITY_CNT,
1049 	WMI_VDEV_PARAM_TXSP_END_INACTIVITY_TIME_MS,
1050 	WMI_VDEV_PARAM_DTIM_POLICY,
1051 	WMI_VDEV_PARAM_IBSS_PS_WARMUP_TIME_SECS,
1052 	WMI_VDEV_PARAM_IBSS_PS_1RX_CHAIN_IN_ATIM_WINDOW_ENABLE,
1053 	WMI_VDEV_PARAM_RX_LEAK_WINDOW,
1054 	WMI_VDEV_PARAM_STATS_AVG_FACTOR,
1055 	WMI_VDEV_PARAM_DISCONNECT_TH,
1056 	WMI_VDEV_PARAM_RTSCTS_RATE,
1057 	WMI_VDEV_PARAM_MCC_RTSCTS_PROTECTION_ENABLE,
1058 	WMI_VDEV_PARAM_MCC_BROADCAST_PROBE_ENABLE,
1059 	WMI_VDEV_PARAM_TXPOWER_SCALE,
1060 	WMI_VDEV_PARAM_TXPOWER_SCALE_DECR_DB,
1061 	WMI_VDEV_PARAM_MCAST2UCAST_SET,
1062 	WMI_VDEV_PARAM_RC_NUM_RETRIES,
1063 	WMI_VDEV_PARAM_CABQ_MAXDUR,
1064 	WMI_VDEV_PARAM_MFPTEST_SET,
1065 	WMI_VDEV_PARAM_RTS_FIXED_RATE,
1066 	WMI_VDEV_PARAM_VHT_SGIMASK,
1067 	WMI_VDEV_PARAM_VHT80_RATEMASK,
1068 	WMI_VDEV_PARAM_PROXY_STA,
1069 	WMI_VDEV_PARAM_VIRTUAL_CELL_MODE,
1070 	WMI_VDEV_PARAM_RX_DECAP_TYPE,
1071 	WMI_VDEV_PARAM_BW_NSS_RATEMASK,
1072 	WMI_VDEV_PARAM_SENSOR_AP,
1073 	WMI_VDEV_PARAM_BEACON_RATE,
1074 	WMI_VDEV_PARAM_DTIM_ENABLE_CTS,
1075 	WMI_VDEV_PARAM_STA_KICKOUT,
1076 	WMI_VDEV_PARAM_CAPABILITIES,
1077 	WMI_VDEV_PARAM_TSF_INCREMENT,
1078 	WMI_VDEV_PARAM_AMPDU_PER_AC,
1079 	WMI_VDEV_PARAM_RX_FILTER,
1080 	WMI_VDEV_PARAM_MGMT_TX_POWER,
1081 	WMI_VDEV_PARAM_NON_AGG_SW_RETRY_TH,
1082 	WMI_VDEV_PARAM_AGG_SW_RETRY_TH,
1083 	WMI_VDEV_PARAM_DISABLE_DYN_BW_RTS,
1084 	WMI_VDEV_PARAM_ATF_SSID_SCHED_POLICY,
1085 	WMI_VDEV_PARAM_HE_DCM,
1086 	WMI_VDEV_PARAM_HE_RANGE_EXT,
1087 	WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE,
1088 	WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME,
1089 	WMI_VDEV_PARAM_HE_LTF = 0x74,
1090 	WMI_VDEV_PARAM_ENABLE_DISABLE_RTT_RESPONDER_ROLE = 0x7d,
1091 	WMI_VDEV_PARAM_BA_MODE = 0x7e,
1092 	WMI_VDEV_PARAM_AUTORATE_MISC_CFG = 0x80,
1093 	WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87,
1094 	WMI_VDEV_PARAM_6GHZ_PARAMS = 0x99,
1095 	WMI_VDEV_PARAM_PROTOTYPE = 0x8000,
1096 	WMI_VDEV_PARAM_BSS_COLOR,
1097 	WMI_VDEV_PARAM_SET_HEMU_MODE,
1098 	WMI_VDEV_PARAM_HEOPS_0_31 = 0x8003,
1099 };
1100 
1101 enum wmi_tlv_peer_flags {
1102 	WMI_TLV_PEER_AUTH = 0x00000001,
1103 	WMI_TLV_PEER_QOS = 0x00000002,
1104 	WMI_TLV_PEER_NEED_PTK_4_WAY = 0x00000004,
1105 	WMI_TLV_PEER_NEED_GTK_2_WAY = 0x00000010,
1106 	WMI_TLV_PEER_APSD = 0x00000800,
1107 	WMI_TLV_PEER_HT = 0x00001000,
1108 	WMI_TLV_PEER_40MHZ = 0x00002000,
1109 	WMI_TLV_PEER_STBC = 0x00008000,
1110 	WMI_TLV_PEER_LDPC = 0x00010000,
1111 	WMI_TLV_PEER_DYN_MIMOPS = 0x00020000,
1112 	WMI_TLV_PEER_STATIC_MIMOPS = 0x00040000,
1113 	WMI_TLV_PEER_SPATIAL_MUX = 0x00200000,
1114 	WMI_TLV_PEER_VHT = 0x02000000,
1115 	WMI_TLV_PEER_80MHZ = 0x04000000,
1116 	WMI_TLV_PEER_PMF = 0x08000000,
1117 	WMI_PEER_IS_P2P_CAPABLE = 0x20000000,
1118 	WMI_PEER_160MHZ         = 0x40000000,
1119 	WMI_PEER_SAFEMODE_EN    = 0x80000000,
1120 
1121 };
1122 
1123 /** Enum list of TLV Tags for each parameter structure type. */
1124 enum wmi_tlv_tag {
1125 	WMI_TAG_LAST_RESERVED = 15,
1126 	WMI_TAG_FIRST_ARRAY_ENUM,
1127 	WMI_TAG_ARRAY_UINT32 = WMI_TAG_FIRST_ARRAY_ENUM,
1128 	WMI_TAG_ARRAY_BYTE,
1129 	WMI_TAG_ARRAY_STRUCT,
1130 	WMI_TAG_ARRAY_FIXED_STRUCT,
1131 	WMI_TAG_LAST_ARRAY_ENUM = 31,
1132 	WMI_TAG_SERVICE_READY_EVENT,
1133 	WMI_TAG_HAL_REG_CAPABILITIES,
1134 	WMI_TAG_WLAN_HOST_MEM_REQ,
1135 	WMI_TAG_READY_EVENT,
1136 	WMI_TAG_SCAN_EVENT,
1137 	WMI_TAG_PDEV_TPC_CONFIG_EVENT,
1138 	WMI_TAG_CHAN_INFO_EVENT,
1139 	WMI_TAG_COMB_PHYERR_RX_HDR,
1140 	WMI_TAG_VDEV_START_RESPONSE_EVENT,
1141 	WMI_TAG_VDEV_STOPPED_EVENT,
1142 	WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT,
1143 	WMI_TAG_PEER_STA_KICKOUT_EVENT,
1144 	WMI_TAG_MGMT_RX_HDR,
1145 	WMI_TAG_TBTT_OFFSET_EVENT,
1146 	WMI_TAG_TX_DELBA_COMPLETE_EVENT,
1147 	WMI_TAG_TX_ADDBA_COMPLETE_EVENT,
1148 	WMI_TAG_ROAM_EVENT,
1149 	WMI_TAG_WOW_EVENT_INFO,
1150 	WMI_TAG_WOW_EVENT_INFO_SECTION_BITMAP,
1151 	WMI_TAG_RTT_EVENT_HEADER,
1152 	WMI_TAG_RTT_ERROR_REPORT_EVENT,
1153 	WMI_TAG_RTT_MEAS_EVENT,
1154 	WMI_TAG_ECHO_EVENT,
1155 	WMI_TAG_FTM_INTG_EVENT,
1156 	WMI_TAG_VDEV_GET_KEEPALIVE_EVENT,
1157 	WMI_TAG_GPIO_INPUT_EVENT,
1158 	WMI_TAG_CSA_EVENT,
1159 	WMI_TAG_GTK_OFFLOAD_STATUS_EVENT,
1160 	WMI_TAG_IGTK_INFO,
1161 	WMI_TAG_DCS_INTERFERENCE_EVENT,
1162 	WMI_TAG_ATH_DCS_CW_INT,
1163 	WMI_TAG_WLAN_DCS_CW_INT = /* ALIAS */
1164 		WMI_TAG_ATH_DCS_CW_INT,
1165 	WMI_TAG_ATH_DCS_WLAN_INT_STAT,
1166 	WMI_TAG_WLAN_DCS_IM_TGT_STATS_T = /* ALIAS */
1167 		WMI_TAG_ATH_DCS_WLAN_INT_STAT,
1168 	WMI_TAG_WLAN_PROFILE_CTX_T,
1169 	WMI_TAG_WLAN_PROFILE_T,
1170 	WMI_TAG_PDEV_QVIT_EVENT,
1171 	WMI_TAG_HOST_SWBA_EVENT,
1172 	WMI_TAG_TIM_INFO,
1173 	WMI_TAG_P2P_NOA_INFO,
1174 	WMI_TAG_STATS_EVENT,
1175 	WMI_TAG_AVOID_FREQ_RANGES_EVENT,
1176 	WMI_TAG_AVOID_FREQ_RANGE_DESC,
1177 	WMI_TAG_GTK_REKEY_FAIL_EVENT,
1178 	WMI_TAG_INIT_CMD,
1179 	WMI_TAG_RESOURCE_CONFIG,
1180 	WMI_TAG_WLAN_HOST_MEMORY_CHUNK,
1181 	WMI_TAG_START_SCAN_CMD,
1182 	WMI_TAG_STOP_SCAN_CMD,
1183 	WMI_TAG_SCAN_CHAN_LIST_CMD,
1184 	WMI_TAG_CHANNEL,
1185 	WMI_TAG_PDEV_SET_REGDOMAIN_CMD,
1186 	WMI_TAG_PDEV_SET_PARAM_CMD,
1187 	WMI_TAG_PDEV_SET_WMM_PARAMS_CMD,
1188 	WMI_TAG_WMM_PARAMS,
1189 	WMI_TAG_PDEV_SET_QUIET_CMD,
1190 	WMI_TAG_VDEV_CREATE_CMD,
1191 	WMI_TAG_VDEV_DELETE_CMD,
1192 	WMI_TAG_VDEV_START_REQUEST_CMD,
1193 	WMI_TAG_P2P_NOA_DESCRIPTOR,
1194 	WMI_TAG_P2P_GO_SET_BEACON_IE,
1195 	WMI_TAG_GTK_OFFLOAD_CMD,
1196 	WMI_TAG_VDEV_UP_CMD,
1197 	WMI_TAG_VDEV_STOP_CMD,
1198 	WMI_TAG_VDEV_DOWN_CMD,
1199 	WMI_TAG_VDEV_SET_PARAM_CMD,
1200 	WMI_TAG_VDEV_INSTALL_KEY_CMD,
1201 	WMI_TAG_PEER_CREATE_CMD,
1202 	WMI_TAG_PEER_DELETE_CMD,
1203 	WMI_TAG_PEER_FLUSH_TIDS_CMD,
1204 	WMI_TAG_PEER_SET_PARAM_CMD,
1205 	WMI_TAG_PEER_ASSOC_COMPLETE_CMD,
1206 	WMI_TAG_VHT_RATE_SET,
1207 	WMI_TAG_BCN_TMPL_CMD,
1208 	WMI_TAG_PRB_TMPL_CMD,
1209 	WMI_TAG_BCN_PRB_INFO,
1210 	WMI_TAG_PEER_TID_ADDBA_CMD,
1211 	WMI_TAG_PEER_TID_DELBA_CMD,
1212 	WMI_TAG_STA_POWERSAVE_MODE_CMD,
1213 	WMI_TAG_STA_POWERSAVE_PARAM_CMD,
1214 	WMI_TAG_STA_DTIM_PS_METHOD_CMD,
1215 	WMI_TAG_ROAM_SCAN_MODE,
1216 	WMI_TAG_ROAM_SCAN_RSSI_THRESHOLD,
1217 	WMI_TAG_ROAM_SCAN_PERIOD,
1218 	WMI_TAG_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1219 	WMI_TAG_PDEV_SUSPEND_CMD,
1220 	WMI_TAG_PDEV_RESUME_CMD,
1221 	WMI_TAG_ADD_BCN_FILTER_CMD,
1222 	WMI_TAG_RMV_BCN_FILTER_CMD,
1223 	WMI_TAG_WOW_ENABLE_CMD,
1224 	WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD,
1225 	WMI_TAG_STA_UAPSD_AUTO_TRIG_CMD,
1226 	WMI_TAG_STA_UAPSD_AUTO_TRIG_PARAM,
1227 	WMI_TAG_SET_ARP_NS_OFFLOAD_CMD,
1228 	WMI_TAG_ARP_OFFLOAD_TUPLE,
1229 	WMI_TAG_NS_OFFLOAD_TUPLE,
1230 	WMI_TAG_FTM_INTG_CMD,
1231 	WMI_TAG_STA_KEEPALIVE_CMD,
1232 	WMI_TAG_STA_KEEPALIVE_ARP_RESPONSE,
1233 	WMI_TAG_P2P_SET_VENDOR_IE_DATA_CMD,
1234 	WMI_TAG_AP_PS_PEER_CMD,
1235 	WMI_TAG_PEER_RATE_RETRY_SCHED_CMD,
1236 	WMI_TAG_WLAN_PROFILE_TRIGGER_CMD,
1237 	WMI_TAG_WLAN_PROFILE_SET_HIST_INTVL_CMD,
1238 	WMI_TAG_WLAN_PROFILE_GET_PROF_DATA_CMD,
1239 	WMI_TAG_WLAN_PROFILE_ENABLE_PROFILE_ID_CMD,
1240 	WMI_TAG_WOW_DEL_PATTERN_CMD,
1241 	WMI_TAG_WOW_ADD_DEL_EVT_CMD,
1242 	WMI_TAG_RTT_MEASREQ_HEAD,
1243 	WMI_TAG_RTT_MEASREQ_BODY,
1244 	WMI_TAG_RTT_TSF_CMD,
1245 	WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD,
1246 	WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD,
1247 	WMI_TAG_REQUEST_STATS_CMD,
1248 	WMI_TAG_NLO_CONFIG_CMD,
1249 	WMI_TAG_NLO_CONFIGURED_PARAMETERS,
1250 	WMI_TAG_CSA_OFFLOAD_ENABLE_CMD,
1251 	WMI_TAG_CSA_OFFLOAD_CHANSWITCH_CMD,
1252 	WMI_TAG_CHATTER_SET_MODE_CMD,
1253 	WMI_TAG_ECHO_CMD,
1254 	WMI_TAG_VDEV_SET_KEEPALIVE_CMD,
1255 	WMI_TAG_VDEV_GET_KEEPALIVE_CMD,
1256 	WMI_TAG_FORCE_FW_HANG_CMD,
1257 	WMI_TAG_GPIO_CONFIG_CMD,
1258 	WMI_TAG_GPIO_OUTPUT_CMD,
1259 	WMI_TAG_PEER_ADD_WDS_ENTRY_CMD,
1260 	WMI_TAG_PEER_REMOVE_WDS_ENTRY_CMD,
1261 	WMI_TAG_BCN_TX_HDR,
1262 	WMI_TAG_BCN_SEND_FROM_HOST_CMD,
1263 	WMI_TAG_MGMT_TX_HDR,
1264 	WMI_TAG_ADDBA_CLEAR_RESP_CMD,
1265 	WMI_TAG_ADDBA_SEND_CMD,
1266 	WMI_TAG_DELBA_SEND_CMD,
1267 	WMI_TAG_ADDBA_SETRESPONSE_CMD,
1268 	WMI_TAG_SEND_SINGLEAMSDU_CMD,
1269 	WMI_TAG_PDEV_PKTLOG_ENABLE_CMD,
1270 	WMI_TAG_PDEV_PKTLOG_DISABLE_CMD,
1271 	WMI_TAG_PDEV_SET_HT_IE_CMD,
1272 	WMI_TAG_PDEV_SET_VHT_IE_CMD,
1273 	WMI_TAG_PDEV_SET_DSCP_TID_MAP_CMD,
1274 	WMI_TAG_PDEV_GREEN_AP_PS_ENABLE_CMD,
1275 	WMI_TAG_PDEV_GET_TPC_CONFIG_CMD,
1276 	WMI_TAG_PDEV_SET_BASE_MACADDR_CMD,
1277 	WMI_TAG_PEER_MCAST_GROUP_CMD,
1278 	WMI_TAG_ROAM_AP_PROFILE,
1279 	WMI_TAG_AP_PROFILE,
1280 	WMI_TAG_SCAN_SCH_PRIORITY_TABLE_CMD,
1281 	WMI_TAG_PDEV_DFS_ENABLE_CMD,
1282 	WMI_TAG_PDEV_DFS_DISABLE_CMD,
1283 	WMI_TAG_WOW_ADD_PATTERN_CMD,
1284 	WMI_TAG_WOW_BITMAP_PATTERN_T,
1285 	WMI_TAG_WOW_IPV4_SYNC_PATTERN_T,
1286 	WMI_TAG_WOW_IPV6_SYNC_PATTERN_T,
1287 	WMI_TAG_WOW_MAGIC_PATTERN_CMD,
1288 	WMI_TAG_SCAN_UPDATE_REQUEST_CMD,
1289 	WMI_TAG_CHATTER_PKT_COALESCING_FILTER,
1290 	WMI_TAG_CHATTER_COALESCING_ADD_FILTER_CMD,
1291 	WMI_TAG_CHATTER_COALESCING_DELETE_FILTER_CMD,
1292 	WMI_TAG_CHATTER_COALESCING_QUERY_CMD,
1293 	WMI_TAG_TXBF_CMD,
1294 	WMI_TAG_DEBUG_LOG_CONFIG_CMD,
1295 	WMI_TAG_NLO_EVENT,
1296 	WMI_TAG_CHATTER_QUERY_REPLY_EVENT,
1297 	WMI_TAG_UPLOAD_H_HDR,
1298 	WMI_TAG_CAPTURE_H_EVENT_HDR,
1299 	WMI_TAG_VDEV_WNM_SLEEPMODE_CMD,
1300 	WMI_TAG_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD,
1301 	WMI_TAG_VDEV_WMM_ADDTS_CMD,
1302 	WMI_TAG_VDEV_WMM_DELTS_CMD,
1303 	WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
1304 	WMI_TAG_TDLS_SET_STATE_CMD,
1305 	WMI_TAG_TDLS_PEER_UPDATE_CMD,
1306 	WMI_TAG_TDLS_PEER_EVENT,
1307 	WMI_TAG_TDLS_PEER_CAPABILITIES,
1308 	WMI_TAG_VDEV_MCC_SET_TBTT_MODE_CMD,
1309 	WMI_TAG_ROAM_CHAN_LIST,
1310 	WMI_TAG_VDEV_MCC_BCN_INTVL_CHANGE_EVENT,
1311 	WMI_TAG_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMD,
1312 	WMI_TAG_RESMGR_SET_CHAN_TIME_QUOTA_CMD,
1313 	WMI_TAG_RESMGR_SET_CHAN_LATENCY_CMD,
1314 	WMI_TAG_BA_REQ_SSN_CMD,
1315 	WMI_TAG_BA_RSP_SSN_EVENT,
1316 	WMI_TAG_STA_SMPS_FORCE_MODE_CMD,
1317 	WMI_TAG_SET_MCASTBCAST_FILTER_CMD,
1318 	WMI_TAG_P2P_SET_OPPPS_CMD,
1319 	WMI_TAG_P2P_SET_NOA_CMD,
1320 	WMI_TAG_BA_REQ_SSN_CMD_SUB_STRUCT_PARAM,
1321 	WMI_TAG_BA_REQ_SSN_EVENT_SUB_STRUCT_PARAM,
1322 	WMI_TAG_STA_SMPS_PARAM_CMD,
1323 	WMI_TAG_VDEV_SET_GTX_PARAMS_CMD,
1324 	WMI_TAG_MCC_SCHED_TRAFFIC_STATS_CMD,
1325 	WMI_TAG_MCC_SCHED_STA_TRAFFIC_STATS,
1326 	WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT,
1327 	WMI_TAG_P2P_NOA_EVENT,
1328 	WMI_TAG_HB_SET_ENABLE_CMD,
1329 	WMI_TAG_HB_SET_TCP_PARAMS_CMD,
1330 	WMI_TAG_HB_SET_TCP_PKT_FILTER_CMD,
1331 	WMI_TAG_HB_SET_UDP_PARAMS_CMD,
1332 	WMI_TAG_HB_SET_UDP_PKT_FILTER_CMD,
1333 	WMI_TAG_HB_IND_EVENT,
1334 	WMI_TAG_TX_PAUSE_EVENT,
1335 	WMI_TAG_RFKILL_EVENT,
1336 	WMI_TAG_DFS_RADAR_EVENT,
1337 	WMI_TAG_DFS_PHYERR_FILTER_ENA_CMD,
1338 	WMI_TAG_DFS_PHYERR_FILTER_DIS_CMD,
1339 	WMI_TAG_BATCH_SCAN_RESULT_SCAN_LIST,
1340 	WMI_TAG_BATCH_SCAN_RESULT_NETWORK_INFO,
1341 	WMI_TAG_BATCH_SCAN_ENABLE_CMD,
1342 	WMI_TAG_BATCH_SCAN_DISABLE_CMD,
1343 	WMI_TAG_BATCH_SCAN_TRIGGER_RESULT_CMD,
1344 	WMI_TAG_BATCH_SCAN_ENABLED_EVENT,
1345 	WMI_TAG_BATCH_SCAN_RESULT_EVENT,
1346 	WMI_TAG_VDEV_PLMREQ_START_CMD,
1347 	WMI_TAG_VDEV_PLMREQ_STOP_CMD,
1348 	WMI_TAG_THERMAL_MGMT_CMD,
1349 	WMI_TAG_THERMAL_MGMT_EVENT,
1350 	WMI_TAG_PEER_INFO_REQ_CMD,
1351 	WMI_TAG_PEER_INFO_EVENT,
1352 	WMI_TAG_PEER_INFO,
1353 	WMI_TAG_PEER_TX_FAIL_CNT_THR_EVENT,
1354 	WMI_TAG_RMC_SET_MODE_CMD,
1355 	WMI_TAG_RMC_SET_ACTION_PERIOD_CMD,
1356 	WMI_TAG_RMC_CONFIG_CMD,
1357 	WMI_TAG_MHF_OFFLOAD_SET_MODE_CMD,
1358 	WMI_TAG_MHF_OFFLOAD_PLUMB_ROUTING_TABLE_CMD,
1359 	WMI_TAG_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD,
1360 	WMI_TAG_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD,
1361 	WMI_TAG_NAN_CMD_PARAM,
1362 	WMI_TAG_NAN_EVENT_HDR,
1363 	WMI_TAG_PDEV_L1SS_TRACK_EVENT,
1364 	WMI_TAG_DIAG_DATA_CONTAINER_EVENT,
1365 	WMI_TAG_MODEM_POWER_STATE_CMD_PARAM,
1366 	WMI_TAG_PEER_GET_ESTIMATED_LINKSPEED_CMD,
1367 	WMI_TAG_PEER_ESTIMATED_LINKSPEED_EVENT,
1368 	WMI_TAG_AGGR_STATE_TRIG_EVENT,
1369 	WMI_TAG_MHF_OFFLOAD_ROUTING_TABLE_ENTRY,
1370 	WMI_TAG_ROAM_SCAN_CMD,
1371 	WMI_TAG_REQ_STATS_EXT_CMD,
1372 	WMI_TAG_STATS_EXT_EVENT,
1373 	WMI_TAG_OBSS_SCAN_ENABLE_CMD,
1374 	WMI_TAG_OBSS_SCAN_DISABLE_CMD,
1375 	WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT,
1376 	WMI_TAG_PDEV_SET_LED_CONFIG_CMD,
1377 	WMI_TAG_HOST_AUTO_SHUTDOWN_CFG_CMD,
1378 	WMI_TAG_HOST_AUTO_SHUTDOWN_EVENT,
1379 	WMI_TAG_UPDATE_WHAL_MIB_STATS_EVENT,
1380 	WMI_TAG_CHAN_AVOID_UPDATE_CMD_PARAM,
1381 	WMI_TAG_WOW_IOAC_PKT_PATTERN_T,
1382 	WMI_TAG_WOW_IOAC_TMR_PATTERN_T,
1383 	WMI_TAG_WOW_IOAC_ADD_KEEPALIVE_CMD,
1384 	WMI_TAG_WOW_IOAC_DEL_KEEPALIVE_CMD,
1385 	WMI_TAG_WOW_IOAC_KEEPALIVE_T,
1386 	WMI_TAG_WOW_IOAC_ADD_PATTERN_CMD,
1387 	WMI_TAG_WOW_IOAC_DEL_PATTERN_CMD,
1388 	WMI_TAG_START_LINK_STATS_CMD,
1389 	WMI_TAG_CLEAR_LINK_STATS_CMD,
1390 	WMI_TAG_REQUEST_LINK_STATS_CMD,
1391 	WMI_TAG_IFACE_LINK_STATS_EVENT,
1392 	WMI_TAG_RADIO_LINK_STATS_EVENT,
1393 	WMI_TAG_PEER_STATS_EVENT,
1394 	WMI_TAG_CHANNEL_STATS,
1395 	WMI_TAG_RADIO_LINK_STATS,
1396 	WMI_TAG_RATE_STATS,
1397 	WMI_TAG_PEER_LINK_STATS,
1398 	WMI_TAG_WMM_AC_STATS,
1399 	WMI_TAG_IFACE_LINK_STATS,
1400 	WMI_TAG_LPI_MGMT_SNOOPING_CONFIG_CMD,
1401 	WMI_TAG_LPI_START_SCAN_CMD,
1402 	WMI_TAG_LPI_STOP_SCAN_CMD,
1403 	WMI_TAG_LPI_RESULT_EVENT,
1404 	WMI_TAG_PEER_STATE_EVENT,
1405 	WMI_TAG_EXTSCAN_BUCKET_CMD,
1406 	WMI_TAG_EXTSCAN_BUCKET_CHANNEL_EVENT,
1407 	WMI_TAG_EXTSCAN_START_CMD,
1408 	WMI_TAG_EXTSCAN_STOP_CMD,
1409 	WMI_TAG_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMD,
1410 	WMI_TAG_EXTSCAN_WLAN_CHANGE_BSSID_PARAM_CMD,
1411 	WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMD,
1412 	WMI_TAG_EXTSCAN_GET_CACHED_RESULTS_CMD,
1413 	WMI_TAG_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMD,
1414 	WMI_TAG_EXTSCAN_SET_CAPABILITIES_CMD,
1415 	WMI_TAG_EXTSCAN_GET_CAPABILITIES_CMD,
1416 	WMI_TAG_EXTSCAN_OPERATION_EVENT,
1417 	WMI_TAG_EXTSCAN_START_STOP_EVENT,
1418 	WMI_TAG_EXTSCAN_TABLE_USAGE_EVENT,
1419 	WMI_TAG_EXTSCAN_WLAN_DESCRIPTOR_EVENT,
1420 	WMI_TAG_EXTSCAN_RSSI_INFO_EVENT,
1421 	WMI_TAG_EXTSCAN_CACHED_RESULTS_EVENT,
1422 	WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULTS_EVENT,
1423 	WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULT_BSSID_EVENT,
1424 	WMI_TAG_EXTSCAN_HOTLIST_MATCH_EVENT,
1425 	WMI_TAG_EXTSCAN_CAPABILITIES_EVENT,
1426 	WMI_TAG_EXTSCAN_CACHE_CAPABILITIES_EVENT,
1427 	WMI_TAG_EXTSCAN_WLAN_CHANGE_MONITOR_CAPABILITIES_EVENT,
1428 	WMI_TAG_EXTSCAN_HOTLIST_MONITOR_CAPABILITIES_EVENT,
1429 	WMI_TAG_D0_WOW_ENABLE_DISABLE_CMD,
1430 	WMI_TAG_D0_WOW_DISABLE_ACK_EVENT,
1431 	WMI_TAG_UNIT_TEST_CMD,
1432 	WMI_TAG_ROAM_OFFLOAD_TLV_PARAM,
1433 	WMI_TAG_ROAM_11I_OFFLOAD_TLV_PARAM,
1434 	WMI_TAG_ROAM_11R_OFFLOAD_TLV_PARAM,
1435 	WMI_TAG_ROAM_ESE_OFFLOAD_TLV_PARAM,
1436 	WMI_TAG_ROAM_SYNCH_EVENT,
1437 	WMI_TAG_ROAM_SYNCH_COMPLETE,
1438 	WMI_TAG_EXTWOW_ENABLE_CMD,
1439 	WMI_TAG_EXTWOW_SET_APP_TYPE1_PARAMS_CMD,
1440 	WMI_TAG_EXTWOW_SET_APP_TYPE2_PARAMS_CMD,
1441 	WMI_TAG_LPI_STATUS_EVENT,
1442 	WMI_TAG_LPI_HANDOFF_EVENT,
1443 	WMI_TAG_VDEV_RATE_STATS_EVENT,
1444 	WMI_TAG_VDEV_RATE_HT_INFO,
1445 	WMI_TAG_RIC_REQUEST,
1446 	WMI_TAG_PDEV_GET_TEMPERATURE_CMD,
1447 	WMI_TAG_PDEV_TEMPERATURE_EVENT,
1448 	WMI_TAG_SET_DHCP_SERVER_OFFLOAD_CMD,
1449 	WMI_TAG_TPC_CHAINMASK_CONFIG_CMD,
1450 	WMI_TAG_RIC_TSPEC,
1451 	WMI_TAG_TPC_CHAINMASK_CONFIG,
1452 	WMI_TAG_IPA_OFFLOAD_ENABLE_DISABLE_CMD,
1453 	WMI_TAG_SCAN_PROB_REQ_OUI_CMD,
1454 	WMI_TAG_KEY_MATERIAL,
1455 	WMI_TAG_TDLS_SET_OFFCHAN_MODE_CMD,
1456 	WMI_TAG_SET_LED_FLASHING_CMD,
1457 	WMI_TAG_MDNS_OFFLOAD_CMD,
1458 	WMI_TAG_MDNS_SET_FQDN_CMD,
1459 	WMI_TAG_MDNS_SET_RESP_CMD,
1460 	WMI_TAG_MDNS_GET_STATS_CMD,
1461 	WMI_TAG_MDNS_STATS_EVENT,
1462 	WMI_TAG_ROAM_INVOKE_CMD,
1463 	WMI_TAG_PDEV_RESUME_EVENT,
1464 	WMI_TAG_PDEV_SET_ANTENNA_DIVERSITY_CMD,
1465 	WMI_TAG_SAP_OFL_ENABLE_CMD,
1466 	WMI_TAG_SAP_OFL_ADD_STA_EVENT,
1467 	WMI_TAG_SAP_OFL_DEL_STA_EVENT,
1468 	WMI_TAG_APFIND_CMD_PARAM,
1469 	WMI_TAG_APFIND_EVENT_HDR,
1470 	WMI_TAG_OCB_SET_SCHED_CMD,
1471 	WMI_TAG_OCB_SET_SCHED_EVENT,
1472 	WMI_TAG_OCB_SET_CONFIG_CMD,
1473 	WMI_TAG_OCB_SET_CONFIG_RESP_EVENT,
1474 	WMI_TAG_OCB_SET_UTC_TIME_CMD,
1475 	WMI_TAG_OCB_START_TIMING_ADVERT_CMD,
1476 	WMI_TAG_OCB_STOP_TIMING_ADVERT_CMD,
1477 	WMI_TAG_OCB_GET_TSF_TIMER_CMD,
1478 	WMI_TAG_OCB_GET_TSF_TIMER_RESP_EVENT,
1479 	WMI_TAG_DCC_GET_STATS_CMD,
1480 	WMI_TAG_DCC_CHANNEL_STATS_REQUEST,
1481 	WMI_TAG_DCC_GET_STATS_RESP_EVENT,
1482 	WMI_TAG_DCC_CLEAR_STATS_CMD,
1483 	WMI_TAG_DCC_UPDATE_NDL_CMD,
1484 	WMI_TAG_DCC_UPDATE_NDL_RESP_EVENT,
1485 	WMI_TAG_DCC_STATS_EVENT,
1486 	WMI_TAG_OCB_CHANNEL,
1487 	WMI_TAG_OCB_SCHEDULE_ELEMENT,
1488 	WMI_TAG_DCC_NDL_STATS_PER_CHANNEL,
1489 	WMI_TAG_DCC_NDL_CHAN,
1490 	WMI_TAG_QOS_PARAMETER,
1491 	WMI_TAG_DCC_NDL_ACTIVE_STATE_CONFIG,
1492 	WMI_TAG_ROAM_SCAN_EXTENDED_THRESHOLD_PARAM,
1493 	WMI_TAG_ROAM_FILTER,
1494 	WMI_TAG_PASSPOINT_CONFIG_CMD,
1495 	WMI_TAG_PASSPOINT_EVENT_HDR,
1496 	WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMD,
1497 	WMI_TAG_EXTSCAN_HOTLIST_SSID_MATCH_EVENT,
1498 	WMI_TAG_VDEV_TSF_TSTAMP_ACTION_CMD,
1499 	WMI_TAG_VDEV_TSF_REPORT_EVENT,
1500 	WMI_TAG_GET_FW_MEM_DUMP,
1501 	WMI_TAG_UPDATE_FW_MEM_DUMP,
1502 	WMI_TAG_FW_MEM_DUMP_PARAMS,
1503 	WMI_TAG_DEBUG_MESG_FLUSH,
1504 	WMI_TAG_DEBUG_MESG_FLUSH_COMPLETE,
1505 	WMI_TAG_PEER_SET_RATE_REPORT_CONDITION,
1506 	WMI_TAG_ROAM_SUBNET_CHANGE_CONFIG,
1507 	WMI_TAG_VDEV_SET_IE_CMD,
1508 	WMI_TAG_RSSI_BREACH_MONITOR_CONFIG,
1509 	WMI_TAG_RSSI_BREACH_EVENT,
1510 	WMI_TAG_WOW_EVENT_INITIAL_WAKEUP,
1511 	WMI_TAG_SOC_SET_PCL_CMD,
1512 	WMI_TAG_SOC_SET_HW_MODE_CMD,
1513 	WMI_TAG_SOC_SET_HW_MODE_RESPONSE_EVENT,
1514 	WMI_TAG_SOC_HW_MODE_TRANSITION_EVENT,
1515 	WMI_TAG_VDEV_TXRX_STREAMS,
1516 	WMI_TAG_SOC_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY,
1517 	WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_CMD,
1518 	WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_RESPONSE_EVENT,
1519 	WMI_TAG_WOW_IOAC_SOCK_PATTERN_T,
1520 	WMI_TAG_WOW_ENABLE_ICMPV6_NA_FLT_CMD,
1521 	WMI_TAG_DIAG_EVENT_LOG_CONFIG,
1522 	WMI_TAG_DIAG_EVENT_LOG_SUPPORTED_EVENT_FIXED_PARAMS,
1523 	WMI_TAG_PACKET_FILTER_CONFIG,
1524 	WMI_TAG_PACKET_FILTER_ENABLE,
1525 	WMI_TAG_SAP_SET_BLACKLIST_PARAM_CMD,
1526 	WMI_TAG_MGMT_TX_SEND_CMD,
1527 	WMI_TAG_MGMT_TX_COMPL_EVENT,
1528 	WMI_TAG_SOC_SET_ANTENNA_MODE_CMD,
1529 	WMI_TAG_WOW_UDP_SVC_OFLD_CMD,
1530 	WMI_TAG_LRO_INFO_CMD,
1531 	WMI_TAG_ROAM_EARLYSTOP_RSSI_THRES_PARAM,
1532 	WMI_TAG_SERVICE_READY_EXT_EVENT,
1533 	WMI_TAG_MAWC_SENSOR_REPORT_IND_CMD,
1534 	WMI_TAG_MAWC_ENABLE_SENSOR_EVENT,
1535 	WMI_TAG_ROAM_CONFIGURE_MAWC_CMD,
1536 	WMI_TAG_NLO_CONFIGURE_MAWC_CMD,
1537 	WMI_TAG_EXTSCAN_CONFIGURE_MAWC_CMD,
1538 	WMI_TAG_PEER_ASSOC_CONF_EVENT,
1539 	WMI_TAG_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMD,
1540 	WMI_TAG_AP_PS_EGAP_PARAM_CMD,
1541 	WMI_TAG_AP_PS_EGAP_INFO_EVENT,
1542 	WMI_TAG_PMF_OFFLOAD_SET_SA_QUERY_CMD,
1543 	WMI_TAG_TRANSFER_DATA_TO_FLASH_CMD,
1544 	WMI_TAG_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENT,
1545 	WMI_TAG_SCPC_EVENT,
1546 	WMI_TAG_AP_PS_EGAP_INFO_CHAINMASK_LIST,
1547 	WMI_TAG_STA_SMPS_FORCE_MODE_COMPLETE_EVENT,
1548 	WMI_TAG_BPF_GET_CAPABILITY_CMD,
1549 	WMI_TAG_BPF_CAPABILITY_INFO_EVT,
1550 	WMI_TAG_BPF_GET_VDEV_STATS_CMD,
1551 	WMI_TAG_BPF_VDEV_STATS_INFO_EVT,
1552 	WMI_TAG_BPF_SET_VDEV_INSTRUCTIONS_CMD,
1553 	WMI_TAG_BPF_DEL_VDEV_INSTRUCTIONS_CMD,
1554 	WMI_TAG_VDEV_DELETE_RESP_EVENT,
1555 	WMI_TAG_PEER_DELETE_RESP_EVENT,
1556 	WMI_TAG_ROAM_DENSE_THRES_PARAM,
1557 	WMI_TAG_ENLO_CANDIDATE_SCORE_PARAM,
1558 	WMI_TAG_PEER_UPDATE_WDS_ENTRY_CMD,
1559 	WMI_TAG_VDEV_CONFIG_RATEMASK,
1560 	WMI_TAG_PDEV_FIPS_CMD,
1561 	WMI_TAG_PDEV_SMART_ANT_ENABLE_CMD,
1562 	WMI_TAG_PDEV_SMART_ANT_SET_RX_ANTENNA_CMD,
1563 	WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_CMD,
1564 	WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_CMD,
1565 	WMI_TAG_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMD,
1566 	WMI_TAG_PDEV_SET_ANT_SWITCH_TBL_CMD,
1567 	WMI_TAG_PDEV_SET_CTL_TABLE_CMD,
1568 	WMI_TAG_PDEV_SET_MIMOGAIN_TABLE_CMD,
1569 	WMI_TAG_FWTEST_SET_PARAM_CMD,
1570 	WMI_TAG_PEER_ATF_REQUEST,
1571 	WMI_TAG_VDEV_ATF_REQUEST,
1572 	WMI_TAG_PDEV_GET_ANI_CCK_CONFIG_CMD,
1573 	WMI_TAG_PDEV_GET_ANI_OFDM_CONFIG_CMD,
1574 	WMI_TAG_INST_RSSI_STATS_RESP,
1575 	WMI_TAG_MED_UTIL_REPORT_EVENT,
1576 	WMI_TAG_PEER_STA_PS_STATECHANGE_EVENT,
1577 	WMI_TAG_WDS_ADDR_EVENT,
1578 	WMI_TAG_PEER_RATECODE_LIST_EVENT,
1579 	WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENT,
1580 	WMI_TAG_PDEV_TPC_EVENT,
1581 	WMI_TAG_ANI_OFDM_EVENT,
1582 	WMI_TAG_ANI_CCK_EVENT,
1583 	WMI_TAG_PDEV_CHANNEL_HOPPING_EVENT,
1584 	WMI_TAG_PDEV_FIPS_EVENT,
1585 	WMI_TAG_ATF_PEER_INFO,
1586 	WMI_TAG_PDEV_GET_TPC_CMD,
1587 	WMI_TAG_VDEV_FILTER_NRP_CONFIG_CMD,
1588 	WMI_TAG_QBOOST_CFG_CMD,
1589 	WMI_TAG_PDEV_SMART_ANT_GPIO_HANDLE,
1590 	WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_SERIES,
1591 	WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_PARAM,
1592 	WMI_TAG_PDEV_SET_ANT_CTRL_CHAIN,
1593 	WMI_TAG_PEER_CCK_OFDM_RATE_INFO,
1594 	WMI_TAG_PEER_MCS_RATE_INFO,
1595 	WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBR,
1596 	WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBM,
1597 	WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_FREQNUM,
1598 	WMI_TAG_MU_REPORT_TOTAL_MU,
1599 	WMI_TAG_VDEV_SET_DSCP_TID_MAP_CMD,
1600 	WMI_TAG_ROAM_SET_MBO,
1601 	WMI_TAG_MIB_STATS_ENABLE_CMD,
1602 	WMI_TAG_NAN_DISC_IFACE_CREATED_EVENT,
1603 	WMI_TAG_NAN_DISC_IFACE_DELETED_EVENT,
1604 	WMI_TAG_NAN_STARTED_CLUSTER_EVENT,
1605 	WMI_TAG_NAN_JOINED_CLUSTER_EVENT,
1606 	WMI_TAG_NDI_GET_CAP_REQ,
1607 	WMI_TAG_NDP_INITIATOR_REQ,
1608 	WMI_TAG_NDP_RESPONDER_REQ,
1609 	WMI_TAG_NDP_END_REQ,
1610 	WMI_TAG_NDI_CAP_RSP_EVENT,
1611 	WMI_TAG_NDP_INITIATOR_RSP_EVENT,
1612 	WMI_TAG_NDP_RESPONDER_RSP_EVENT,
1613 	WMI_TAG_NDP_END_RSP_EVENT,
1614 	WMI_TAG_NDP_INDICATION_EVENT,
1615 	WMI_TAG_NDP_CONFIRM_EVENT,
1616 	WMI_TAG_NDP_END_INDICATION_EVENT,
1617 	WMI_TAG_VDEV_SET_QUIET_CMD,
1618 	WMI_TAG_PDEV_SET_PCL_CMD,
1619 	WMI_TAG_PDEV_SET_HW_MODE_CMD,
1620 	WMI_TAG_PDEV_SET_MAC_CONFIG_CMD,
1621 	WMI_TAG_PDEV_SET_ANTENNA_MODE_CMD,
1622 	WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_EVENT,
1623 	WMI_TAG_PDEV_HW_MODE_TRANSITION_EVENT,
1624 	WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY,
1625 	WMI_TAG_PDEV_SET_MAC_CONFIG_RESPONSE_EVENT,
1626 	WMI_TAG_COEX_CONFIG_CMD,
1627 	WMI_TAG_CONFIG_ENHANCED_MCAST_FILTER,
1628 	WMI_TAG_CHAN_AVOID_RPT_ALLOW_CMD,
1629 	WMI_TAG_SET_PERIODIC_CHANNEL_STATS_CONFIG,
1630 	WMI_TAG_VDEV_SET_CUSTOM_AGGR_SIZE_CMD,
1631 	WMI_TAG_PDEV_WAL_POWER_DEBUG_CMD,
1632 	WMI_TAG_MAC_PHY_CAPABILITIES,
1633 	WMI_TAG_HW_MODE_CAPABILITIES,
1634 	WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS,
1635 	WMI_TAG_HAL_REG_CAPABILITIES_EXT,
1636 	WMI_TAG_SOC_HAL_REG_CAPABILITIES,
1637 	WMI_TAG_VDEV_WISA_CMD,
1638 	WMI_TAG_TX_POWER_LEVEL_STATS_EVT,
1639 	WMI_TAG_SCAN_ADAPTIVE_DWELL_PARAMETERS_TLV,
1640 	WMI_TAG_SCAN_ADAPTIVE_DWELL_CONFIG,
1641 	WMI_TAG_WOW_SET_ACTION_WAKE_UP_CMD,
1642 	WMI_TAG_NDP_END_RSP_PER_NDI,
1643 	WMI_TAG_PEER_BWF_REQUEST,
1644 	WMI_TAG_BWF_PEER_INFO,
1645 	WMI_TAG_DBGLOG_TIME_STAMP_SYNC_CMD,
1646 	WMI_TAG_RMC_SET_LEADER_CMD,
1647 	WMI_TAG_RMC_MANUAL_LEADER_EVENT,
1648 	WMI_TAG_PER_CHAIN_RSSI_STATS,
1649 	WMI_TAG_RSSI_STATS,
1650 	WMI_TAG_P2P_LO_START_CMD,
1651 	WMI_TAG_P2P_LO_STOP_CMD,
1652 	WMI_TAG_P2P_LO_STOPPED_EVENT,
1653 	WMI_TAG_REORDER_QUEUE_SETUP_CMD,
1654 	WMI_TAG_REORDER_QUEUE_REMOVE_CMD,
1655 	WMI_TAG_SET_MULTIPLE_MCAST_FILTER_CMD,
1656 	WMI_TAG_MGMT_TX_COMPL_BUNDLE_EVENT,
1657 	WMI_TAG_READ_DATA_FROM_FLASH_CMD,
1658 	WMI_TAG_READ_DATA_FROM_FLASH_EVENT,
1659 	WMI_TAG_PDEV_SET_REORDER_TIMEOUT_VAL_CMD,
1660 	WMI_TAG_PEER_SET_RX_BLOCKSIZE_CMD,
1661 	WMI_TAG_PDEV_SET_WAKEUP_CONFIG_CMDID,
1662 	WMI_TAG_TLV_BUF_LEN_PARAM,
1663 	WMI_TAG_SERVICE_AVAILABLE_EVENT,
1664 	WMI_TAG_PEER_ANTDIV_INFO_REQ_CMD,
1665 	WMI_TAG_PEER_ANTDIV_INFO_EVENT,
1666 	WMI_TAG_PEER_ANTDIV_INFO,
1667 	WMI_TAG_PDEV_GET_ANTDIV_STATUS_CMD,
1668 	WMI_TAG_PDEV_ANTDIV_STATUS_EVENT,
1669 	WMI_TAG_MNT_FILTER_CMD,
1670 	WMI_TAG_GET_CHIP_POWER_STATS_CMD,
1671 	WMI_TAG_PDEV_CHIP_POWER_STATS_EVENT,
1672 	WMI_TAG_COEX_GET_ANTENNA_ISOLATION_CMD,
1673 	WMI_TAG_COEX_REPORT_ISOLATION_EVENT,
1674 	WMI_TAG_CHAN_CCA_STATS,
1675 	WMI_TAG_PEER_SIGNAL_STATS,
1676 	WMI_TAG_TX_STATS,
1677 	WMI_TAG_PEER_AC_TX_STATS,
1678 	WMI_TAG_RX_STATS,
1679 	WMI_TAG_PEER_AC_RX_STATS,
1680 	WMI_TAG_REPORT_STATS_EVENT,
1681 	WMI_TAG_CHAN_CCA_STATS_THRESH,
1682 	WMI_TAG_PEER_SIGNAL_STATS_THRESH,
1683 	WMI_TAG_TX_STATS_THRESH,
1684 	WMI_TAG_RX_STATS_THRESH,
1685 	WMI_TAG_PDEV_SET_STATS_THRESHOLD_CMD,
1686 	WMI_TAG_REQUEST_WLAN_STATS_CMD,
1687 	WMI_TAG_RX_AGGR_FAILURE_EVENT,
1688 	WMI_TAG_RX_AGGR_FAILURE_INFO,
1689 	WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMD,
1690 	WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENT,
1691 	WMI_TAG_PDEV_BAND_TO_MAC,
1692 	WMI_TAG_TBTT_OFFSET_INFO,
1693 	WMI_TAG_TBTT_OFFSET_EXT_EVENT,
1694 	WMI_TAG_SAR_LIMITS_CMD,
1695 	WMI_TAG_SAR_LIMIT_CMD_ROW,
1696 	WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD,
1697 	WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMD,
1698 	WMI_TAG_VDEV_ADFS_CH_CFG_CMD,
1699 	WMI_TAG_VDEV_ADFS_OCAC_ABORT_CMD,
1700 	WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT,
1701 	WMI_TAG_VDEV_ADFS_OCAC_COMPLETE_EVENT,
1702 	WMI_TAG_VDEV_DFS_CAC_COMPLETE_EVENT,
1703 	WMI_TAG_VENDOR_OUI,
1704 	WMI_TAG_REQUEST_RCPI_CMD,
1705 	WMI_TAG_UPDATE_RCPI_EVENT,
1706 	WMI_TAG_REQUEST_PEER_STATS_INFO_CMD,
1707 	WMI_TAG_PEER_STATS_INFO,
1708 	WMI_TAG_PEER_STATS_INFO_EVENT,
1709 	WMI_TAG_PKGID_EVENT,
1710 	WMI_TAG_CONNECTED_NLO_RSSI_PARAMS,
1711 	WMI_TAG_SET_CURRENT_COUNTRY_CMD,
1712 	WMI_TAG_REGULATORY_RULE_STRUCT,
1713 	WMI_TAG_REG_CHAN_LIST_CC_EVENT,
1714 	WMI_TAG_11D_SCAN_START_CMD,
1715 	WMI_TAG_11D_SCAN_STOP_CMD,
1716 	WMI_TAG_11D_NEW_COUNTRY_EVENT,
1717 	WMI_TAG_REQUEST_RADIO_CHAN_STATS_CMD,
1718 	WMI_TAG_RADIO_CHAN_STATS,
1719 	WMI_TAG_RADIO_CHAN_STATS_EVENT,
1720 	WMI_TAG_ROAM_PER_CONFIG,
1721 	WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMD,
1722 	WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENT,
1723 	WMI_TAG_BPF_SET_VDEV_ACTIVE_MODE_CMD,
1724 	WMI_TAG_HW_DATA_FILTER_CMD,
1725 	WMI_TAG_CONNECTED_NLO_BSS_BAND_RSSI_PREF,
1726 	WMI_TAG_PEER_OPER_MODE_CHANGE_EVENT,
1727 	WMI_TAG_CHIP_POWER_SAVE_FAILURE_DETECTED,
1728 	WMI_TAG_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMD,
1729 	WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT,
1730 	WMI_TAG_PDEV_UPDATE_PKT_ROUTING_CMD,
1731 	WMI_TAG_PDEV_CHECK_CAL_VERSION_CMD,
1732 	WMI_TAG_PDEV_CHECK_CAL_VERSION_EVENT,
1733 	WMI_TAG_PDEV_SET_DIVERSITY_GAIN_CMD,
1734 	WMI_TAG_MAC_PHY_CHAINMASK_COMBO,
1735 	WMI_TAG_MAC_PHY_CHAINMASK_CAPABILITY,
1736 	WMI_TAG_VDEV_SET_ARP_STATS_CMD,
1737 	WMI_TAG_VDEV_GET_ARP_STATS_CMD,
1738 	WMI_TAG_VDEV_GET_ARP_STATS_EVENT,
1739 	WMI_TAG_IFACE_OFFLOAD_STATS,
1740 	WMI_TAG_REQUEST_STATS_CMD_SUB_STRUCT_PARAM,
1741 	WMI_TAG_RSSI_CTL_EXT,
1742 	WMI_TAG_SINGLE_PHYERR_EXT_RX_HDR,
1743 	WMI_TAG_COEX_BT_ACTIVITY_EVENT,
1744 	WMI_TAG_VDEV_GET_TX_POWER_CMD,
1745 	WMI_TAG_VDEV_TX_POWER_EVENT,
1746 	WMI_TAG_OFFCHAN_DATA_TX_COMPL_EVENT,
1747 	WMI_TAG_OFFCHAN_DATA_TX_SEND_CMD,
1748 	WMI_TAG_TX_SEND_PARAMS,
1749 	WMI_TAG_HE_RATE_SET,
1750 	WMI_TAG_CONGESTION_STATS,
1751 	WMI_TAG_SET_INIT_COUNTRY_CMD,
1752 	WMI_TAG_SCAN_DBS_DUTY_CYCLE,
1753 	WMI_TAG_SCAN_DBS_DUTY_CYCLE_PARAM_TLV,
1754 	WMI_TAG_PDEV_DIV_GET_RSSI_ANTID,
1755 	WMI_TAG_THERM_THROT_CONFIG_REQUEST,
1756 	WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO,
1757 	WMI_TAG_THERM_THROT_STATS_EVENT,
1758 	WMI_TAG_THERM_THROT_LEVEL_STATS_INFO,
1759 	WMI_TAG_PDEV_DIV_RSSI_ANTID_EVENT,
1760 	WMI_TAG_OEM_DMA_RING_CAPABILITIES,
1761 	WMI_TAG_OEM_DMA_RING_CFG_REQ,
1762 	WMI_TAG_OEM_DMA_RING_CFG_RSP,
1763 	WMI_TAG_OEM_INDIRECT_DATA,
1764 	WMI_TAG_OEM_DMA_BUF_RELEASE,
1765 	WMI_TAG_OEM_DMA_BUF_RELEASE_ENTRY,
1766 	WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST,
1767 	WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT,
1768 	WMI_TAG_ROAM_LCA_DISALLOW_CONFIG,
1769 	WMI_TAG_VDEV_LIMIT_OFFCHAN_CMD,
1770 	WMI_TAG_ROAM_RSSI_REJECTION_OCE_CONFIG,
1771 	WMI_TAG_UNIT_TEST_EVENT,
1772 	WMI_TAG_ROAM_FILS_OFFLOAD,
1773 	WMI_TAG_PDEV_UPDATE_PMK_CACHE_CMD,
1774 	WMI_TAG_PMK_CACHE,
1775 	WMI_TAG_PDEV_UPDATE_FILS_HLP_PKT_CMD,
1776 	WMI_TAG_ROAM_FILS_SYNCH,
1777 	WMI_TAG_GTK_OFFLOAD_EXTENDED,
1778 	WMI_TAG_ROAM_BG_SCAN_ROAMING,
1779 	WMI_TAG_OIC_PING_OFFLOAD_PARAMS_CMD,
1780 	WMI_TAG_OIC_PING_OFFLOAD_SET_ENABLE_CMD,
1781 	WMI_TAG_OIC_PING_HANDOFF_EVENT,
1782 	WMI_TAG_DHCP_LEASE_RENEW_OFFLOAD_CMD,
1783 	WMI_TAG_DHCP_LEASE_RENEW_EVENT,
1784 	WMI_TAG_BTM_CONFIG,
1785 	WMI_TAG_DEBUG_MESG_FW_DATA_STALL,
1786 	WMI_TAG_WLM_CONFIG_CMD,
1787 	WMI_TAG_PDEV_UPDATE_CTLTABLE_REQUEST,
1788 	WMI_TAG_PDEV_UPDATE_CTLTABLE_EVENT,
1789 	WMI_TAG_ROAM_CND_SCORING_PARAM,
1790 	WMI_TAG_PDEV_CONFIG_VENDOR_OUI_ACTION,
1791 	WMI_TAG_VENDOR_OUI_EXT,
1792 	WMI_TAG_ROAM_SYNCH_FRAME_EVENT,
1793 	WMI_TAG_FD_SEND_FROM_HOST_CMD,
1794 	WMI_TAG_ENABLE_FILS_CMD,
1795 	WMI_TAG_HOST_SWFDA_EVENT,
1796 	WMI_TAG_BCN_OFFLOAD_CTRL_CMD,
1797 	WMI_TAG_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMD,
1798 	WMI_TAG_STATS_PERIOD,
1799 	WMI_TAG_NDL_SCHEDULE_UPDATE,
1800 	WMI_TAG_PEER_TID_MSDUQ_QDEPTH_THRESH_UPDATE_CMD,
1801 	WMI_TAG_MSDUQ_QDEPTH_THRESH_UPDATE,
1802 	WMI_TAG_PDEV_SET_RX_FILTER_PROMISCUOUS_CMD,
1803 	WMI_TAG_SAR2_RESULT_EVENT,
1804 	WMI_TAG_SAR_CAPABILITIES,
1805 	WMI_TAG_SAP_OBSS_DETECTION_CFG_CMD,
1806 	WMI_TAG_SAP_OBSS_DETECTION_INFO_EVT,
1807 	WMI_TAG_DMA_RING_CAPABILITIES,
1808 	WMI_TAG_DMA_RING_CFG_REQ,
1809 	WMI_TAG_DMA_RING_CFG_RSP,
1810 	WMI_TAG_DMA_BUF_RELEASE,
1811 	WMI_TAG_DMA_BUF_RELEASE_ENTRY,
1812 	WMI_TAG_SAR_GET_LIMITS_CMD,
1813 	WMI_TAG_SAR_GET_LIMITS_EVENT,
1814 	WMI_TAG_SAR_GET_LIMITS_EVENT_ROW,
1815 	WMI_TAG_OFFLOAD_11K_REPORT,
1816 	WMI_TAG_INVOKE_NEIGHBOR_REPORT,
1817 	WMI_TAG_NEIGHBOR_REPORT_OFFLOAD,
1818 	WMI_TAG_VDEV_SET_CONNECTIVITY_CHECK_STATS,
1819 	WMI_TAG_VDEV_GET_CONNECTIVITY_CHECK_STATS,
1820 	WMI_TAG_BPF_SET_VDEV_ENABLE_CMD,
1821 	WMI_TAG_BPF_SET_VDEV_WORK_MEMORY_CMD,
1822 	WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_CMD,
1823 	WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_RESP_EVT,
1824 	WMI_TAG_PDEV_GET_NFCAL_POWER,
1825 	WMI_TAG_BSS_COLOR_CHANGE_ENABLE,
1826 	WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG,
1827 	WMI_TAG_OBSS_COLOR_COLLISION_EVT,
1828 	WMI_TAG_RUNTIME_DPD_RECAL_CMD,
1829 	WMI_TAG_TWT_ENABLE_CMD,
1830 	WMI_TAG_TWT_DISABLE_CMD,
1831 	WMI_TAG_TWT_ADD_DIALOG_CMD,
1832 	WMI_TAG_TWT_DEL_DIALOG_CMD,
1833 	WMI_TAG_TWT_PAUSE_DIALOG_CMD,
1834 	WMI_TAG_TWT_RESUME_DIALOG_CMD,
1835 	WMI_TAG_TWT_ENABLE_COMPLETE_EVENT,
1836 	WMI_TAG_TWT_DISABLE_COMPLETE_EVENT,
1837 	WMI_TAG_TWT_ADD_DIALOG_COMPLETE_EVENT,
1838 	WMI_TAG_TWT_DEL_DIALOG_COMPLETE_EVENT,
1839 	WMI_TAG_TWT_PAUSE_DIALOG_COMPLETE_EVENT,
1840 	WMI_TAG_TWT_RESUME_DIALOG_COMPLETE_EVENT,
1841 	WMI_TAG_REQUEST_ROAM_SCAN_STATS_CMD,
1842 	WMI_TAG_ROAM_SCAN_STATS_EVENT,
1843 	WMI_TAG_PEER_TID_CONFIGURATIONS_CMD,
1844 	WMI_TAG_VDEV_SET_CUSTOM_SW_RETRY_TH_CMD,
1845 	WMI_TAG_GET_TPC_POWER_CMD,
1846 	WMI_TAG_GET_TPC_POWER_EVENT,
1847 	WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA,
1848 	WMI_TAG_MOTION_DET_CONFIG_PARAMS_CMD,
1849 	WMI_TAG_MOTION_DET_BASE_LINE_CONFIG_PARAMS_CMD,
1850 	WMI_TAG_MOTION_DET_START_STOP_CMD,
1851 	WMI_TAG_MOTION_DET_BASE_LINE_START_STOP_CMD,
1852 	WMI_TAG_MOTION_DET_EVENT,
1853 	WMI_TAG_MOTION_DET_BASE_LINE_EVENT,
1854 	WMI_TAG_NDP_TRANSPORT_IP,
1855 	WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD,
1856 	WMI_TAG_ESP_ESTIMATE_EVENT,
1857 	WMI_TAG_NAN_HOST_CONFIG,
1858 	WMI_TAG_SPECTRAL_BIN_SCALING_PARAMS,
1859 	WMI_TAG_PEER_CFR_CAPTURE_CMD,
1860 	WMI_TAG_PEER_CHAN_WIDTH_SWITCH_CMD,
1861 	WMI_TAG_CHAN_WIDTH_PEER_LIST,
1862 	WMI_TAG_OBSS_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMD,
1863 	WMI_TAG_PDEV_HE_TB_ACTION_FRM_CMD,
1864 	WMI_TAG_PEER_EXTD2_STATS,
1865 	WMI_TAG_HPCS_PULSE_START_CMD,
1866 	WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT,
1867 	WMI_TAG_VDEV_CHAINMASK_CONFIG_CMD,
1868 	WMI_TAG_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMD,
1869 	WMI_TAG_NAN_EVENT_INFO,
1870 	WMI_TAG_NDP_CHANNEL_INFO,
1871 	WMI_TAG_NDP_CMD,
1872 	WMI_TAG_NDP_EVENT,
1873 	WMI_TAG_PDEV_PEER_PKTLOG_FILTER_CMD = 0x301,
1874 	WMI_TAG_PDEV_PEER_PKTLOG_FILTER_INFO,
1875 	WMI_TAG_FILS_DISCOVERY_TMPL_CMD = 0x344,
1876 	WMI_TAG_PDEV_SRG_BSS_COLOR_BITMAP_CMD = 0x37b,
1877 	WMI_TAG_PDEV_SRG_PARTIAL_BSSID_BITMAP_CMD,
1878 	WMI_TAG_PDEV_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD = 0x381,
1879 	WMI_TAG_PDEV_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD,
1880 	WMI_TAG_PDEV_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD,
1881 	WMI_TAG_PDEV_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD,
1882 	WMI_TAG_REGULATORY_RULE_EXT_STRUCT = 0x3A9,
1883 	WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT,
1884 	WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD = 0x3D8,
1885 	WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD,
1886 	WMI_TAG_MAX
1887 };
1888 
1889 enum wmi_tlv_service {
1890 	WMI_TLV_SERVICE_BEACON_OFFLOAD = 0,
1891 	WMI_TLV_SERVICE_SCAN_OFFLOAD = 1,
1892 	WMI_TLV_SERVICE_ROAM_SCAN_OFFLOAD = 2,
1893 	WMI_TLV_SERVICE_BCN_MISS_OFFLOAD = 3,
1894 	WMI_TLV_SERVICE_STA_PWRSAVE = 4,
1895 	WMI_TLV_SERVICE_STA_ADVANCED_PWRSAVE = 5,
1896 	WMI_TLV_SERVICE_AP_UAPSD = 6,
1897 	WMI_TLV_SERVICE_AP_DFS = 7,
1898 	WMI_TLV_SERVICE_11AC = 8,
1899 	WMI_TLV_SERVICE_BLOCKACK = 9,
1900 	WMI_TLV_SERVICE_PHYERR = 10,
1901 	WMI_TLV_SERVICE_BCN_FILTER = 11,
1902 	WMI_TLV_SERVICE_RTT = 12,
1903 	WMI_TLV_SERVICE_WOW = 13,
1904 	WMI_TLV_SERVICE_RATECTRL_CACHE = 14,
1905 	WMI_TLV_SERVICE_IRAM_TIDS = 15,
1906 	WMI_TLV_SERVICE_ARPNS_OFFLOAD = 16,
1907 	WMI_TLV_SERVICE_NLO = 17,
1908 	WMI_TLV_SERVICE_GTK_OFFLOAD = 18,
1909 	WMI_TLV_SERVICE_SCAN_SCH = 19,
1910 	WMI_TLV_SERVICE_CSA_OFFLOAD = 20,
1911 	WMI_TLV_SERVICE_CHATTER = 21,
1912 	WMI_TLV_SERVICE_COEX_FREQAVOID = 22,
1913 	WMI_TLV_SERVICE_PACKET_POWER_SAVE = 23,
1914 	WMI_TLV_SERVICE_FORCE_FW_HANG = 24,
1915 	WMI_TLV_SERVICE_GPIO = 25,
1916 	WMI_TLV_SERVICE_STA_DTIM_PS_MODULATED_DTIM = 26,
1917 	WMI_STA_UAPSD_BASIC_AUTO_TRIG = 27,
1918 	WMI_STA_UAPSD_VAR_AUTO_TRIG = 28,
1919 	WMI_TLV_SERVICE_STA_KEEP_ALIVE = 29,
1920 	WMI_TLV_SERVICE_TX_ENCAP = 30,
1921 	WMI_TLV_SERVICE_AP_PS_DETECT_OUT_OF_SYNC = 31,
1922 	WMI_TLV_SERVICE_EARLY_RX = 32,
1923 	WMI_TLV_SERVICE_STA_SMPS = 33,
1924 	WMI_TLV_SERVICE_FWTEST = 34,
1925 	WMI_TLV_SERVICE_STA_WMMAC = 35,
1926 	WMI_TLV_SERVICE_TDLS = 36,
1927 	WMI_TLV_SERVICE_BURST = 37,
1928 	WMI_TLV_SERVICE_MCC_BCN_INTERVAL_CHANGE = 38,
1929 	WMI_TLV_SERVICE_ADAPTIVE_OCS = 39,
1930 	WMI_TLV_SERVICE_BA_SSN_SUPPORT = 40,
1931 	WMI_TLV_SERVICE_FILTER_IPSEC_NATKEEPALIVE = 41,
1932 	WMI_TLV_SERVICE_WLAN_HB = 42,
1933 	WMI_TLV_SERVICE_LTE_ANT_SHARE_SUPPORT = 43,
1934 	WMI_TLV_SERVICE_BATCH_SCAN = 44,
1935 	WMI_TLV_SERVICE_QPOWER = 45,
1936 	WMI_TLV_SERVICE_PLMREQ = 46,
1937 	WMI_TLV_SERVICE_THERMAL_MGMT = 47,
1938 	WMI_TLV_SERVICE_RMC = 48,
1939 	WMI_TLV_SERVICE_MHF_OFFLOAD = 49,
1940 	WMI_TLV_SERVICE_COEX_SAR = 50,
1941 	WMI_TLV_SERVICE_BCN_TXRATE_OVERRIDE = 51,
1942 	WMI_TLV_SERVICE_NAN = 52,
1943 	WMI_TLV_SERVICE_L1SS_STAT = 53,
1944 	WMI_TLV_SERVICE_ESTIMATE_LINKSPEED = 54,
1945 	WMI_TLV_SERVICE_OBSS_SCAN = 55,
1946 	WMI_TLV_SERVICE_TDLS_OFFCHAN = 56,
1947 	WMI_TLV_SERVICE_TDLS_UAPSD_BUFFER_STA = 57,
1948 	WMI_TLV_SERVICE_TDLS_UAPSD_SLEEP_STA = 58,
1949 	WMI_TLV_SERVICE_IBSS_PWRSAVE = 59,
1950 	WMI_TLV_SERVICE_LPASS = 60,
1951 	WMI_TLV_SERVICE_EXTSCAN = 61,
1952 	WMI_TLV_SERVICE_D0WOW = 62,
1953 	WMI_TLV_SERVICE_HSOFFLOAD = 63,
1954 	WMI_TLV_SERVICE_ROAM_HO_OFFLOAD = 64,
1955 	WMI_TLV_SERVICE_RX_FULL_REORDER = 65,
1956 	WMI_TLV_SERVICE_DHCP_OFFLOAD = 66,
1957 	WMI_TLV_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT = 67,
1958 	WMI_TLV_SERVICE_MDNS_OFFLOAD = 68,
1959 	WMI_TLV_SERVICE_SAP_AUTH_OFFLOAD = 69,
1960 	WMI_TLV_SERVICE_DUAL_BAND_SIMULTANEOUS_SUPPORT = 70,
1961 	WMI_TLV_SERVICE_OCB = 71,
1962 	WMI_TLV_SERVICE_AP_ARPNS_OFFLOAD = 72,
1963 	WMI_TLV_SERVICE_PER_BAND_CHAINMASK_SUPPORT = 73,
1964 	WMI_TLV_SERVICE_PACKET_FILTER_OFFLOAD = 74,
1965 	WMI_TLV_SERVICE_MGMT_TX_HTT = 75,
1966 	WMI_TLV_SERVICE_MGMT_TX_WMI = 76,
1967 	WMI_TLV_SERVICE_EXT_MSG = 77,
1968 	WMI_TLV_SERVICE_MAWC = 78,
1969 	WMI_TLV_SERVICE_PEER_ASSOC_CONF = 79,
1970 	WMI_TLV_SERVICE_EGAP = 80,
1971 	WMI_TLV_SERVICE_STA_PMF_OFFLOAD = 81,
1972 	WMI_TLV_SERVICE_UNIFIED_WOW_CAPABILITY = 82,
1973 	WMI_TLV_SERVICE_ENHANCED_PROXY_STA = 83,
1974 	WMI_TLV_SERVICE_ATF = 84,
1975 	WMI_TLV_SERVICE_COEX_GPIO = 85,
1976 	WMI_TLV_SERVICE_AUX_SPECTRAL_INTF = 86,
1977 	WMI_TLV_SERVICE_AUX_CHAN_LOAD_INTF = 87,
1978 	WMI_TLV_SERVICE_BSS_CHANNEL_INFO_64 = 88,
1979 	WMI_TLV_SERVICE_ENTERPRISE_MESH = 89,
1980 	WMI_TLV_SERVICE_RESTRT_CHNL_SUPPORT = 90,
1981 	WMI_TLV_SERVICE_BPF_OFFLOAD = 91,
1982 	WMI_TLV_SERVICE_SYNC_DELETE_CMDS = 92,
1983 	WMI_TLV_SERVICE_SMART_ANTENNA_SW_SUPPORT = 93,
1984 	WMI_TLV_SERVICE_SMART_ANTENNA_HW_SUPPORT = 94,
1985 	WMI_TLV_SERVICE_RATECTRL_LIMIT_MAX_MIN_RATES = 95,
1986 	WMI_TLV_SERVICE_NAN_DATA = 96,
1987 	WMI_TLV_SERVICE_NAN_RTT = 97,
1988 	WMI_TLV_SERVICE_11AX = 98,
1989 	WMI_TLV_SERVICE_DEPRECATED_REPLACE = 99,
1990 	WMI_TLV_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE = 100,
1991 	WMI_TLV_SERVICE_ENHANCED_MCAST_FILTER = 101,
1992 	WMI_TLV_SERVICE_PERIODIC_CHAN_STAT_SUPPORT = 102,
1993 	WMI_TLV_SERVICE_MESH_11S = 103,
1994 	WMI_TLV_SERVICE_HALF_RATE_QUARTER_RATE_SUPPORT = 104,
1995 	WMI_TLV_SERVICE_VDEV_RX_FILTER = 105,
1996 	WMI_TLV_SERVICE_P2P_LISTEN_OFFLOAD_SUPPORT = 106,
1997 	WMI_TLV_SERVICE_MARK_FIRST_WAKEUP_PACKET = 107,
1998 	WMI_TLV_SERVICE_MULTIPLE_MCAST_FILTER_SET = 108,
1999 	WMI_TLV_SERVICE_HOST_MANAGED_RX_REORDER = 109,
2000 	WMI_TLV_SERVICE_FLASH_RDWR_SUPPORT = 110,
2001 	WMI_TLV_SERVICE_WLAN_STATS_REPORT = 111,
2002 	WMI_TLV_SERVICE_TX_MSDU_ID_NEW_PARTITION_SUPPORT = 112,
2003 	WMI_TLV_SERVICE_DFS_PHYERR_OFFLOAD = 113,
2004 	WMI_TLV_SERVICE_RCPI_SUPPORT = 114,
2005 	WMI_TLV_SERVICE_FW_MEM_DUMP_SUPPORT = 115,
2006 	WMI_TLV_SERVICE_PEER_STATS_INFO = 116,
2007 	WMI_TLV_SERVICE_REGULATORY_DB = 117,
2008 	WMI_TLV_SERVICE_11D_OFFLOAD = 118,
2009 	WMI_TLV_SERVICE_HW_DATA_FILTERING = 119,
2010 	WMI_TLV_SERVICE_MULTIPLE_VDEV_RESTART = 120,
2011 	WMI_TLV_SERVICE_PKT_ROUTING = 121,
2012 	WMI_TLV_SERVICE_CHECK_CAL_VERSION = 122,
2013 	WMI_TLV_SERVICE_OFFCHAN_TX_WMI = 123,
2014 	WMI_TLV_SERVICE_8SS_TX_BFEE  =  124,
2015 	WMI_TLV_SERVICE_EXTENDED_NSS_SUPPORT = 125,
2016 	WMI_TLV_SERVICE_ACK_TIMEOUT = 126,
2017 	WMI_TLV_SERVICE_PDEV_BSS_CHANNEL_INFO_64 = 127,
2018 
2019 	/* The first 128 bits */
2020 	WMI_MAX_SERVICE = 128,
2021 
2022 	WMI_TLV_SERVICE_CHAN_LOAD_INFO = 128,
2023 	WMI_TLV_SERVICE_TX_PPDU_INFO_STATS_SUPPORT = 129,
2024 	WMI_TLV_SERVICE_VDEV_LIMIT_OFFCHAN_SUPPORT = 130,
2025 	WMI_TLV_SERVICE_FILS_SUPPORT = 131,
2026 	WMI_TLV_SERVICE_WLAN_OIC_PING_OFFLOAD = 132,
2027 	WMI_TLV_SERVICE_WLAN_DHCP_RENEW = 133,
2028 	WMI_TLV_SERVICE_MAWC_SUPPORT = 134,
2029 	WMI_TLV_SERVICE_VDEV_LATENCY_CONFIG = 135,
2030 	WMI_TLV_SERVICE_PDEV_UPDATE_CTLTABLE_SUPPORT = 136,
2031 	WMI_TLV_SERVICE_PKTLOG_SUPPORT_OVER_HTT = 137,
2032 	WMI_TLV_SERVICE_VDEV_MULTI_GROUP_KEY_SUPPORT = 138,
2033 	WMI_TLV_SERVICE_SCAN_PHYMODE_SUPPORT = 139,
2034 	WMI_TLV_SERVICE_THERM_THROT = 140,
2035 	WMI_TLV_SERVICE_BCN_OFFLOAD_START_STOP_SUPPORT = 141,
2036 	WMI_TLV_SERVICE_WOW_WAKEUP_BY_TIMER_PATTERN = 142,
2037 	WMI_TLV_SERVICE_PEER_MAP_UNMAP_V2_SUPPORT = 143,
2038 	WMI_TLV_SERVICE_OFFCHAN_DATA_TID_SUPPORT = 144,
2039 	WMI_TLV_SERVICE_RX_PROMISC_ENABLE_SUPPORT = 145,
2040 	WMI_TLV_SERVICE_SUPPORT_DIRECT_DMA = 146,
2041 	WMI_TLV_SERVICE_AP_OBSS_DETECTION_OFFLOAD = 147,
2042 	WMI_TLV_SERVICE_11K_NEIGHBOUR_REPORT_SUPPORT = 148,
2043 	WMI_TLV_SERVICE_LISTEN_INTERVAL_OFFLOAD_SUPPORT = 149,
2044 	WMI_TLV_SERVICE_BSS_COLOR_OFFLOAD = 150,
2045 	WMI_TLV_SERVICE_RUNTIME_DPD_RECAL = 151,
2046 	WMI_TLV_SERVICE_STA_TWT = 152,
2047 	WMI_TLV_SERVICE_AP_TWT = 153,
2048 	WMI_TLV_SERVICE_GMAC_OFFLOAD_SUPPORT = 154,
2049 	WMI_TLV_SERVICE_SPOOF_MAC_SUPPORT = 155,
2050 	WMI_TLV_SERVICE_PEER_TID_CONFIGS_SUPPORT = 156,
2051 	WMI_TLV_SERVICE_VDEV_SWRETRY_PER_AC_CONFIG_SUPPORT = 157,
2052 	WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_SCC_SUPPORT = 158,
2053 	WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_MCC_SUPPORT = 159,
2054 	WMI_TLV_SERVICE_MOTION_DET = 160,
2055 	WMI_TLV_SERVICE_INFRA_MBSSID = 161,
2056 	WMI_TLV_SERVICE_OBSS_SPATIAL_REUSE = 162,
2057 	WMI_TLV_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT = 163,
2058 	WMI_TLV_SERVICE_NAN_DBS_SUPPORT = 164,
2059 	WMI_TLV_SERVICE_NDI_DBS_SUPPORT = 165,
2060 	WMI_TLV_SERVICE_NAN_SAP_SUPPORT = 166,
2061 	WMI_TLV_SERVICE_NDI_SAP_SUPPORT = 167,
2062 	WMI_TLV_SERVICE_CFR_CAPTURE_SUPPORT = 168,
2063 	WMI_TLV_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_1 = 169,
2064 	WMI_TLV_SERVICE_ESP_SUPPORT = 170,
2065 	WMI_TLV_SERVICE_PEER_CHWIDTH_CHANGE = 171,
2066 	WMI_TLV_SERVICE_WLAN_HPCS_PULSE = 172,
2067 	WMI_TLV_SERVICE_PER_VDEV_CHAINMASK_CONFIG_SUPPORT = 173,
2068 	WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI = 174,
2069 	WMI_TLV_SERVICE_NAN_DISABLE_SUPPORT = 175,
2070 	WMI_TLV_SERVICE_HTT_H2T_NO_HTC_HDR_LEN_IN_MSG_LEN = 176,
2071 	WMI_TLV_SERVICE_COEX_SUPPORT_UNEQUAL_ISOLATION = 177,
2072 	WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT = 178,
2073 	WMI_TLV_SERVICE_SUPPORT_EXTEND_ADDRESS = 179,
2074 	WMI_TLV_SERVICE_BEACON_RECEPTION_STATS = 180,
2075 	WMI_TLV_SERVICE_FETCH_TX_PN = 181,
2076 	WMI_TLV_SERVICE_PEER_UNMAP_RESPONSE_SUPPORT = 182,
2077 	WMI_TLV_SERVICE_TX_PER_PEER_AMPDU_SIZE = 183,
2078 	WMI_TLV_SERVICE_BSS_COLOR_SWITCH_COUNT = 184,
2079 	WMI_TLV_SERVICE_HTT_PEER_STATS_SUPPORT = 185,
2080 	WMI_TLV_SERVICE_UL_RU26_ALLOWED = 186,
2081 	WMI_TLV_SERVICE_GET_MWS_COEX_STATE = 187,
2082 	WMI_TLV_SERVICE_GET_MWS_DPWB_STATE = 188,
2083 	WMI_TLV_SERVICE_GET_MWS_TDM_STATE = 189,
2084 	WMI_TLV_SERVICE_GET_MWS_IDRX_STATE = 190,
2085 	WMI_TLV_SERVICE_GET_MWS_ANTENNA_SHARING_STATE = 191,
2086 	WMI_TLV_SERVICE_ENHANCED_TPC_CONFIG_EVENT = 192,
2087 	WMI_TLV_SERVICE_WLM_STATS_REQUEST = 193,
2088 	WMI_TLV_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT = 194,
2089 	WMI_TLV_SERVICE_WPA3_FT_SAE_SUPPORT = 195,
2090 	WMI_TLV_SERVICE_WPA3_FT_SUITE_B_SUPPORT = 196,
2091 	WMI_TLV_SERVICE_VOW_ENABLE = 197,
2092 	WMI_TLV_SERVICE_CFR_CAPTURE_IND_EVT_TYPE_1 = 198,
2093 	WMI_TLV_SERVICE_BROADCAST_TWT = 199,
2094 	WMI_TLV_SERVICE_RAP_DETECTION_SUPPORT = 200,
2095 	WMI_TLV_SERVICE_PS_TDCC = 201,
2096 	WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_LEGACY   = 202,
2097 	WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_OVERRIDE = 203,
2098 	WMI_TLV_SERVICE_TX_PWR_PER_PEER = 204,
2099 	WMI_TLV_SERVICE_STA_PLUS_STA_SUPPORT = 205,
2100 	WMI_TLV_SERVICE_WPA3_FT_FILS = 206,
2101 	WMI_TLV_SERVICE_ADAPTIVE_11R_ROAM = 207,
2102 	WMI_TLV_SERVICE_CHAN_RF_CHARACTERIZATION_INFO = 208,
2103 	WMI_TLV_SERVICE_FW_IFACE_COMBINATION_SUPPORT = 209,
2104 	WMI_TLV_SERVICE_TX_COMPL_TSF64 = 210,
2105 	WMI_TLV_SERVICE_DSM_ROAM_FILTER = 211,
2106 	WMI_TLV_SERVICE_PACKET_CAPTURE_SUPPORT = 212,
2107 	WMI_TLV_SERVICE_PER_PEER_HTT_STATS_RESET = 213,
2108 	WMI_TLV_SERVICE_FREQINFO_IN_METADATA = 219,
2109 	WMI_TLV_SERVICE_EXT2_MSG = 220,
2110 	WMI_TLV_SERVICE_PEER_POWER_SAVE_DURATION_SUPPORT = 246,
2111 	WMI_TLV_SERVICE_SRG_SRP_SPATIAL_REUSE_SUPPORT = 249,
2112 	WMI_TLV_SERVICE_MBSS_PARAM_IN_VDEV_START_SUPPORT = 253,
2113 	WMI_TLV_SERVICE_PASSIVE_SCAN_START_TIME_ENHANCE = 263,
2114 
2115 	/* The second 128 bits */
2116 	WMI_MAX_EXT_SERVICE = 256,
2117 	WMI_TLV_SERVICE_SCAN_CONFIG_PER_CHANNEL = 265,
2118 	WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT = 281,
2119 	WMI_TLV_SERVICE_BIOS_SAR_SUPPORT = 326,
2120 	WMI_TLV_SERVICE_SUPPORT_11D_FOR_HOST_SCAN = 357,
2121 
2122 	/* The third 128 bits */
2123 	WMI_MAX_EXT2_SERVICE = 384
2124 };
2125 
2126 enum {
2127 	WMI_SMPS_FORCED_MODE_NONE = 0,
2128 	WMI_SMPS_FORCED_MODE_DISABLED,
2129 	WMI_SMPS_FORCED_MODE_STATIC,
2130 	WMI_SMPS_FORCED_MODE_DYNAMIC
2131 };
2132 
2133 #define WMI_TPC_CHAINMASK_CONFIG_BAND_2G      0
2134 #define WMI_TPC_CHAINMASK_CONFIG_BAND_5G      1
2135 #define WMI_NUM_SUPPORTED_BAND_MAX 2
2136 
2137 #define WMI_PEER_MIMO_PS_STATE                          0x1
2138 #define WMI_PEER_AMPDU                                  0x2
2139 #define WMI_PEER_AUTHORIZE                              0x3
2140 #define WMI_PEER_CHWIDTH                                0x4
2141 #define WMI_PEER_NSS                                    0x5
2142 #define WMI_PEER_USE_4ADDR                              0x6
2143 #define WMI_PEER_MEMBERSHIP                             0x7
2144 #define WMI_PEER_USERPOS                                0x8
2145 #define WMI_PEER_CRIT_PROTO_HINT_ENABLED                0x9
2146 #define WMI_PEER_TX_FAIL_CNT_THR                        0xA
2147 #define WMI_PEER_SET_HW_RETRY_CTS2S                     0xB
2148 #define WMI_PEER_IBSS_ATIM_WINDOW_LENGTH                0xC
2149 #define WMI_PEER_PHYMODE                                0xD
2150 #define WMI_PEER_USE_FIXED_PWR                          0xE
2151 #define WMI_PEER_PARAM_FIXED_RATE                       0xF
2152 #define WMI_PEER_SET_MU_WHITELIST                       0x10
2153 #define WMI_PEER_SET_MAX_TX_RATE                        0x11
2154 #define WMI_PEER_SET_MIN_TX_RATE                        0x12
2155 #define WMI_PEER_SET_DEFAULT_ROUTING                    0x13
2156 
2157 /* slot time long */
2158 #define WMI_VDEV_SLOT_TIME_LONG         0x1
2159 /* slot time short */
2160 #define WMI_VDEV_SLOT_TIME_SHORT        0x2
2161 /* preablbe long */
2162 #define WMI_VDEV_PREAMBLE_LONG          0x1
2163 /* preablbe short */
2164 #define WMI_VDEV_PREAMBLE_SHORT         0x2
2165 
2166 enum wmi_peer_smps_state {
2167 	WMI_PEER_SMPS_PS_NONE = 0x0,
2168 	WMI_PEER_SMPS_STATIC  = 0x1,
2169 	WMI_PEER_SMPS_DYNAMIC = 0x2
2170 };
2171 
2172 enum wmi_peer_chwidth {
2173 	WMI_PEER_CHWIDTH_20MHZ = 0,
2174 	WMI_PEER_CHWIDTH_40MHZ = 1,
2175 	WMI_PEER_CHWIDTH_80MHZ = 2,
2176 	WMI_PEER_CHWIDTH_160MHZ = 3,
2177 };
2178 
2179 enum wmi_beacon_gen_mode {
2180 	WMI_BEACON_STAGGERED_MODE = 0,
2181 	WMI_BEACON_BURST_MODE = 1
2182 };
2183 
2184 enum wmi_direct_buffer_module {
2185 	WMI_DIRECT_BUF_SPECTRAL = 0,
2186 	WMI_DIRECT_BUF_CFR = 1,
2187 
2188 	/* keep it last */
2189 	WMI_DIRECT_BUF_MAX
2190 };
2191 
2192 /* enum wmi_nss_ratio - NSS ratio received from FW during service ready ext
2193  *			event
2194  * WMI_NSS_RATIO_1BY2_NSS -Max nss of 160MHz is equals to half of the max nss
2195  *			   of 80MHz
2196  * WMI_NSS_RATIO_3BY4_NSS - Max nss of 160MHz is equals to 3/4 of the max nss
2197  *			    of 80MHz
2198  * WMI_NSS_RATIO_1_NSS - Max nss of 160MHz is equals to the max nss of 80MHz
2199  * WMI_NSS_RATIO_2_NSS - Max nss of 160MHz is equals to two times the max
2200  *			 nss of 80MHz
2201  */
2202 
2203 enum wmi_nss_ratio {
2204 	WMI_NSS_RATIO_1BY2_NSS = 0x0,
2205 	WMI_NSS_RATIO_3BY4_NSS = 0x1,
2206 	WMI_NSS_RATIO_1_NSS = 0x2,
2207 	WMI_NSS_RATIO_2_NSS = 0x3,
2208 };
2209 
2210 enum wmi_dtim_policy {
2211 	WMI_DTIM_POLICY_IGNORE = 1,
2212 	WMI_DTIM_POLICY_NORMAL = 2,
2213 	WMI_DTIM_POLICY_STICK  = 3,
2214 	WMI_DTIM_POLICY_AUTO   = 4,
2215 };
2216 
2217 struct wmi_host_pdev_band_to_mac {
2218 	u32 pdev_id;
2219 	u32 start_freq;
2220 	u32 end_freq;
2221 };
2222 
2223 struct ath11k_ppe_threshold {
2224 	u32 numss_m1;
2225 	u32 ru_bit_mask;
2226 	u32 ppet16_ppet8_ru3_ru0[PSOC_HOST_MAX_NUM_SS];
2227 };
2228 
2229 struct ath11k_service_ext_param {
2230 	u32 default_conc_scan_config_bits;
2231 	u32 default_fw_config_bits;
2232 	struct ath11k_ppe_threshold ppet;
2233 	u32 he_cap_info;
2234 	u32 mpdu_density;
2235 	u32 max_bssid_rx_filters;
2236 	u32 num_hw_modes;
2237 	u32 num_phy;
2238 };
2239 
2240 struct ath11k_hw_mode_caps {
2241 	u32 hw_mode_id;
2242 	u32 phy_id_map;
2243 	u32 hw_mode_config_type;
2244 };
2245 
2246 #define PSOC_HOST_MAX_PHY_SIZE (3)
2247 #define ATH11K_11B_SUPPORT                 BIT(0)
2248 #define ATH11K_11G_SUPPORT                 BIT(1)
2249 #define ATH11K_11A_SUPPORT                 BIT(2)
2250 #define ATH11K_11N_SUPPORT                 BIT(3)
2251 #define ATH11K_11AC_SUPPORT                BIT(4)
2252 #define ATH11K_11AX_SUPPORT                BIT(5)
2253 
2254 struct ath11k_hal_reg_capabilities_ext {
2255 	u32 phy_id;
2256 	u32 eeprom_reg_domain;
2257 	u32 eeprom_reg_domain_ext;
2258 	u32 regcap1;
2259 	u32 regcap2;
2260 	u32 wireless_modes;
2261 	u32 low_2ghz_chan;
2262 	u32 high_2ghz_chan;
2263 	u32 low_5ghz_chan;
2264 	u32 high_5ghz_chan;
2265 };
2266 
2267 #define WMI_HOST_MAX_PDEV 3
2268 
2269 struct wlan_host_mem_chunk {
2270 	u32 tlv_header;
2271 	u32 req_id;
2272 	u32 ptr;
2273 	u32 size;
2274 } __packed;
2275 
2276 struct wmi_host_mem_chunk {
2277 	void *vaddr;
2278 	dma_addr_t paddr;
2279 	u32 len;
2280 	u32 req_id;
2281 };
2282 
2283 struct wmi_init_cmd_param {
2284 	u32 tlv_header;
2285 	struct target_resource_config *res_cfg;
2286 	u8 num_mem_chunks;
2287 	struct wmi_host_mem_chunk *mem_chunks;
2288 	u32 hw_mode_id;
2289 	u32 num_band_to_mac;
2290 	struct wmi_host_pdev_band_to_mac band_to_mac[WMI_HOST_MAX_PDEV];
2291 };
2292 
2293 struct wmi_pdev_band_to_mac {
2294 	u32 tlv_header;
2295 	u32 pdev_id;
2296 	u32 start_freq;
2297 	u32 end_freq;
2298 } __packed;
2299 
2300 struct wmi_pdev_set_hw_mode_cmd_param {
2301 	u32 tlv_header;
2302 	u32 pdev_id;
2303 	u32 hw_mode_index;
2304 	u32 num_band_to_mac;
2305 } __packed;
2306 
2307 struct wmi_ppe_threshold {
2308 	u32 numss_m1; /** NSS - 1*/
2309 	union {
2310 		u32 ru_count;
2311 		u32 ru_mask;
2312 	} __packed;
2313 	u32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS];
2314 } __packed;
2315 
2316 #define HW_BD_INFO_SIZE       5
2317 
2318 struct wmi_abi_version {
2319 	u32 abi_version_0;
2320 	u32 abi_version_1;
2321 	u32 abi_version_ns_0;
2322 	u32 abi_version_ns_1;
2323 	u32 abi_version_ns_2;
2324 	u32 abi_version_ns_3;
2325 } __packed;
2326 
2327 struct wmi_init_cmd {
2328 	u32 tlv_header;
2329 	struct wmi_abi_version host_abi_vers;
2330 	u32 num_host_mem_chunks;
2331 } __packed;
2332 
2333 #define WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 BIT(5)
2334 #define WMI_RSRC_CFG_FLAG2_CALC_NEXT_DTIM_COUNT_SET BIT(9)
2335 #define WMI_RSRC_CFG_FLAG1_ACK_RSSI BIT(18)
2336 
2337 #define WMI_CFG_HOST_SERVICE_FLAG_REG_CC_EXT 4
2338 
2339 struct wmi_resource_config {
2340 	u32 tlv_header;
2341 	u32 num_vdevs;
2342 	u32 num_peers;
2343 	u32 num_offload_peers;
2344 	u32 num_offload_reorder_buffs;
2345 	u32 num_peer_keys;
2346 	u32 num_tids;
2347 	u32 ast_skid_limit;
2348 	u32 tx_chain_mask;
2349 	u32 rx_chain_mask;
2350 	u32 rx_timeout_pri[4];
2351 	u32 rx_decap_mode;
2352 	u32 scan_max_pending_req;
2353 	u32 bmiss_offload_max_vdev;
2354 	u32 roam_offload_max_vdev;
2355 	u32 roam_offload_max_ap_profiles;
2356 	u32 num_mcast_groups;
2357 	u32 num_mcast_table_elems;
2358 	u32 mcast2ucast_mode;
2359 	u32 tx_dbg_log_size;
2360 	u32 num_wds_entries;
2361 	u32 dma_burst_size;
2362 	u32 mac_aggr_delim;
2363 	u32 rx_skip_defrag_timeout_dup_detection_check;
2364 	u32 vow_config;
2365 	u32 gtk_offload_max_vdev;
2366 	u32 num_msdu_desc;
2367 	u32 max_frag_entries;
2368 	u32 num_tdls_vdevs;
2369 	u32 num_tdls_conn_table_entries;
2370 	u32 beacon_tx_offload_max_vdev;
2371 	u32 num_multicast_filter_entries;
2372 	u32 num_wow_filters;
2373 	u32 num_keep_alive_pattern;
2374 	u32 keep_alive_pattern_size;
2375 	u32 max_tdls_concurrent_sleep_sta;
2376 	u32 max_tdls_concurrent_buffer_sta;
2377 	u32 wmi_send_separate;
2378 	u32 num_ocb_vdevs;
2379 	u32 num_ocb_channels;
2380 	u32 num_ocb_schedules;
2381 	u32 flag1;
2382 	u32 smart_ant_cap;
2383 	u32 bk_minfree;
2384 	u32 be_minfree;
2385 	u32 vi_minfree;
2386 	u32 vo_minfree;
2387 	u32 alloc_frag_desc_for_data_pkt;
2388 	u32 num_ns_ext_tuples_cfg;
2389 	u32 bpf_instruction_size;
2390 	u32 max_bssid_rx_filters;
2391 	u32 use_pdev_id;
2392 	u32 max_num_dbs_scan_duty_cycle;
2393 	u32 max_num_group_keys;
2394 	u32 peer_map_unmap_v2_support;
2395 	u32 sched_params;
2396 	u32 twt_ap_pdev_count;
2397 	u32 twt_ap_sta_count;
2398 	u32 max_nlo_ssids;
2399 	u32 num_pkt_filters;
2400 	u32 num_max_sta_vdevs;
2401 	u32 max_bssid_indicator;
2402 	u32 ul_resp_config;
2403 	u32 msdu_flow_override_config0;
2404 	u32 msdu_flow_override_config1;
2405 	u32 flags2;
2406 	u32 host_service_flags;
2407 	u32 max_rnr_neighbours;
2408 	u32 ema_max_vap_cnt;
2409 	u32 ema_max_profile_period;
2410 } __packed;
2411 
2412 struct wmi_service_ready_event {
2413 	u32 fw_build_vers;
2414 	struct wmi_abi_version fw_abi_vers;
2415 	u32 phy_capability;
2416 	u32 max_frag_entry;
2417 	u32 num_rf_chains;
2418 	u32 ht_cap_info;
2419 	u32 vht_cap_info;
2420 	u32 vht_supp_mcs;
2421 	u32 hw_min_tx_power;
2422 	u32 hw_max_tx_power;
2423 	u32 sys_cap_info;
2424 	u32 min_pkt_size_enable;
2425 	u32 max_bcn_ie_size;
2426 	u32 num_mem_reqs;
2427 	u32 max_num_scan_channels;
2428 	u32 hw_bd_id;
2429 	u32 hw_bd_info[HW_BD_INFO_SIZE];
2430 	u32 max_supported_macs;
2431 	u32 wmi_fw_sub_feat_caps;
2432 	u32 num_dbs_hw_modes;
2433 	/* txrx_chainmask
2434 	 *    [7:0]   - 2G band tx chain mask
2435 	 *    [15:8]  - 2G band rx chain mask
2436 	 *    [23:16] - 5G band tx chain mask
2437 	 *    [31:24] - 5G band rx chain mask
2438 	 */
2439 	u32 txrx_chainmask;
2440 	u32 default_dbs_hw_mode_index;
2441 	u32 num_msdu_desc;
2442 } __packed;
2443 
2444 #define WMI_SERVICE_BM_SIZE	((WMI_MAX_SERVICE + sizeof(u32) - 1) / sizeof(u32))
2445 
2446 #define WMI_SERVICE_SEGMENT_BM_SIZE32 4 /* 4x u32 = 128 bits */
2447 #define WMI_SERVICE_EXT_BM_SIZE (WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32))
2448 #define WMI_AVAIL_SERVICE_BITS_IN_SIZE32 32
2449 #define WMI_SERVICE_BITS_IN_SIZE32 4
2450 
2451 struct wmi_service_ready_ext_event {
2452 	u32 default_conc_scan_config_bits;
2453 	u32 default_fw_config_bits;
2454 	struct wmi_ppe_threshold ppet;
2455 	u32 he_cap_info;
2456 	u32 mpdu_density;
2457 	u32 max_bssid_rx_filters;
2458 	u32 fw_build_vers_ext;
2459 	u32 max_nlo_ssids;
2460 	u32 max_bssid_indicator;
2461 	u32 he_cap_info_ext;
2462 } __packed;
2463 
2464 struct wmi_soc_mac_phy_hw_mode_caps {
2465 	u32 num_hw_modes;
2466 	u32 num_chainmask_tables;
2467 } __packed;
2468 
2469 struct wmi_hw_mode_capabilities {
2470 	u32 tlv_header;
2471 	u32 hw_mode_id;
2472 	u32 phy_id_map;
2473 	u32 hw_mode_config_type;
2474 } __packed;
2475 
2476 #define WMI_MAX_HECAP_PHY_SIZE                 (3)
2477 #define WMI_NSS_RATIO_ENABLE_DISABLE_BITPOS    BIT(0)
2478 #define WMI_NSS_RATIO_ENABLE_DISABLE_GET(_val) \
2479 	FIELD_GET(WMI_NSS_RATIO_ENABLE_DISABLE_BITPOS, _val)
2480 #define WMI_NSS_RATIO_INFO_BITPOS              GENMASK(4, 1)
2481 #define WMI_NSS_RATIO_INFO_GET(_val) \
2482 	FIELD_GET(WMI_NSS_RATIO_INFO_BITPOS, _val)
2483 
2484 struct wmi_mac_phy_capabilities {
2485 	u32 hw_mode_id;
2486 	u32 pdev_id;
2487 	u32 phy_id;
2488 	u32 supported_flags;
2489 	u32 supported_bands;
2490 	u32 ampdu_density;
2491 	u32 max_bw_supported_2g;
2492 	u32 ht_cap_info_2g;
2493 	u32 vht_cap_info_2g;
2494 	u32 vht_supp_mcs_2g;
2495 	u32 he_cap_info_2g;
2496 	u32 he_supp_mcs_2g;
2497 	u32 tx_chain_mask_2g;
2498 	u32 rx_chain_mask_2g;
2499 	u32 max_bw_supported_5g;
2500 	u32 ht_cap_info_5g;
2501 	u32 vht_cap_info_5g;
2502 	u32 vht_supp_mcs_5g;
2503 	u32 he_cap_info_5g;
2504 	u32 he_supp_mcs_5g;
2505 	u32 tx_chain_mask_5g;
2506 	u32 rx_chain_mask_5g;
2507 	u32 he_cap_phy_info_2g[WMI_MAX_HECAP_PHY_SIZE];
2508 	u32 he_cap_phy_info_5g[WMI_MAX_HECAP_PHY_SIZE];
2509 	struct wmi_ppe_threshold he_ppet2g;
2510 	struct wmi_ppe_threshold he_ppet5g;
2511 	u32 chainmask_table_id;
2512 	u32 lmac_id;
2513 	u32 he_cap_info_2g_ext;
2514 	u32 he_cap_info_5g_ext;
2515 	u32 he_cap_info_internal;
2516 	u32 wireless_modes;
2517 	u32 low_2ghz_chan_freq;
2518 	u32 high_2ghz_chan_freq;
2519 	u32 low_5ghz_chan_freq;
2520 	u32 high_5ghz_chan_freq;
2521 	u32 nss_ratio;
2522 } __packed;
2523 
2524 struct wmi_hal_reg_capabilities_ext {
2525 	u32 tlv_header;
2526 	u32 phy_id;
2527 	u32 eeprom_reg_domain;
2528 	u32 eeprom_reg_domain_ext;
2529 	u32 regcap1;
2530 	u32 regcap2;
2531 	u32 wireless_modes;
2532 	u32 low_2ghz_chan;
2533 	u32 high_2ghz_chan;
2534 	u32 low_5ghz_chan;
2535 	u32 high_5ghz_chan;
2536 } __packed;
2537 
2538 struct wmi_soc_hal_reg_capabilities {
2539 	u32 num_phy;
2540 } __packed;
2541 
2542 /* 2 word representation of MAC addr */
2543 struct wmi_mac_addr {
2544 	union {
2545 		u8 addr[6];
2546 		struct {
2547 			u32 word0;
2548 			u32 word1;
2549 		} __packed;
2550 	} __packed;
2551 } __packed;
2552 
2553 struct wmi_dma_ring_capabilities {
2554 	u32 tlv_header;
2555 	u32 pdev_id;
2556 	u32 module_id;
2557 	u32 min_elem;
2558 	u32 min_buf_sz;
2559 	u32 min_buf_align;
2560 } __packed;
2561 
2562 struct wmi_ready_event_min {
2563 	struct wmi_abi_version fw_abi_vers;
2564 	struct wmi_mac_addr mac_addr;
2565 	u32 status;
2566 	u32 num_dscp_table;
2567 	u32 num_extra_mac_addr;
2568 	u32 num_total_peers;
2569 	u32 num_extra_peers;
2570 } __packed;
2571 
2572 struct wmi_ready_event {
2573 	struct wmi_ready_event_min ready_event_min;
2574 	u32 max_ast_index;
2575 	u32 pktlog_defs_checksum;
2576 } __packed;
2577 
2578 struct wmi_service_available_event {
2579 	u32 wmi_service_segment_offset;
2580 	u32 wmi_service_segment_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32];
2581 } __packed;
2582 
2583 struct ath11k_pdev_wmi {
2584 	struct ath11k_wmi_base *wmi_ab;
2585 	enum ath11k_htc_ep_id eid;
2586 	const struct wmi_peer_flags_map *peer_flags;
2587 	u32 rx_decap_mode;
2588 	wait_queue_head_t tx_ce_desc_wq;
2589 };
2590 
2591 struct vdev_create_params {
2592 	u8 if_id;
2593 	u32 type;
2594 	u32 subtype;
2595 	struct {
2596 		u8 tx;
2597 		u8 rx;
2598 	} chains[NUM_NL80211_BANDS];
2599 	u32 pdev_id;
2600 	u32 mbssid_flags;
2601 	u32 mbssid_tx_vdev_id;
2602 };
2603 
2604 struct wmi_vdev_create_cmd {
2605 	u32 tlv_header;
2606 	u32 vdev_id;
2607 	u32 vdev_type;
2608 	u32 vdev_subtype;
2609 	struct wmi_mac_addr vdev_macaddr;
2610 	u32 num_cfg_txrx_streams;
2611 	u32 pdev_id;
2612 	u32 mbssid_flags;
2613 	u32 mbssid_tx_vdev_id;
2614 } __packed;
2615 
2616 struct wmi_vdev_txrx_streams {
2617 	u32 tlv_header;
2618 	u32 band;
2619 	u32 supported_tx_streams;
2620 	u32 supported_rx_streams;
2621 } __packed;
2622 
2623 struct wmi_vdev_delete_cmd {
2624 	u32 tlv_header;
2625 	u32 vdev_id;
2626 } __packed;
2627 
2628 struct wmi_vdev_up_cmd {
2629 	u32 tlv_header;
2630 	u32 vdev_id;
2631 	u32 vdev_assoc_id;
2632 	struct wmi_mac_addr vdev_bssid;
2633 	struct wmi_mac_addr tx_vdev_bssid;
2634 	u32 nontx_profile_idx;
2635 	u32 nontx_profile_cnt;
2636 } __packed;
2637 
2638 struct wmi_vdev_stop_cmd {
2639 	u32 tlv_header;
2640 	u32 vdev_id;
2641 } __packed;
2642 
2643 struct wmi_vdev_down_cmd {
2644 	u32 tlv_header;
2645 	u32 vdev_id;
2646 } __packed;
2647 
2648 #define WMI_VDEV_START_HIDDEN_SSID  BIT(0)
2649 #define WMI_VDEV_START_PMF_ENABLED  BIT(1)
2650 #define WMI_VDEV_START_LDPC_RX_ENABLED BIT(3)
2651 #define WMI_VDEV_START_HW_ENCRYPTION_DISABLED BIT(4)
2652 
2653 struct wmi_ssid {
2654 	u32 ssid_len;
2655 	u32 ssid[8];
2656 } __packed;
2657 
2658 #define ATH11K_VDEV_SETUP_TIMEOUT_HZ (1 * HZ)
2659 
2660 struct wmi_vdev_start_request_cmd {
2661 	u32 tlv_header;
2662 	u32 vdev_id;
2663 	u32 requestor_id;
2664 	u32 beacon_interval;
2665 	u32 dtim_period;
2666 	u32 flags;
2667 	struct wmi_ssid ssid;
2668 	u32 bcn_tx_rate;
2669 	u32 bcn_txpower;
2670 	u32 num_noa_descriptors;
2671 	u32 disable_hw_ack;
2672 	u32 preferred_tx_streams;
2673 	u32 preferred_rx_streams;
2674 	u32 he_ops;
2675 	u32 cac_duration_ms;
2676 	u32 regdomain;
2677 	u32 min_data_rate;
2678 	u32 mbssid_flags;
2679 	u32 mbssid_tx_vdev_id;
2680 } __packed;
2681 
2682 #define MGMT_TX_DL_FRM_LEN		     64
2683 #define WMI_MAC_MAX_SSID_LENGTH              32
2684 struct mac_ssid {
2685 	u8 length;
2686 	u8 mac_ssid[WMI_MAC_MAX_SSID_LENGTH];
2687 } __packed;
2688 
2689 struct wmi_p2p_noa_descriptor {
2690 	u32 type_count;
2691 	u32 duration;
2692 	u32 interval;
2693 	u32 start_time;
2694 };
2695 
2696 struct channel_param {
2697 	u8 chan_id;
2698 	u8 pwr;
2699 	u32 mhz;
2700 	u32 half_rate:1,
2701 	    quarter_rate:1,
2702 	    dfs_set:1,
2703 	    dfs_set_cfreq2:1,
2704 	    is_chan_passive:1,
2705 	    allow_ht:1,
2706 	    allow_vht:1,
2707 	    allow_he:1,
2708 	    set_agile:1,
2709 	    psc_channel:1;
2710 	u32 phy_mode;
2711 	u32 cfreq1;
2712 	u32 cfreq2;
2713 	char   maxpower;
2714 	char   minpower;
2715 	char   maxregpower;
2716 	u8  antennamax;
2717 	u8  reg_class_id;
2718 } __packed;
2719 
2720 enum wmi_phy_mode {
2721 	MODE_11A        = 0,
2722 	MODE_11G        = 1,   /* 11b/g Mode */
2723 	MODE_11B        = 2,   /* 11b Mode */
2724 	MODE_11GONLY    = 3,   /* 11g only Mode */
2725 	MODE_11NA_HT20   = 4,
2726 	MODE_11NG_HT20   = 5,
2727 	MODE_11NA_HT40   = 6,
2728 	MODE_11NG_HT40   = 7,
2729 	MODE_11AC_VHT20 = 8,
2730 	MODE_11AC_VHT40 = 9,
2731 	MODE_11AC_VHT80 = 10,
2732 	MODE_11AC_VHT20_2G = 11,
2733 	MODE_11AC_VHT40_2G = 12,
2734 	MODE_11AC_VHT80_2G = 13,
2735 	MODE_11AC_VHT80_80 = 14,
2736 	MODE_11AC_VHT160 = 15,
2737 	MODE_11AX_HE20 = 16,
2738 	MODE_11AX_HE40 = 17,
2739 	MODE_11AX_HE80 = 18,
2740 	MODE_11AX_HE80_80 = 19,
2741 	MODE_11AX_HE160 = 20,
2742 	MODE_11AX_HE20_2G = 21,
2743 	MODE_11AX_HE40_2G = 22,
2744 	MODE_11AX_HE80_2G = 23,
2745 	MODE_UNKNOWN = 24,
2746 	MODE_MAX = 24
2747 };
2748 
ath11k_wmi_phymode_str(enum wmi_phy_mode mode)2749 static inline const char *ath11k_wmi_phymode_str(enum wmi_phy_mode mode)
2750 {
2751 	switch (mode) {
2752 	case MODE_11A:
2753 		return "11a";
2754 	case MODE_11G:
2755 		return "11g";
2756 	case MODE_11B:
2757 		return "11b";
2758 	case MODE_11GONLY:
2759 		return "11gonly";
2760 	case MODE_11NA_HT20:
2761 		return "11na-ht20";
2762 	case MODE_11NG_HT20:
2763 		return "11ng-ht20";
2764 	case MODE_11NA_HT40:
2765 		return "11na-ht40";
2766 	case MODE_11NG_HT40:
2767 		return "11ng-ht40";
2768 	case MODE_11AC_VHT20:
2769 		return "11ac-vht20";
2770 	case MODE_11AC_VHT40:
2771 		return "11ac-vht40";
2772 	case MODE_11AC_VHT80:
2773 		return "11ac-vht80";
2774 	case MODE_11AC_VHT160:
2775 		return "11ac-vht160";
2776 	case MODE_11AC_VHT80_80:
2777 		return "11ac-vht80+80";
2778 	case MODE_11AC_VHT20_2G:
2779 		return "11ac-vht20-2g";
2780 	case MODE_11AC_VHT40_2G:
2781 		return "11ac-vht40-2g";
2782 	case MODE_11AC_VHT80_2G:
2783 		return "11ac-vht80-2g";
2784 	case MODE_11AX_HE20:
2785 		return "11ax-he20";
2786 	case MODE_11AX_HE40:
2787 		return "11ax-he40";
2788 	case MODE_11AX_HE80:
2789 		return "11ax-he80";
2790 	case MODE_11AX_HE80_80:
2791 		return "11ax-he80+80";
2792 	case MODE_11AX_HE160:
2793 		return "11ax-he160";
2794 	case MODE_11AX_HE20_2G:
2795 		return "11ax-he20-2g";
2796 	case MODE_11AX_HE40_2G:
2797 		return "11ax-he40-2g";
2798 	case MODE_11AX_HE80_2G:
2799 		return "11ax-he80-2g";
2800 	case MODE_UNKNOWN:
2801 		/* skip */
2802 		break;
2803 
2804 		/* no default handler to allow compiler to check that the
2805 		 * enum is fully handled
2806 		 */
2807 	}
2808 
2809 	return "<unknown>";
2810 }
2811 
2812 struct wmi_channel_arg {
2813 	u32 freq;
2814 	u32 band_center_freq1;
2815 	u32 band_center_freq2;
2816 	bool passive;
2817 	bool allow_ibss;
2818 	bool allow_ht;
2819 	bool allow_vht;
2820 	bool ht40plus;
2821 	bool chan_radar;
2822 	bool freq2_radar;
2823 	bool allow_he;
2824 	u32 min_power;
2825 	u32 max_power;
2826 	u32 max_reg_power;
2827 	u32 max_antenna_gain;
2828 	enum wmi_phy_mode mode;
2829 };
2830 
2831 struct wmi_vdev_start_req_arg {
2832 	u32 vdev_id;
2833 	struct wmi_channel_arg channel;
2834 	u32 bcn_intval;
2835 	u32 dtim_period;
2836 	u8 *ssid;
2837 	u32 ssid_len;
2838 	u32 bcn_tx_rate;
2839 	u32 bcn_tx_power;
2840 	bool disable_hw_ack;
2841 	bool hidden_ssid;
2842 	bool pmf_enabled;
2843 	u32 he_ops;
2844 	u32 cac_duration_ms;
2845 	u32 regdomain;
2846 	u32 pref_rx_streams;
2847 	u32 pref_tx_streams;
2848 	u32 num_noa_descriptors;
2849 	u32 min_data_rate;
2850 	u32 mbssid_flags;
2851 	u32 mbssid_tx_vdev_id;
2852 };
2853 
2854 struct peer_create_params {
2855 	const u8 *peer_addr;
2856 	u32 peer_type;
2857 	u32 vdev_id;
2858 };
2859 
2860 struct peer_delete_params {
2861 	u8 vdev_id;
2862 };
2863 
2864 struct peer_flush_params {
2865 	u32 peer_tid_bitmap;
2866 	u8 vdev_id;
2867 };
2868 
2869 struct pdev_set_regdomain_params {
2870 	u16 current_rd_in_use;
2871 	u16 current_rd_2g;
2872 	u16 current_rd_5g;
2873 	u32 ctl_2g;
2874 	u32 ctl_5g;
2875 	u8 dfs_domain;
2876 	u32 pdev_id;
2877 };
2878 
2879 struct rx_reorder_queue_remove_params {
2880 	u8 *peer_macaddr;
2881 	u16 vdev_id;
2882 	u32 peer_tid_bitmap;
2883 };
2884 
2885 #define WMI_HOST_PDEV_ID_SOC 0xFF
2886 #define WMI_HOST_PDEV_ID_0   0
2887 #define WMI_HOST_PDEV_ID_1   1
2888 #define WMI_HOST_PDEV_ID_2   2
2889 
2890 #define WMI_PDEV_ID_SOC         0
2891 #define WMI_PDEV_ID_1ST         1
2892 #define WMI_PDEV_ID_2ND         2
2893 #define WMI_PDEV_ID_3RD         3
2894 
2895 /* Freq units in MHz */
2896 #define REG_RULE_START_FREQ			0x0000ffff
2897 #define REG_RULE_END_FREQ			0xffff0000
2898 #define REG_RULE_FLAGS				0x0000ffff
2899 #define REG_RULE_MAX_BW				0x0000ffff
2900 #define REG_RULE_REG_PWR			0x00ff0000
2901 #define REG_RULE_ANT_GAIN			0xff000000
2902 #define REG_RULE_PSD_INFO			BIT(0)
2903 #define REG_RULE_PSD_EIRP			0xff0000
2904 
2905 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0)
2906 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1)
2907 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
2908 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
2909 
2910 #define HE_PHYCAP_BYTE_0	0
2911 #define HE_PHYCAP_BYTE_1	1
2912 #define HE_PHYCAP_BYTE_2	2
2913 #define HE_PHYCAP_BYTE_3	3
2914 #define HE_PHYCAP_BYTE_4	4
2915 
2916 #define HECAP_PHY_SU_BFER		BIT(7)
2917 #define HECAP_PHY_SU_BFEE		BIT(0)
2918 #define HECAP_PHY_MU_BFER		BIT(1)
2919 #define HECAP_PHY_UL_MUMIMO		BIT(6)
2920 #define HECAP_PHY_UL_MUOFDMA		BIT(7)
2921 
2922 #define HECAP_PHY_SUBFMR_GET(hecap_phy) \
2923 	FIELD_GET(HECAP_PHY_SU_BFER, hecap_phy[HE_PHYCAP_BYTE_3])
2924 
2925 #define HECAP_PHY_SUBFME_GET(hecap_phy) \
2926 	FIELD_GET(HECAP_PHY_SU_BFEE, hecap_phy[HE_PHYCAP_BYTE_4])
2927 
2928 #define HECAP_PHY_MUBFMR_GET(hecap_phy) \
2929 	FIELD_GET(HECAP_PHY_MU_BFER, hecap_phy[HE_PHYCAP_BYTE_4])
2930 
2931 #define HECAP_PHY_ULMUMIMO_GET(hecap_phy) \
2932 	FIELD_GET(HECAP_PHY_UL_MUMIMO, hecap_phy[HE_PHYCAP_BYTE_2])
2933 
2934 #define HECAP_PHY_ULOFDMA_GET(hecap_phy) \
2935 	FIELD_GET(HECAP_PHY_UL_MUOFDMA, hecap_phy[HE_PHYCAP_BYTE_2])
2936 
2937 #define HE_MODE_SU_TX_BFEE	BIT(0)
2938 #define HE_MODE_SU_TX_BFER	BIT(1)
2939 #define HE_MODE_MU_TX_BFEE	BIT(2)
2940 #define HE_MODE_MU_TX_BFER	BIT(3)
2941 #define HE_MODE_DL_OFDMA	BIT(4)
2942 #define HE_MODE_UL_OFDMA	BIT(5)
2943 #define HE_MODE_UL_MUMIMO	BIT(6)
2944 
2945 #define HE_DL_MUOFDMA_ENABLE	1
2946 #define HE_UL_MUOFDMA_ENABLE	1
2947 #define HE_DL_MUMIMO_ENABLE	1
2948 #define HE_UL_MUMIMO_ENABLE	1
2949 #define HE_MU_BFEE_ENABLE	1
2950 #define HE_SU_BFEE_ENABLE	1
2951 #define HE_MU_BFER_ENABLE	1
2952 #define HE_SU_BFER_ENABLE	1
2953 
2954 #define HE_VHT_SOUNDING_MODE_ENABLE		1
2955 #define HE_SU_MU_SOUNDING_MODE_ENABLE		1
2956 #define HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE	1
2957 
2958 /* HE or VHT Sounding */
2959 #define HE_VHT_SOUNDING_MODE		BIT(0)
2960 /* SU or MU Sounding */
2961 #define HE_SU_MU_SOUNDING_MODE		BIT(2)
2962 /* Trig or Non-Trig Sounding */
2963 #define HE_TRIG_NONTRIG_SOUNDING_MODE	BIT(3)
2964 
2965 #define WMI_TXBF_STS_CAP_OFFSET_LSB	4
2966 #define WMI_TXBF_STS_CAP_OFFSET_MASK	0x70
2967 #define WMI_BF_SOUND_DIM_OFFSET_LSB	8
2968 #define WMI_BF_SOUND_DIM_OFFSET_MASK	0x700
2969 
2970 struct pdev_params {
2971 	u32 param_id;
2972 	u32 param_value;
2973 };
2974 
2975 enum wmi_peer_type {
2976 	WMI_PEER_TYPE_DEFAULT = 0,
2977 	WMI_PEER_TYPE_BSS = 1,
2978 	WMI_PEER_TYPE_TDLS = 2,
2979 };
2980 
2981 struct wmi_peer_create_cmd {
2982 	u32 tlv_header;
2983 	u32 vdev_id;
2984 	struct wmi_mac_addr peer_macaddr;
2985 	u32 peer_type;
2986 } __packed;
2987 
2988 struct wmi_peer_delete_cmd {
2989 	u32 tlv_header;
2990 	u32 vdev_id;
2991 	struct wmi_mac_addr peer_macaddr;
2992 } __packed;
2993 
2994 struct wmi_peer_reorder_queue_setup_cmd {
2995 	u32 tlv_header;
2996 	u32 vdev_id;
2997 	struct wmi_mac_addr peer_macaddr;
2998 	u32 tid;
2999 	u32 queue_ptr_lo;
3000 	u32 queue_ptr_hi;
3001 	u32 queue_no;
3002 	u32 ba_window_size_valid;
3003 	u32 ba_window_size;
3004 } __packed;
3005 
3006 struct wmi_peer_reorder_queue_remove_cmd {
3007 	u32 tlv_header;
3008 	u32 vdev_id;
3009 	struct wmi_mac_addr peer_macaddr;
3010 	u32 tid_mask;
3011 } __packed;
3012 
3013 struct gpio_config_params {
3014 	u32 gpio_num;
3015 	u32 input;
3016 	u32 pull_type;
3017 	u32 intr_mode;
3018 };
3019 
3020 enum wmi_gpio_type {
3021 	WMI_GPIO_PULL_NONE,
3022 	WMI_GPIO_PULL_UP,
3023 	WMI_GPIO_PULL_DOWN
3024 };
3025 
3026 enum wmi_gpio_intr_type {
3027 	WMI_GPIO_INTTYPE_DISABLE,
3028 	WMI_GPIO_INTTYPE_RISING_EDGE,
3029 	WMI_GPIO_INTTYPE_FALLING_EDGE,
3030 	WMI_GPIO_INTTYPE_BOTH_EDGE,
3031 	WMI_GPIO_INTTYPE_LEVEL_LOW,
3032 	WMI_GPIO_INTTYPE_LEVEL_HIGH
3033 };
3034 
3035 enum wmi_bss_chan_info_req_type {
3036 	WMI_BSS_SURVEY_REQ_TYPE_READ = 1,
3037 	WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR,
3038 };
3039 
3040 struct wmi_gpio_config_cmd_param {
3041 	u32 tlv_header;
3042 	u32 gpio_num;
3043 	u32 input;
3044 	u32 pull_type;
3045 	u32 intr_mode;
3046 };
3047 
3048 struct gpio_output_params {
3049 	u32 gpio_num;
3050 	u32 set;
3051 };
3052 
3053 struct wmi_gpio_output_cmd_param {
3054 	u32 tlv_header;
3055 	u32 gpio_num;
3056 	u32 set;
3057 };
3058 
3059 struct set_fwtest_params {
3060 	u32 arg;
3061 	u32 value;
3062 };
3063 
3064 struct wmi_fwtest_set_param_cmd_param {
3065 	u32 tlv_header;
3066 	u32 param_id;
3067 	u32 param_value;
3068 };
3069 
3070 struct wmi_pdev_set_param_cmd {
3071 	u32 tlv_header;
3072 	u32 pdev_id;
3073 	u32 param_id;
3074 	u32 param_value;
3075 } __packed;
3076 
3077 struct wmi_pdev_set_ps_mode_cmd {
3078 	u32 tlv_header;
3079 	u32 vdev_id;
3080 	u32 sta_ps_mode;
3081 } __packed;
3082 
3083 struct wmi_pdev_suspend_cmd {
3084 	u32 tlv_header;
3085 	u32 pdev_id;
3086 	u32 suspend_opt;
3087 } __packed;
3088 
3089 struct wmi_pdev_resume_cmd {
3090 	u32 tlv_header;
3091 	u32 pdev_id;
3092 } __packed;
3093 
3094 struct wmi_pdev_bss_chan_info_req_cmd {
3095 	u32 tlv_header;
3096 	/* ref wmi_bss_chan_info_req_type */
3097 	u32 req_type;
3098 	u32 pdev_id;
3099 } __packed;
3100 
3101 struct wmi_ap_ps_peer_cmd {
3102 	u32 tlv_header;
3103 	u32 vdev_id;
3104 	struct wmi_mac_addr peer_macaddr;
3105 	u32 param;
3106 	u32 value;
3107 } __packed;
3108 
3109 struct wmi_sta_powersave_param_cmd {
3110 	u32 tlv_header;
3111 	u32 vdev_id;
3112 	u32 param;
3113 	u32 value;
3114 } __packed;
3115 
3116 struct wmi_pdev_set_regdomain_cmd {
3117 	u32 tlv_header;
3118 	u32 pdev_id;
3119 	u32 reg_domain;
3120 	u32 reg_domain_2g;
3121 	u32 reg_domain_5g;
3122 	u32 conformance_test_limit_2g;
3123 	u32 conformance_test_limit_5g;
3124 	u32 dfs_domain;
3125 } __packed;
3126 
3127 struct wmi_peer_set_param_cmd {
3128 	u32 tlv_header;
3129 	u32 vdev_id;
3130 	struct wmi_mac_addr peer_macaddr;
3131 	u32 param_id;
3132 	u32 param_value;
3133 } __packed;
3134 
3135 struct wmi_peer_flush_tids_cmd {
3136 	u32 tlv_header;
3137 	u32 vdev_id;
3138 	struct wmi_mac_addr peer_macaddr;
3139 	u32 peer_tid_bitmap;
3140 } __packed;
3141 
3142 struct wmi_dfs_phyerr_offload_cmd {
3143 	u32 tlv_header;
3144 	u32 pdev_id;
3145 } __packed;
3146 
3147 struct wmi_bcn_offload_ctrl_cmd {
3148 	u32 tlv_header;
3149 	u32 vdev_id;
3150 	u32 bcn_ctrl_op;
3151 } __packed;
3152 
3153 enum scan_dwelltime_adaptive_mode {
3154 	SCAN_DWELL_MODE_DEFAULT = 0,
3155 	SCAN_DWELL_MODE_CONSERVATIVE = 1,
3156 	SCAN_DWELL_MODE_MODERATE = 2,
3157 	SCAN_DWELL_MODE_AGGRESSIVE = 3,
3158 	SCAN_DWELL_MODE_STATIC = 4
3159 };
3160 
3161 #define WLAN_SSID_MAX_LEN 32
3162 
3163 struct element_info {
3164 	u32 len;
3165 	u8 *ptr;
3166 };
3167 
3168 struct wlan_ssid {
3169 	u8 length;
3170 	u8 ssid[WLAN_SSID_MAX_LEN];
3171 };
3172 
3173 #define WMI_IE_BITMAP_SIZE             8
3174 
3175 /* prefix used by scan requestor ids on the host */
3176 #define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
3177 
3178 /* prefix used by scan request ids generated on the host */
3179 /* host cycles through the lower 12 bits to generate ids */
3180 #define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000
3181 
3182 /* Values lower than this may be refused by some firmware revisions with a scan
3183  * completion with a timedout reason.
3184  */
3185 #define WMI_SCAN_CHAN_MIN_TIME_MSEC 40
3186 
3187 /* Scan priority numbers must be sequential, starting with 0 */
3188 enum wmi_scan_priority {
3189 	WMI_SCAN_PRIORITY_VERY_LOW = 0,
3190 	WMI_SCAN_PRIORITY_LOW,
3191 	WMI_SCAN_PRIORITY_MEDIUM,
3192 	WMI_SCAN_PRIORITY_HIGH,
3193 	WMI_SCAN_PRIORITY_VERY_HIGH,
3194 	WMI_SCAN_PRIORITY_COUNT   /* number of priorities supported */
3195 };
3196 
3197 enum wmi_scan_event_type {
3198 	WMI_SCAN_EVENT_STARTED              = BIT(0),
3199 	WMI_SCAN_EVENT_COMPLETED            = BIT(1),
3200 	WMI_SCAN_EVENT_BSS_CHANNEL          = BIT(2),
3201 	WMI_SCAN_EVENT_FOREIGN_CHAN         = BIT(3),
3202 	WMI_SCAN_EVENT_DEQUEUED             = BIT(4),
3203 	/* possibly by high-prio scan */
3204 	WMI_SCAN_EVENT_PREEMPTED            = BIT(5),
3205 	WMI_SCAN_EVENT_START_FAILED         = BIT(6),
3206 	WMI_SCAN_EVENT_RESTARTED            = BIT(7),
3207 	WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT    = BIT(8),
3208 	WMI_SCAN_EVENT_SUSPENDED            = BIT(9),
3209 	WMI_SCAN_EVENT_RESUMED              = BIT(10),
3210 	WMI_SCAN_EVENT_MAX                  = BIT(15),
3211 };
3212 
3213 enum wmi_scan_completion_reason {
3214 	WMI_SCAN_REASON_COMPLETED,
3215 	WMI_SCAN_REASON_CANCELLED,
3216 	WMI_SCAN_REASON_PREEMPTED,
3217 	WMI_SCAN_REASON_TIMEDOUT,
3218 	WMI_SCAN_REASON_INTERNAL_FAILURE,
3219 	WMI_SCAN_REASON_MAX,
3220 };
3221 
3222 struct  wmi_start_scan_cmd {
3223 	u32 tlv_header;
3224 	u32 scan_id;
3225 	u32 scan_req_id;
3226 	u32 vdev_id;
3227 	u32 scan_priority;
3228 	u32 notify_scan_events;
3229 	u32 dwell_time_active;
3230 	u32 dwell_time_passive;
3231 	u32 min_rest_time;
3232 	u32 max_rest_time;
3233 	u32 repeat_probe_time;
3234 	u32 probe_spacing_time;
3235 	u32 idle_time;
3236 	u32 max_scan_time;
3237 	u32 probe_delay;
3238 	u32 scan_ctrl_flags;
3239 	u32 burst_duration;
3240 	u32 num_chan;
3241 	u32 num_bssid;
3242 	u32 num_ssids;
3243 	u32 ie_len;
3244 	u32 n_probes;
3245 	struct wmi_mac_addr mac_addr;
3246 	struct wmi_mac_addr mac_mask;
3247 	u32 ie_bitmap[WMI_IE_BITMAP_SIZE];
3248 	u32 num_vendor_oui;
3249 	u32 scan_ctrl_flags_ext;
3250 	u32 dwell_time_active_2g;
3251 	u32 dwell_time_active_6g;
3252 	u32 dwell_time_passive_6g;
3253 	u32 scan_start_offset;
3254 } __packed;
3255 
3256 #define WMI_SCAN_FLAG_PASSIVE        0x1
3257 #define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2
3258 #define WMI_SCAN_ADD_CCK_RATES       0x4
3259 #define WMI_SCAN_ADD_OFDM_RATES      0x8
3260 #define WMI_SCAN_CHAN_STAT_EVENT     0x10
3261 #define WMI_SCAN_FILTER_PROBE_REQ    0x20
3262 #define WMI_SCAN_BYPASS_DFS_CHN      0x40
3263 #define WMI_SCAN_CONTINUE_ON_ERROR   0x80
3264 #define WMI_SCAN_FILTER_PROMISCUOS   0x100
3265 #define WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS 0x200
3266 #define WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ  0x400
3267 #define WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ   0x800
3268 #define WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ   0x1000
3269 #define WMI_SCAN_OFFCHAN_MGMT_TX    0x2000
3270 #define WMI_SCAN_OFFCHAN_DATA_TX    0x4000
3271 #define WMI_SCAN_CAPTURE_PHY_ERROR  0x8000
3272 #define WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN 0x10000
3273 #define WMI_SCAN_FLAG_HALF_RATE_SUPPORT      0x20000
3274 #define WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT   0x40000
3275 #define WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ 0x80000
3276 #define WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ 0x100000
3277 
3278 #define WMI_SCAN_DWELL_MODE_MASK 0x00E00000
3279 #define WMI_SCAN_DWELL_MODE_SHIFT        21
3280 #define WMI_SCAN_FLAG_EXT_PASSIVE_SCAN_START_TIME_ENHANCE   0x00000800
3281 
3282 #define WMI_SCAN_CONFIG_PER_CHANNEL_MASK	GENMASK(19, 0)
3283 #define WMI_SCAN_CH_FLAG_SCAN_ONLY_IF_RNR_FOUND	BIT(20)
3284 
3285 enum {
3286 	WMI_SCAN_DWELL_MODE_DEFAULT      = 0,
3287 	WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1,
3288 	WMI_SCAN_DWELL_MODE_MODERATE     = 2,
3289 	WMI_SCAN_DWELL_MODE_AGGRESSIVE   = 3,
3290 	WMI_SCAN_DWELL_MODE_STATIC       = 4,
3291 };
3292 
3293 #define WMI_SCAN_SET_DWELL_MODE(flag, mode) \
3294 	((flag) |= (((mode) << WMI_SCAN_DWELL_MODE_SHIFT) & \
3295 		    WMI_SCAN_DWELL_MODE_MASK))
3296 
3297 struct hint_short_ssid {
3298 	u32 freq_flags;
3299 	u32 short_ssid;
3300 };
3301 
3302 struct hint_bssid {
3303 	u32 freq_flags;
3304 	struct wmi_mac_addr bssid;
3305 };
3306 
3307 struct scan_req_params {
3308 	u32 scan_id;
3309 	u32 scan_req_id;
3310 	u32 vdev_id;
3311 	u32 pdev_id;
3312 	enum wmi_scan_priority scan_priority;
3313 	union {
3314 		struct {
3315 			u32 scan_ev_started:1,
3316 			    scan_ev_completed:1,
3317 			    scan_ev_bss_chan:1,
3318 			    scan_ev_foreign_chan:1,
3319 			    scan_ev_dequeued:1,
3320 			    scan_ev_preempted:1,
3321 			    scan_ev_start_failed:1,
3322 			    scan_ev_restarted:1,
3323 			    scan_ev_foreign_chn_exit:1,
3324 			    scan_ev_invalid:1,
3325 			    scan_ev_gpio_timeout:1,
3326 			    scan_ev_suspended:1,
3327 			    scan_ev_resumed:1;
3328 		};
3329 		u32 scan_events;
3330 	};
3331 	u32 scan_ctrl_flags_ext;
3332 	u32 dwell_time_active;
3333 	u32 dwell_time_active_2g;
3334 	u32 dwell_time_passive;
3335 	u32 dwell_time_active_6g;
3336 	u32 dwell_time_passive_6g;
3337 	u32 min_rest_time;
3338 	u32 max_rest_time;
3339 	u32 repeat_probe_time;
3340 	u32 probe_spacing_time;
3341 	u32 idle_time;
3342 	u32 max_scan_time;
3343 	u32 probe_delay;
3344 	union {
3345 		struct {
3346 			u32 scan_f_passive:1,
3347 			    scan_f_bcast_probe:1,
3348 			    scan_f_cck_rates:1,
3349 			    scan_f_ofdm_rates:1,
3350 			    scan_f_chan_stat_evnt:1,
3351 			    scan_f_filter_prb_req:1,
3352 			    scan_f_bypass_dfs_chn:1,
3353 			    scan_f_continue_on_err:1,
3354 			    scan_f_offchan_mgmt_tx:1,
3355 			    scan_f_offchan_data_tx:1,
3356 			    scan_f_promisc_mode:1,
3357 			    scan_f_capture_phy_err:1,
3358 			    scan_f_strict_passive_pch:1,
3359 			    scan_f_half_rate:1,
3360 			    scan_f_quarter_rate:1,
3361 			    scan_f_force_active_dfs_chn:1,
3362 			    scan_f_add_tpc_ie_in_probe:1,
3363 			    scan_f_add_ds_ie_in_probe:1,
3364 			    scan_f_add_spoofed_mac_in_probe:1,
3365 			    scan_f_add_rand_seq_in_probe:1,
3366 			    scan_f_en_ie_whitelist_in_probe:1,
3367 			    scan_f_forced:1,
3368 			    scan_f_2ghz:1,
3369 			    scan_f_5ghz:1,
3370 			    scan_f_80mhz:1;
3371 		};
3372 		u32 scan_flags;
3373 	};
3374 	enum scan_dwelltime_adaptive_mode adaptive_dwell_time_mode;
3375 	u32 burst_duration;
3376 	u32 num_chan;
3377 	u32 num_bssid;
3378 	u32 num_ssids;
3379 	u32 n_probes;
3380 	u32 *chan_list;
3381 	u32 notify_scan_events;
3382 	struct wlan_ssid ssid[WLAN_SCAN_PARAMS_MAX_SSID];
3383 	struct wmi_mac_addr bssid_list[WLAN_SCAN_PARAMS_MAX_BSSID];
3384 	struct element_info extraie;
3385 	struct element_info htcap;
3386 	struct element_info vhtcap;
3387 	u32 num_hint_s_ssid;
3388 	u32 num_hint_bssid;
3389 	struct hint_short_ssid hint_s_ssid[WLAN_SCAN_MAX_HINT_S_SSID];
3390 	struct hint_bssid hint_bssid[WLAN_SCAN_MAX_HINT_BSSID];
3391 	struct wmi_mac_addr mac_addr;
3392 	struct wmi_mac_addr mac_mask;
3393 };
3394 
3395 struct wmi_ssid_arg {
3396 	int len;
3397 	const u8 *ssid;
3398 };
3399 
3400 struct wmi_bssid_arg {
3401 	const u8 *bssid;
3402 };
3403 
3404 struct wmi_start_scan_arg {
3405 	u32 scan_id;
3406 	u32 scan_req_id;
3407 	u32 vdev_id;
3408 	u32 scan_priority;
3409 	u32 notify_scan_events;
3410 	u32 dwell_time_active;
3411 	u32 dwell_time_passive;
3412 	u32 min_rest_time;
3413 	u32 max_rest_time;
3414 	u32 repeat_probe_time;
3415 	u32 probe_spacing_time;
3416 	u32 idle_time;
3417 	u32 max_scan_time;
3418 	u32 probe_delay;
3419 	u32 scan_ctrl_flags;
3420 
3421 	u32 ie_len;
3422 	u32 n_channels;
3423 	u32 n_ssids;
3424 	u32 n_bssids;
3425 
3426 	u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN];
3427 	u32 channels[64];
3428 	struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID];
3429 	struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID];
3430 };
3431 
3432 #define WMI_SCAN_STOP_ONE       0x00000000
3433 #define WMI_SCN_STOP_VAP_ALL    0x01000000
3434 #define WMI_SCAN_STOP_ALL       0x04000000
3435 
3436 /* Prefix 0xA000 indicates that the scan request
3437  * is trigger by HOST
3438  */
3439 #define ATH11K_SCAN_ID          0xA000
3440 
3441 enum scan_cancel_req_type {
3442 	WLAN_SCAN_CANCEL_SINGLE = 1,
3443 	WLAN_SCAN_CANCEL_VDEV_ALL,
3444 	WLAN_SCAN_CANCEL_PDEV_ALL,
3445 };
3446 
3447 struct scan_cancel_param {
3448 	u32 requester;
3449 	u32 scan_id;
3450 	enum scan_cancel_req_type req_type;
3451 	u32 vdev_id;
3452 	u32 pdev_id;
3453 };
3454 
3455 struct  wmi_bcn_send_from_host_cmd {
3456 	u32 tlv_header;
3457 	u32 vdev_id;
3458 	u32 data_len;
3459 	union {
3460 		u32 frag_ptr;
3461 		u32 frag_ptr_lo;
3462 	};
3463 	u32 frame_ctrl;
3464 	u32 dtim_flag;
3465 	u32 bcn_antenna;
3466 	u32 frag_ptr_hi;
3467 };
3468 
3469 #define WMI_CHAN_INFO_MODE		GENMASK(5, 0)
3470 #define WMI_CHAN_INFO_HT40_PLUS		BIT(6)
3471 #define WMI_CHAN_INFO_PASSIVE		BIT(7)
3472 #define WMI_CHAN_INFO_ADHOC_ALLOWED	BIT(8)
3473 #define WMI_CHAN_INFO_AP_DISABLED	BIT(9)
3474 #define WMI_CHAN_INFO_DFS		BIT(10)
3475 #define WMI_CHAN_INFO_ALLOW_HT		BIT(11)
3476 #define WMI_CHAN_INFO_ALLOW_VHT		BIT(12)
3477 #define WMI_CHAN_INFO_CHAN_CHANGE_CAUSE_CSA	BIT(13)
3478 #define WMI_CHAN_INFO_HALF_RATE		BIT(14)
3479 #define WMI_CHAN_INFO_QUARTER_RATE	BIT(15)
3480 #define WMI_CHAN_INFO_DFS_FREQ2		BIT(16)
3481 #define WMI_CHAN_INFO_ALLOW_HE		BIT(17)
3482 #define WMI_CHAN_INFO_PSC		BIT(18)
3483 
3484 #define WMI_CHAN_REG_INFO1_MIN_PWR	GENMASK(7, 0)
3485 #define WMI_CHAN_REG_INFO1_MAX_PWR	GENMASK(15, 8)
3486 #define WMI_CHAN_REG_INFO1_MAX_REG_PWR	GENMASK(23, 16)
3487 #define WMI_CHAN_REG_INFO1_REG_CLS	GENMASK(31, 24)
3488 
3489 #define WMI_CHAN_REG_INFO2_ANT_MAX	GENMASK(7, 0)
3490 #define WMI_CHAN_REG_INFO2_MAX_TX_PWR	GENMASK(15, 8)
3491 
3492 struct wmi_channel {
3493 	u32 tlv_header;
3494 	u32 mhz;
3495 	u32 band_center_freq1;
3496 	u32 band_center_freq2;
3497 	u32 info;
3498 	u32 reg_info_1;
3499 	u32 reg_info_2;
3500 } __packed;
3501 
3502 struct wmi_mgmt_params {
3503 	void *tx_frame;
3504 	u16 frm_len;
3505 	u8 vdev_id;
3506 	u16 chanfreq;
3507 	void *pdata;
3508 	u16 desc_id;
3509 	u8 *macaddr;
3510 };
3511 
3512 enum wmi_sta_ps_mode {
3513 	WMI_STA_PS_MODE_DISABLED = 0,
3514 	WMI_STA_PS_MODE_ENABLED = 1,
3515 };
3516 
3517 #define WMI_SMPS_MASK_LOWER_16BITS 0xFF
3518 #define WMI_SMPS_MASK_UPPER_3BITS 0x7
3519 #define WMI_SMPS_PARAM_VALUE_SHIFT 29
3520 
3521 #define ATH11K_WMI_FW_HANG_ASSERT_TYPE 1
3522 #define ATH11K_WMI_FW_HANG_DELAY 0
3523 
3524 /* type, 0:unused 1: ASSERT 2: not respond detect command
3525  * delay_time_ms, the simulate will delay time
3526  */
3527 
3528 struct wmi_force_fw_hang_cmd {
3529 	u32 tlv_header;
3530 	u32 type;
3531 	u32 delay_time_ms;
3532 };
3533 
3534 struct wmi_vdev_set_param_cmd {
3535 	u32 tlv_header;
3536 	u32 vdev_id;
3537 	u32 param_id;
3538 	u32 param_value;
3539 } __packed;
3540 
3541 enum wmi_stats_id {
3542 	WMI_REQUEST_PEER_STAT			= BIT(0),
3543 	WMI_REQUEST_AP_STAT			= BIT(1),
3544 	WMI_REQUEST_PDEV_STAT			= BIT(2),
3545 	WMI_REQUEST_VDEV_STAT			= BIT(3),
3546 	WMI_REQUEST_BCNFLT_STAT			= BIT(4),
3547 	WMI_REQUEST_VDEV_RATE_STAT		= BIT(5),
3548 	WMI_REQUEST_INST_STAT			= BIT(6),
3549 	WMI_REQUEST_MIB_STAT			= BIT(7),
3550 	WMI_REQUEST_RSSI_PER_CHAIN_STAT		= BIT(8),
3551 	WMI_REQUEST_CONGESTION_STAT		= BIT(9),
3552 	WMI_REQUEST_PEER_EXTD_STAT		= BIT(10),
3553 	WMI_REQUEST_BCN_STAT			= BIT(11),
3554 	WMI_REQUEST_BCN_STAT_RESET		= BIT(12),
3555 	WMI_REQUEST_PEER_EXTD2_STAT		= BIT(13),
3556 };
3557 
3558 struct wmi_request_stats_cmd {
3559 	u32 tlv_header;
3560 	enum wmi_stats_id stats_id;
3561 	u32 vdev_id;
3562 	struct wmi_mac_addr peer_macaddr;
3563 	u32 pdev_id;
3564 } __packed;
3565 
3566 struct wmi_get_pdev_temperature_cmd {
3567 	u32 tlv_header;
3568 	u32 param;
3569 	u32 pdev_id;
3570 } __packed;
3571 
3572 struct wmi_ftm_seg_hdr {
3573 	u32 len;
3574 	u32 msgref;
3575 	u32 segmentinfo;
3576 	u32 pdev_id;
3577 } __packed;
3578 
3579 struct wmi_ftm_cmd {
3580 	u32 tlv_header;
3581 	struct wmi_ftm_seg_hdr seg_hdr;
3582 	u8 data[];
3583 } __packed;
3584 
3585 struct wmi_ftm_event_msg {
3586 	struct wmi_ftm_seg_hdr seg_hdr;
3587 	u8 data[];
3588 } __packed;
3589 
3590 #define WMI_BEACON_TX_BUFFER_SIZE	512
3591 
3592 #define WMI_EMA_TMPL_IDX_SHIFT            8
3593 #define WMI_EMA_FIRST_TMPL_SHIFT          16
3594 #define WMI_EMA_LAST_TMPL_SHIFT           24
3595 
3596 struct wmi_bcn_tmpl_cmd {
3597 	u32 tlv_header;
3598 	u32 vdev_id;
3599 	u32 tim_ie_offset;
3600 	u32 buf_len;
3601 	u32 csa_switch_count_offset;
3602 	u32 ext_csa_switch_count_offset;
3603 	u32 csa_event_bitmap;
3604 	u32 mbssid_ie_offset;
3605 	u32 esp_ie_offset;
3606 	u32 csc_switch_count_offset;
3607 	u32 csc_event_bitmap;
3608 	u32 mu_edca_ie_offset;
3609 	u32 feature_enable_bitmap;
3610 	u32 ema_params;
3611 } __packed;
3612 
3613 struct wmi_key_seq_counter {
3614 	u32 key_seq_counter_l;
3615 	u32 key_seq_counter_h;
3616 } __packed;
3617 
3618 struct wmi_vdev_install_key_cmd {
3619 	u32 tlv_header;
3620 	u32 vdev_id;
3621 	struct wmi_mac_addr peer_macaddr;
3622 	u32 key_idx;
3623 	u32 key_flags;
3624 	u32 key_cipher;
3625 	struct wmi_key_seq_counter key_rsc_counter;
3626 	struct wmi_key_seq_counter key_global_rsc_counter;
3627 	struct wmi_key_seq_counter key_tsc_counter;
3628 	u8 wpi_key_rsc_counter[16];
3629 	u8 wpi_key_tsc_counter[16];
3630 	u32 key_len;
3631 	u32 key_txmic_len;
3632 	u32 key_rxmic_len;
3633 	u32 is_group_key_id_valid;
3634 	u32 group_key_id;
3635 
3636 	/* Followed by key_data containing key followed by
3637 	 * tx mic and then rx mic
3638 	 */
3639 } __packed;
3640 
3641 struct wmi_vdev_install_key_arg {
3642 	u32 vdev_id;
3643 	const u8 *macaddr;
3644 	u32 key_idx;
3645 	u32 key_flags;
3646 	u32 key_cipher;
3647 	u32 key_len;
3648 	u32 key_txmic_len;
3649 	u32 key_rxmic_len;
3650 	u64 key_rsc_counter;
3651 	const void *key_data;
3652 };
3653 
3654 #define WMI_MAX_SUPPORTED_RATES			128
3655 #define WMI_HOST_MAX_HECAP_PHY_SIZE		3
3656 #define WMI_HOST_MAX_HE_RATE_SET		3
3657 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80		0
3658 #define WMI_HECAP_TXRX_MCS_NSS_IDX_160		1
3659 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80_80	2
3660 
3661 struct wmi_rate_set_arg {
3662 	u32 num_rates;
3663 	u8 rates[WMI_MAX_SUPPORTED_RATES];
3664 };
3665 
3666 struct peer_assoc_params {
3667 	struct wmi_mac_addr peer_macaddr;
3668 	u32 vdev_id;
3669 	u32 peer_new_assoc;
3670 	u32 peer_associd;
3671 	u32 peer_flags;
3672 	u32 peer_caps;
3673 	u32 peer_listen_intval;
3674 	u32 peer_ht_caps;
3675 	u32 peer_max_mpdu;
3676 	u32 peer_mpdu_density;
3677 	u32 peer_rate_caps;
3678 	u32 peer_nss;
3679 	u32 peer_vht_caps;
3680 	u32 peer_phymode;
3681 	u32 peer_ht_info[2];
3682 	struct wmi_rate_set_arg peer_legacy_rates;
3683 	struct wmi_rate_set_arg peer_ht_rates;
3684 	u32 rx_max_rate;
3685 	u32 rx_mcs_set;
3686 	u32 tx_max_rate;
3687 	u32 tx_mcs_set;
3688 	u8 vht_capable;
3689 	u8 min_data_rate;
3690 	u32 tx_max_mcs_nss;
3691 	u32 peer_bw_rxnss_override;
3692 	bool is_pmf_enabled;
3693 	bool is_wme_set;
3694 	bool qos_flag;
3695 	bool apsd_flag;
3696 	bool ht_flag;
3697 	bool bw_40;
3698 	bool bw_80;
3699 	bool bw_160;
3700 	bool stbc_flag;
3701 	bool ldpc_flag;
3702 	bool static_mimops_flag;
3703 	bool dynamic_mimops_flag;
3704 	bool spatial_mux_flag;
3705 	bool vht_flag;
3706 	bool vht_ng_flag;
3707 	bool need_ptk_4_way;
3708 	bool need_gtk_2_way;
3709 	bool auth_flag;
3710 	bool safe_mode_enabled;
3711 	bool amsdu_disable;
3712 	/* Use common structure */
3713 	u8 peer_mac[ETH_ALEN];
3714 
3715 	bool he_flag;
3716 	u32 peer_he_cap_macinfo[2];
3717 	u32 peer_he_cap_macinfo_internal;
3718 	u32 peer_he_caps_6ghz;
3719 	u32 peer_he_ops;
3720 	u32 peer_he_cap_phyinfo[WMI_HOST_MAX_HECAP_PHY_SIZE];
3721 	u32 peer_he_mcs_count;
3722 	u32 peer_he_rx_mcs_set[WMI_HOST_MAX_HE_RATE_SET];
3723 	u32 peer_he_tx_mcs_set[WMI_HOST_MAX_HE_RATE_SET];
3724 	bool twt_responder;
3725 	bool twt_requester;
3726 	bool is_assoc;
3727 	struct ath11k_ppe_threshold peer_ppet;
3728 };
3729 
3730 struct  wmi_peer_assoc_complete_cmd {
3731 	u32 tlv_header;
3732 	struct wmi_mac_addr peer_macaddr;
3733 	u32 vdev_id;
3734 	u32 peer_new_assoc;
3735 	u32 peer_associd;
3736 	u32 peer_flags;
3737 	u32 peer_caps;
3738 	u32 peer_listen_intval;
3739 	u32 peer_ht_caps;
3740 	u32 peer_max_mpdu;
3741 	u32 peer_mpdu_density;
3742 	u32 peer_rate_caps;
3743 	u32 peer_nss;
3744 	u32 peer_vht_caps;
3745 	u32 peer_phymode;
3746 	u32 peer_ht_info[2];
3747 	u32 num_peer_legacy_rates;
3748 	u32 num_peer_ht_rates;
3749 	u32 peer_bw_rxnss_override;
3750 	struct  wmi_ppe_threshold peer_ppet;
3751 	u32 peer_he_cap_info;
3752 	u32 peer_he_ops;
3753 	u32 peer_he_cap_phy[WMI_MAX_HECAP_PHY_SIZE];
3754 	u32 peer_he_mcs;
3755 	u32 peer_he_cap_info_ext;
3756 	u32 peer_he_cap_info_internal;
3757 	u32 min_data_rate;
3758 	u32 peer_he_caps_6ghz;
3759 } __packed;
3760 
3761 struct wmi_stop_scan_cmd {
3762 	u32 tlv_header;
3763 	u32 requestor;
3764 	u32 scan_id;
3765 	u32 req_type;
3766 	u32 vdev_id;
3767 	u32 pdev_id;
3768 };
3769 
3770 struct scan_chan_list_params {
3771 	u32 pdev_id;
3772 	u16 nallchans;
3773 	struct channel_param ch_param[];
3774 };
3775 
3776 struct wmi_scan_chan_list_cmd {
3777 	u32 tlv_header;
3778 	u32 num_scan_chans;
3779 	u32 flags;
3780 	u32 pdev_id;
3781 } __packed;
3782 
3783 struct wmi_scan_prob_req_oui_cmd {
3784 	u32 tlv_header;
3785 	u32 prob_req_oui;
3786 }  __packed;
3787 
3788 #define WMI_MGMT_SEND_DOWNLD_LEN	64
3789 
3790 #define WMI_TX_PARAMS_DWORD0_POWER		GENMASK(7, 0)
3791 #define WMI_TX_PARAMS_DWORD0_MCS_MASK		GENMASK(19, 8)
3792 #define WMI_TX_PARAMS_DWORD0_NSS_MASK		GENMASK(27, 20)
3793 #define WMI_TX_PARAMS_DWORD0_RETRY_LIMIT	GENMASK(31, 28)
3794 
3795 #define WMI_TX_PARAMS_DWORD1_CHAIN_MASK		GENMASK(7, 0)
3796 #define WMI_TX_PARAMS_DWORD1_BW_MASK		GENMASK(14, 8)
3797 #define WMI_TX_PARAMS_DWORD1_PREAMBLE_TYPE	GENMASK(19, 15)
3798 #define WMI_TX_PARAMS_DWORD1_FRAME_TYPE		BIT(20)
3799 #define WMI_TX_PARAMS_DWORD1_RSVD		GENMASK(31, 21)
3800 
3801 struct wmi_mgmt_send_params {
3802 	u32 tlv_header;
3803 	u32 tx_params_dword0;
3804 	u32 tx_params_dword1;
3805 };
3806 
3807 struct wmi_mgmt_send_cmd {
3808 	u32 tlv_header;
3809 	u32 vdev_id;
3810 	u32 desc_id;
3811 	u32 chanfreq;
3812 	u32 paddr_lo;
3813 	u32 paddr_hi;
3814 	u32 frame_len;
3815 	u32 buf_len;
3816 	u32 tx_params_valid;
3817 
3818 	/* This TLV is followed by struct wmi_mgmt_frame */
3819 
3820 	/* Followed by struct wmi_mgmt_send_params */
3821 } __packed;
3822 
3823 struct wmi_sta_powersave_mode_cmd {
3824 	u32 tlv_header;
3825 	u32 vdev_id;
3826 	u32 sta_ps_mode;
3827 };
3828 
3829 struct wmi_sta_smps_force_mode_cmd {
3830 	u32 tlv_header;
3831 	u32 vdev_id;
3832 	u32 forced_mode;
3833 };
3834 
3835 struct wmi_sta_smps_param_cmd {
3836 	u32 tlv_header;
3837 	u32 vdev_id;
3838 	u32 param;
3839 	u32 value;
3840 };
3841 
3842 struct wmi_bcn_prb_info {
3843 	u32 tlv_header;
3844 	u32 caps;
3845 	u32 erp;
3846 } __packed;
3847 
3848 enum {
3849 	WMI_PDEV_SUSPEND,
3850 	WMI_PDEV_SUSPEND_AND_DISABLE_INTR,
3851 };
3852 
3853 struct green_ap_ps_params {
3854 	u32 value;
3855 };
3856 
3857 struct wmi_pdev_green_ap_ps_enable_cmd_param {
3858 	u32 tlv_header;
3859 	u32 pdev_id;
3860 	u32 enable;
3861 };
3862 
3863 struct ap_ps_params {
3864 	u32 vdev_id;
3865 	u32 param;
3866 	u32 value;
3867 };
3868 
3869 struct vdev_set_params {
3870 	u32 if_id;
3871 	u32 param_id;
3872 	u32 param_value;
3873 };
3874 
3875 struct stats_request_params {
3876 	u32 stats_id;
3877 	u32 vdev_id;
3878 	u32 pdev_id;
3879 };
3880 
3881 struct wmi_set_current_country_params {
3882 	u8 alpha2[3];
3883 };
3884 
3885 struct wmi_set_current_country_cmd {
3886 	u32 tlv_header;
3887 	u32 pdev_id;
3888 	u32 new_alpha2;
3889 } __packed;
3890 
3891 enum set_init_cc_type {
3892 	WMI_COUNTRY_INFO_TYPE_ALPHA,
3893 	WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE,
3894 	WMI_COUNTRY_INFO_TYPE_REGDOMAIN,
3895 };
3896 
3897 enum set_init_cc_flags {
3898 	INVALID_CC,
3899 	CC_IS_SET,
3900 	REGDMN_IS_SET,
3901 	ALPHA_IS_SET,
3902 };
3903 
3904 struct wmi_init_country_params {
3905 	union {
3906 		u16 country_code;
3907 		u16 regdom_id;
3908 		u8 alpha2[3];
3909 	} cc_info;
3910 	enum set_init_cc_flags flags;
3911 };
3912 
3913 struct wmi_init_country_cmd {
3914 	u32 tlv_header;
3915 	u32 pdev_id;
3916 	u32 init_cc_type;
3917 	union {
3918 		u32 country_code;
3919 		u32 regdom_id;
3920 		u32 alpha2;
3921 	} cc_info;
3922 } __packed;
3923 
3924 struct wmi_11d_scan_start_params {
3925 	u32 vdev_id;
3926 	u32 scan_period_msec;
3927 	u32 start_interval_msec;
3928 };
3929 
3930 struct wmi_11d_scan_start_cmd {
3931 	u32 tlv_header;
3932 	u32 vdev_id;
3933 	u32 scan_period_msec;
3934 	u32 start_interval_msec;
3935 } __packed;
3936 
3937 struct wmi_11d_scan_stop_cmd {
3938 	u32 tlv_header;
3939 	u32 vdev_id;
3940 } __packed;
3941 
3942 struct wmi_11d_new_cc_ev {
3943 	u32 new_alpha2;
3944 } __packed;
3945 
3946 #define THERMAL_LEVELS  1
3947 struct tt_level_config {
3948 	u32 tmplwm;
3949 	u32 tmphwm;
3950 	u32 dcoffpercent;
3951 	u32 priority;
3952 };
3953 
3954 struct thermal_mitigation_params {
3955 	u32 pdev_id;
3956 	u32 enable;
3957 	u32 dc;
3958 	u32 dc_per_event;
3959 	struct tt_level_config levelconf[THERMAL_LEVELS];
3960 };
3961 
3962 struct wmi_therm_throt_config_request_cmd {
3963 	u32 tlv_header;
3964 	u32 pdev_id;
3965 	u32 enable;
3966 	u32 dc;
3967 	u32 dc_per_event;
3968 	u32 therm_throt_levels;
3969 } __packed;
3970 
3971 struct wmi_therm_throt_level_config_info {
3972 	u32 tlv_header;
3973 	u32 temp_lwm;
3974 	u32 temp_hwm;
3975 	u32 dc_off_percent;
3976 	u32 prio;
3977 } __packed;
3978 
3979 struct wmi_delba_send_cmd {
3980 	u32 tlv_header;
3981 	u32 vdev_id;
3982 	struct wmi_mac_addr peer_macaddr;
3983 	u32 tid;
3984 	u32 initiator;
3985 	u32 reasoncode;
3986 } __packed;
3987 
3988 struct wmi_addba_setresponse_cmd {
3989 	u32 tlv_header;
3990 	u32 vdev_id;
3991 	struct wmi_mac_addr peer_macaddr;
3992 	u32 tid;
3993 	u32 statuscode;
3994 } __packed;
3995 
3996 struct wmi_addba_send_cmd {
3997 	u32 tlv_header;
3998 	u32 vdev_id;
3999 	struct wmi_mac_addr peer_macaddr;
4000 	u32 tid;
4001 	u32 buffersize;
4002 } __packed;
4003 
4004 struct wmi_addba_clear_resp_cmd {
4005 	u32 tlv_header;
4006 	u32 vdev_id;
4007 	struct wmi_mac_addr peer_macaddr;
4008 } __packed;
4009 
4010 struct wmi_pdev_pktlog_filter_info {
4011 	u32 tlv_header;
4012 	struct wmi_mac_addr peer_macaddr;
4013 } __packed;
4014 
4015 struct wmi_pdev_pktlog_filter_cmd {
4016 	u32 tlv_header;
4017 	u32 pdev_id;
4018 	u32 enable;
4019 	u32 filter_type;
4020 	u32 num_mac;
4021 } __packed;
4022 
4023 enum ath11k_wmi_pktlog_enable {
4024 	ATH11K_WMI_PKTLOG_ENABLE_AUTO  = 0,
4025 	ATH11K_WMI_PKTLOG_ENABLE_FORCE = 1,
4026 };
4027 
4028 struct wmi_pktlog_enable_cmd {
4029 	u32 tlv_header;
4030 	u32 pdev_id;
4031 	u32 evlist; /* WMI_PKTLOG_EVENT */
4032 	u32 enable;
4033 } __packed;
4034 
4035 struct wmi_pktlog_disable_cmd {
4036 	u32 tlv_header;
4037 	u32 pdev_id;
4038 } __packed;
4039 
4040 #define DFS_PHYERR_UNIT_TEST_CMD 0
4041 #define DFS_UNIT_TEST_MODULE	0x2b
4042 #define DFS_UNIT_TEST_TOKEN	0xAA
4043 
4044 enum dfs_test_args_idx {
4045 	DFS_TEST_CMDID = 0,
4046 	DFS_TEST_PDEV_ID,
4047 	DFS_TEST_RADAR_PARAM,
4048 	DFS_MAX_TEST_ARGS,
4049 };
4050 
4051 struct wmi_dfs_unit_test_arg {
4052 	u32 cmd_id;
4053 	u32 pdev_id;
4054 	u32 radar_param;
4055 };
4056 
4057 struct wmi_unit_test_cmd {
4058 	u32 tlv_header;
4059 	u32 vdev_id;
4060 	u32 module_id;
4061 	u32 num_args;
4062 	u32 diag_token;
4063 	/* Followed by test args*/
4064 } __packed;
4065 
4066 #define MAX_SUPPORTED_RATES 128
4067 
4068 #define WMI_PEER_AUTH		0x00000001
4069 #define WMI_PEER_QOS		0x00000002
4070 #define WMI_PEER_NEED_PTK_4_WAY	0x00000004
4071 #define WMI_PEER_NEED_GTK_2_WAY	0x00000010
4072 #define WMI_PEER_HE		0x00000400
4073 #define WMI_PEER_APSD		0x00000800
4074 #define WMI_PEER_HT		0x00001000
4075 #define WMI_PEER_40MHZ		0x00002000
4076 #define WMI_PEER_STBC		0x00008000
4077 #define WMI_PEER_LDPC		0x00010000
4078 #define WMI_PEER_DYN_MIMOPS	0x00020000
4079 #define WMI_PEER_STATIC_MIMOPS	0x00040000
4080 #define WMI_PEER_SPATIAL_MUX	0x00200000
4081 #define WMI_PEER_TWT_REQ	0x00400000
4082 #define WMI_PEER_TWT_RESP	0x00800000
4083 #define WMI_PEER_VHT		0x02000000
4084 #define WMI_PEER_80MHZ		0x04000000
4085 #define WMI_PEER_PMF		0x08000000
4086 /* TODO: Place holder for WLAN_PEER_F_PS_PRESEND_REQUIRED = 0x10000000.
4087  * Need to be cleaned up
4088  */
4089 #define WMI_PEER_IS_P2P_CAPABLE	0x20000000
4090 #define WMI_PEER_160MHZ		0x40000000
4091 #define WMI_PEER_SAFEMODE_EN	0x80000000
4092 
4093 struct beacon_tmpl_params {
4094 	u8 vdev_id;
4095 	u32 tim_ie_offset;
4096 	u32 tmpl_len;
4097 	u32 tmpl_len_aligned;
4098 	u32 csa_switch_count_offset;
4099 	u32 ext_csa_switch_count_offset;
4100 	u8 *frm;
4101 };
4102 
4103 struct wmi_rate_set {
4104 	u32 num_rates;
4105 	u32 rates[(MAX_SUPPORTED_RATES / 4) + 1];
4106 };
4107 
4108 struct wmi_vht_rate_set {
4109 	u32 tlv_header;
4110 	u32 rx_max_rate;
4111 	u32 rx_mcs_set;
4112 	u32 tx_max_rate;
4113 	u32 tx_mcs_set;
4114 	u32 tx_max_mcs_nss;
4115 } __packed;
4116 
4117 struct wmi_he_rate_set {
4118 	u32 tlv_header;
4119 
4120 	/* MCS at which the peer can receive */
4121 	u32 rx_mcs_set;
4122 
4123 	/* MCS at which the peer can transmit */
4124 	u32 tx_mcs_set;
4125 } __packed;
4126 
4127 #define MAX_REG_RULES 10
4128 #define REG_ALPHA2_LEN 2
4129 #define MAX_6GHZ_REG_RULES 5
4130 
4131 enum wmi_start_event_param {
4132 	WMI_VDEV_START_RESP_EVENT = 0,
4133 	WMI_VDEV_RESTART_RESP_EVENT,
4134 };
4135 
4136 struct wmi_vdev_start_resp_event {
4137 	u32 vdev_id;
4138 	u32 requestor_id;
4139 	enum wmi_start_event_param resp_type;
4140 	u32 status;
4141 	u32 chain_mask;
4142 	u32 smps_mode;
4143 	union {
4144 		u32 mac_id;
4145 		u32 pdev_id;
4146 	};
4147 	u32 cfgd_tx_streams;
4148 	u32 cfgd_rx_streams;
4149 } __packed;
4150 
4151 /* VDEV start response status codes */
4152 enum wmi_vdev_start_resp_status_code {
4153 	WMI_VDEV_START_RESPONSE_STATUS_SUCCESS = 0,
4154 	WMI_VDEV_START_RESPONSE_INVALID_VDEVID = 1,
4155 	WMI_VDEV_START_RESPONSE_NOT_SUPPORTED = 2,
4156 	WMI_VDEV_START_RESPONSE_DFS_VIOLATION = 3,
4157 	WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4,
4158 };
4159 
4160 /* Regaulatory Rule Flags Passed by FW */
4161 #define REGULATORY_CHAN_DISABLED     BIT(0)
4162 #define REGULATORY_CHAN_NO_IR        BIT(1)
4163 #define REGULATORY_CHAN_RADAR        BIT(3)
4164 #define REGULATORY_CHAN_NO_OFDM      BIT(6)
4165 #define REGULATORY_CHAN_INDOOR_ONLY  BIT(9)
4166 
4167 #define REGULATORY_CHAN_NO_HT40      BIT(4)
4168 #define REGULATORY_CHAN_NO_80MHZ     BIT(7)
4169 #define REGULATORY_CHAN_NO_160MHZ    BIT(8)
4170 #define REGULATORY_CHAN_NO_20MHZ     BIT(11)
4171 #define REGULATORY_CHAN_NO_10MHZ     BIT(12)
4172 
4173 enum wmi_reg_chan_list_cmd_type {
4174 	WMI_REG_CHAN_LIST_CC_ID = 0,
4175 	WMI_REG_CHAN_LIST_CC_EXT_ID = 1,
4176 };
4177 
4178 enum wmi_reg_cc_setting_code {
4179 	WMI_REG_SET_CC_STATUS_PASS = 0,
4180 	WMI_REG_CURRENT_ALPHA2_NOT_FOUND = 1,
4181 	WMI_REG_INIT_ALPHA2_NOT_FOUND = 2,
4182 	WMI_REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
4183 	WMI_REG_SET_CC_STATUS_NO_MEMORY = 4,
4184 	WMI_REG_SET_CC_STATUS_FAIL = 5,
4185 
4186 	/* add new setting code above, update in
4187 	 * @enum cc_setting_code as well.
4188 	 * Also handle it in ath11k_wmi_cc_setting_code_to_reg()
4189 	 */
4190 };
4191 
4192 enum cc_setting_code {
4193 	REG_SET_CC_STATUS_PASS = 0,
4194 	REG_CURRENT_ALPHA2_NOT_FOUND = 1,
4195 	REG_INIT_ALPHA2_NOT_FOUND = 2,
4196 	REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
4197 	REG_SET_CC_STATUS_NO_MEMORY = 4,
4198 	REG_SET_CC_STATUS_FAIL = 5,
4199 
4200 	/* add new setting code above, update in
4201 	 * @enum wmi_reg_cc_setting_code as well.
4202 	 * Also handle it in ath11k_cc_status_to_str()
4203 	 */
4204 };
4205 
4206 static inline enum cc_setting_code
ath11k_wmi_cc_setting_code_to_reg(enum wmi_reg_cc_setting_code status_code)4207 ath11k_wmi_cc_setting_code_to_reg(enum wmi_reg_cc_setting_code status_code)
4208 {
4209 	switch (status_code) {
4210 	case WMI_REG_SET_CC_STATUS_PASS:
4211 		return REG_SET_CC_STATUS_PASS;
4212 	case WMI_REG_CURRENT_ALPHA2_NOT_FOUND:
4213 		return REG_CURRENT_ALPHA2_NOT_FOUND;
4214 	case WMI_REG_INIT_ALPHA2_NOT_FOUND:
4215 		return REG_INIT_ALPHA2_NOT_FOUND;
4216 	case WMI_REG_SET_CC_CHANGE_NOT_ALLOWED:
4217 		return REG_SET_CC_CHANGE_NOT_ALLOWED;
4218 	case WMI_REG_SET_CC_STATUS_NO_MEMORY:
4219 		return REG_SET_CC_STATUS_NO_MEMORY;
4220 	case WMI_REG_SET_CC_STATUS_FAIL:
4221 		return REG_SET_CC_STATUS_FAIL;
4222 	}
4223 
4224 	return REG_SET_CC_STATUS_FAIL;
4225 }
4226 
ath11k_cc_status_to_str(enum cc_setting_code code)4227 static inline const char *ath11k_cc_status_to_str(enum cc_setting_code code)
4228 {
4229 	switch (code) {
4230 	case REG_SET_CC_STATUS_PASS:
4231 		return "REG_SET_CC_STATUS_PASS";
4232 	case REG_CURRENT_ALPHA2_NOT_FOUND:
4233 		return "REG_CURRENT_ALPHA2_NOT_FOUND";
4234 	case REG_INIT_ALPHA2_NOT_FOUND:
4235 		return "REG_INIT_ALPHA2_NOT_FOUND";
4236 	case REG_SET_CC_CHANGE_NOT_ALLOWED:
4237 		return "REG_SET_CC_CHANGE_NOT_ALLOWED";
4238 	case REG_SET_CC_STATUS_NO_MEMORY:
4239 		return "REG_SET_CC_STATUS_NO_MEMORY";
4240 	case REG_SET_CC_STATUS_FAIL:
4241 		return "REG_SET_CC_STATUS_FAIL";
4242 	}
4243 
4244 	return "Unknown CC status";
4245 }
4246 
4247 enum wmi_reg_6ghz_ap_type {
4248 	WMI_REG_INDOOR_AP = 0,
4249 	WMI_REG_STANDARD_POWER_AP = 1,
4250 	WMI_REG_VERY_LOW_POWER_AP = 2,
4251 
4252 	/* add AP type above, handle in ath11k_6ghz_ap_type_to_str()
4253 	 */
4254 	WMI_REG_CURRENT_MAX_AP_TYPE,
4255 	WMI_REG_MAX_AP_TYPE = 7,
4256 };
4257 
4258 static inline const char *
ath11k_6ghz_ap_type_to_str(enum wmi_reg_6ghz_ap_type type)4259 ath11k_6ghz_ap_type_to_str(enum wmi_reg_6ghz_ap_type type)
4260 {
4261 	switch (type) {
4262 	case WMI_REG_INDOOR_AP:
4263 		return "INDOOR AP";
4264 	case WMI_REG_STANDARD_POWER_AP:
4265 		return "STANDARD POWER AP";
4266 	case WMI_REG_VERY_LOW_POWER_AP:
4267 		return "VERY LOW POWER AP";
4268 	case WMI_REG_CURRENT_MAX_AP_TYPE:
4269 		return "CURRENT_MAX_AP_TYPE";
4270 	case WMI_REG_MAX_AP_TYPE:
4271 		return "MAX_AP_TYPE";
4272 	}
4273 
4274 	return "unknown 6 GHz AP type";
4275 }
4276 
4277 enum wmi_reg_6ghz_client_type {
4278 	WMI_REG_DEFAULT_CLIENT = 0,
4279 	WMI_REG_SUBORDINATE_CLIENT = 1,
4280 	WMI_REG_MAX_CLIENT_TYPE = 2,
4281 
4282 	/* add client type above, handle it in
4283 	 * ath11k_6ghz_client_type_to_str()
4284 	 */
4285 };
4286 
4287 static inline const char *
ath11k_6ghz_client_type_to_str(enum wmi_reg_6ghz_client_type type)4288 ath11k_6ghz_client_type_to_str(enum wmi_reg_6ghz_client_type type)
4289 {
4290 	switch (type) {
4291 	case WMI_REG_DEFAULT_CLIENT:
4292 		return "DEFAULT CLIENT";
4293 	case WMI_REG_SUBORDINATE_CLIENT:
4294 		return "SUBORDINATE CLIENT";
4295 	case WMI_REG_MAX_CLIENT_TYPE:
4296 		return "MAX_CLIENT_TYPE";
4297 	}
4298 
4299 	return "unknown 6 GHz client type";
4300 }
4301 
4302 enum reg_subdomains_6ghz {
4303 	EMPTY_6GHZ = 0x0,
4304 	FCC1_CLIENT_LPI_REGULAR_6GHZ = 0x01,
4305 	FCC1_CLIENT_SP_6GHZ = 0x02,
4306 	FCC1_AP_LPI_6GHZ = 0x03,
4307 	FCC1_CLIENT_LPI_SUBORDINATE = FCC1_AP_LPI_6GHZ,
4308 	FCC1_AP_SP_6GHZ = 0x04,
4309 	ETSI1_LPI_6GHZ = 0x10,
4310 	ETSI1_VLP_6GHZ = 0x11,
4311 	ETSI2_LPI_6GHZ = 0x12,
4312 	ETSI2_VLP_6GHZ = 0x13,
4313 	APL1_LPI_6GHZ = 0x20,
4314 	APL1_VLP_6GHZ = 0x21,
4315 
4316 	/* add sub-domain above, handle it in
4317 	 * ath11k_sub_reg_6ghz_to_str()
4318 	 */
4319 };
4320 
4321 static inline const char *
ath11k_sub_reg_6ghz_to_str(enum reg_subdomains_6ghz sub_id)4322 ath11k_sub_reg_6ghz_to_str(enum reg_subdomains_6ghz sub_id)
4323 {
4324 	switch (sub_id) {
4325 	case EMPTY_6GHZ:
4326 		return "N/A";
4327 	case FCC1_CLIENT_LPI_REGULAR_6GHZ:
4328 		return "FCC1_CLIENT_LPI_REGULAR_6GHZ";
4329 	case FCC1_CLIENT_SP_6GHZ:
4330 		return "FCC1_CLIENT_SP_6GHZ";
4331 	case FCC1_AP_LPI_6GHZ:
4332 		return "FCC1_AP_LPI_6GHZ/FCC1_CLIENT_LPI_SUBORDINATE";
4333 	case FCC1_AP_SP_6GHZ:
4334 		return "FCC1_AP_SP_6GHZ";
4335 	case ETSI1_LPI_6GHZ:
4336 		return "ETSI1_LPI_6GHZ";
4337 	case ETSI1_VLP_6GHZ:
4338 		return "ETSI1_VLP_6GHZ";
4339 	case ETSI2_LPI_6GHZ:
4340 		return "ETSI2_LPI_6GHZ";
4341 	case ETSI2_VLP_6GHZ:
4342 		return "ETSI2_VLP_6GHZ";
4343 	case APL1_LPI_6GHZ:
4344 		return "APL1_LPI_6GHZ";
4345 	case APL1_VLP_6GHZ:
4346 		return "APL1_VLP_6GHZ";
4347 	}
4348 
4349 	return "unknown sub reg id";
4350 }
4351 
4352 enum reg_super_domain_6ghz {
4353 	FCC1_6GHZ = 0x01,
4354 	ETSI1_6GHZ = 0x02,
4355 	ETSI2_6GHZ = 0x03,
4356 	APL1_6GHZ = 0x04,
4357 	FCC1_6GHZ_CL = 0x05,
4358 
4359 	/* add super domain above, handle it in
4360 	 * ath11k_super_reg_6ghz_to_str()
4361 	 */
4362 };
4363 
4364 static inline const char *
ath11k_super_reg_6ghz_to_str(enum reg_super_domain_6ghz domain_id)4365 ath11k_super_reg_6ghz_to_str(enum reg_super_domain_6ghz domain_id)
4366 {
4367 	switch (domain_id) {
4368 	case FCC1_6GHZ:
4369 		return "FCC1_6GHZ";
4370 	case ETSI1_6GHZ:
4371 		return "ETSI1_6GHZ";
4372 	case ETSI2_6GHZ:
4373 		return "ETSI2_6GHZ";
4374 	case APL1_6GHZ:
4375 		return "APL1_6GHZ";
4376 	case FCC1_6GHZ_CL:
4377 		return "FCC1_6GHZ_CL";
4378 	}
4379 
4380 	return "unknown domain id";
4381 }
4382 
4383 struct cur_reg_rule {
4384 	u16 start_freq;
4385 	u16 end_freq;
4386 	u16 max_bw;
4387 	u8 reg_power;
4388 	u8 ant_gain;
4389 	u16 flags;
4390 	bool psd_flag;
4391 	s8 psd_eirp;
4392 };
4393 
4394 struct cur_regulatory_info {
4395 	enum cc_setting_code status_code;
4396 	u8 num_phy;
4397 	u8 phy_id;
4398 	u16 reg_dmn_pair;
4399 	u16 ctry_code;
4400 	u8 alpha2[REG_ALPHA2_LEN + 1];
4401 	u32 dfs_region;
4402 	u32 phybitmap;
4403 	u32 min_bw_2ghz;
4404 	u32 max_bw_2ghz;
4405 	u32 min_bw_5ghz;
4406 	u32 max_bw_5ghz;
4407 	u32 num_2ghz_reg_rules;
4408 	u32 num_5ghz_reg_rules;
4409 	struct cur_reg_rule *reg_rules_2ghz_ptr;
4410 	struct cur_reg_rule *reg_rules_5ghz_ptr;
4411 	bool is_ext_reg_event;
4412 	enum wmi_reg_6ghz_client_type client_type;
4413 	bool rnr_tpe_usable;
4414 	bool unspecified_ap_usable;
4415 	u8 domain_code_6ghz_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
4416 	u8 domain_code_6ghz_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
4417 	u32 domain_code_6ghz_super_id;
4418 	u32 min_bw_6ghz_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
4419 	u32 max_bw_6ghz_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
4420 	u32 min_bw_6ghz_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
4421 	u32 max_bw_6ghz_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
4422 	u32 num_6ghz_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
4423 	u32 num_6ghz_rules_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
4424 	struct cur_reg_rule *reg_rules_6ghz_ap_ptr[WMI_REG_CURRENT_MAX_AP_TYPE];
4425 	struct cur_reg_rule *reg_rules_6ghz_client_ptr
4426 		[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
4427 };
4428 
4429 struct wmi_reg_chan_list_cc_event {
4430 	u32 status_code;
4431 	u32 phy_id;
4432 	u32 alpha2;
4433 	u32 num_phy;
4434 	u32 country_id;
4435 	u32 domain_code;
4436 	u32 dfs_region;
4437 	u32 phybitmap;
4438 	u32 min_bw_2ghz;
4439 	u32 max_bw_2ghz;
4440 	u32 min_bw_5ghz;
4441 	u32 max_bw_5ghz;
4442 	u32 num_2ghz_reg_rules;
4443 	u32 num_5ghz_reg_rules;
4444 } __packed;
4445 
4446 struct wmi_regulatory_rule_struct {
4447 	u32  tlv_header;
4448 	u32  freq_info;
4449 	u32  bw_pwr_info;
4450 	u32  flag_info;
4451 };
4452 
4453 #define WMI_REG_CLIENT_MAX 4
4454 
4455 struct wmi_reg_chan_list_cc_ext_event {
4456 	u32 status_code;
4457 	u32 phy_id;
4458 	u32 alpha2;
4459 	u32 num_phy;
4460 	u32 country_id;
4461 	u32 domain_code;
4462 	u32 dfs_region;
4463 	u32 phybitmap;
4464 	u32 min_bw_2ghz;
4465 	u32 max_bw_2ghz;
4466 	u32 min_bw_5ghz;
4467 	u32 max_bw_5ghz;
4468 	u32 num_2ghz_reg_rules;
4469 	u32 num_5ghz_reg_rules;
4470 	u32 client_type;
4471 	u32 rnr_tpe_usable;
4472 	u32 unspecified_ap_usable;
4473 	u32 domain_code_6ghz_ap_lpi;
4474 	u32 domain_code_6ghz_ap_sp;
4475 	u32 domain_code_6ghz_ap_vlp;
4476 	u32 domain_code_6ghz_client_lpi[WMI_REG_CLIENT_MAX];
4477 	u32 domain_code_6ghz_client_sp[WMI_REG_CLIENT_MAX];
4478 	u32 domain_code_6ghz_client_vlp[WMI_REG_CLIENT_MAX];
4479 	u32 domain_code_6ghz_super_id;
4480 	u32 min_bw_6ghz_ap_sp;
4481 	u32 max_bw_6ghz_ap_sp;
4482 	u32 min_bw_6ghz_ap_lpi;
4483 	u32 max_bw_6ghz_ap_lpi;
4484 	u32 min_bw_6ghz_ap_vlp;
4485 	u32 max_bw_6ghz_ap_vlp;
4486 	u32 min_bw_6ghz_client_sp[WMI_REG_CLIENT_MAX];
4487 	u32 max_bw_6ghz_client_sp[WMI_REG_CLIENT_MAX];
4488 	u32 min_bw_6ghz_client_lpi[WMI_REG_CLIENT_MAX];
4489 	u32 max_bw_6ghz_client_lpi[WMI_REG_CLIENT_MAX];
4490 	u32 min_bw_6ghz_client_vlp[WMI_REG_CLIENT_MAX];
4491 	u32 max_bw_6ghz_client_vlp[WMI_REG_CLIENT_MAX];
4492 	u32 num_6ghz_reg_rules_ap_sp;
4493 	u32 num_6ghz_reg_rules_ap_lpi;
4494 	u32 num_6ghz_reg_rules_ap_vlp;
4495 	u32 num_6ghz_reg_rules_client_sp[WMI_REG_CLIENT_MAX];
4496 	u32 num_6ghz_reg_rules_client_lpi[WMI_REG_CLIENT_MAX];
4497 	u32 num_6ghz_reg_rules_client_vlp[WMI_REG_CLIENT_MAX];
4498 } __packed;
4499 
4500 struct wmi_regulatory_ext_rule {
4501 	u32 tlv_header;
4502 	u32 freq_info;
4503 	u32 bw_pwr_info;
4504 	u32 flag_info;
4505 	u32 psd_power_info;
4506 } __packed;
4507 
4508 struct wmi_vdev_delete_resp_event {
4509 	u32 vdev_id;
4510 } __packed;
4511 
4512 struct wmi_peer_delete_resp_event {
4513 	u32 vdev_id;
4514 	struct wmi_mac_addr peer_macaddr;
4515 } __packed;
4516 
4517 struct wmi_bcn_tx_status_event {
4518 	u32 vdev_id;
4519 	u32 tx_status;
4520 } __packed;
4521 
4522 struct wmi_vdev_stopped_event {
4523 	u32 vdev_id;
4524 } __packed;
4525 
4526 struct wmi_pdev_bss_chan_info_event {
4527 	u32 freq;	/* Units in MHz */
4528 	u32 noise_floor;	/* units are dBm */
4529 	/* rx clear - how often the channel was unused */
4530 	u32 rx_clear_count_low;
4531 	u32 rx_clear_count_high;
4532 	/* cycle count - elapsed time during measured period, in clock ticks */
4533 	u32 cycle_count_low;
4534 	u32 cycle_count_high;
4535 	/* tx cycle count - elapsed time spent in tx, in clock ticks */
4536 	u32 tx_cycle_count_low;
4537 	u32 tx_cycle_count_high;
4538 	/* rx cycle count - elapsed time spent in rx, in clock ticks */
4539 	u32 rx_cycle_count_low;
4540 	u32 rx_cycle_count_high;
4541 	/*rx_cycle cnt for my bss in 64bits format */
4542 	u32 rx_bss_cycle_count_low;
4543 	u32 rx_bss_cycle_count_high;
4544 	u32 pdev_id;
4545 } __packed;
4546 
4547 #define WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS 0
4548 
4549 struct wmi_vdev_install_key_compl_event {
4550 	u32 vdev_id;
4551 	struct wmi_mac_addr peer_macaddr;
4552 	u32 key_idx;
4553 	u32 key_flags;
4554 	u32 status;
4555 } __packed;
4556 
4557 struct wmi_vdev_install_key_complete_arg {
4558 	u32 vdev_id;
4559 	const u8 *macaddr;
4560 	u32 key_idx;
4561 	u32 key_flags;
4562 	u32 status;
4563 };
4564 
4565 struct wmi_peer_assoc_conf_event {
4566 	u32 vdev_id;
4567 	struct wmi_mac_addr peer_macaddr;
4568 } __packed;
4569 
4570 struct wmi_peer_assoc_conf_arg {
4571 	u32 vdev_id;
4572 	const u8 *macaddr;
4573 };
4574 
4575 struct wmi_fils_discovery_event {
4576 	u32 vdev_id;
4577 	u32 fils_tt;
4578 	u32 tbtt;
4579 } __packed;
4580 
4581 struct wmi_probe_resp_tx_status_event {
4582 	u32 vdev_id;
4583 	u32 tx_status;
4584 } __packed;
4585 
4586 /*
4587  * PDEV statistics
4588  */
4589 struct wmi_pdev_stats_base {
4590 	s32 chan_nf;
4591 	u32 tx_frame_count; /* Cycles spent transmitting frames */
4592 	u32 rx_frame_count; /* Cycles spent receiving frames */
4593 	u32 rx_clear_count; /* Total channel busy time, evidently */
4594 	u32 cycle_count; /* Total on-channel time */
4595 	u32 phy_err_count;
4596 	u32 chan_tx_pwr;
4597 } __packed;
4598 
4599 struct wmi_pdev_stats_extra {
4600 	u32 ack_rx_bad;
4601 	u32 rts_bad;
4602 	u32 rts_good;
4603 	u32 fcs_bad;
4604 	u32 no_beacons;
4605 	u32 mib_int_count;
4606 } __packed;
4607 
4608 struct wmi_pdev_stats_tx {
4609 	/* Num HTT cookies queued to dispatch list */
4610 	s32 comp_queued;
4611 
4612 	/* Num HTT cookies dispatched */
4613 	s32 comp_delivered;
4614 
4615 	/* Num MSDU queued to WAL */
4616 	s32 msdu_enqued;
4617 
4618 	/* Num MPDU queue to WAL */
4619 	s32 mpdu_enqued;
4620 
4621 	/* Num MSDUs dropped by WMM limit */
4622 	s32 wmm_drop;
4623 
4624 	/* Num Local frames queued */
4625 	s32 local_enqued;
4626 
4627 	/* Num Local frames done */
4628 	s32 local_freed;
4629 
4630 	/* Num queued to HW */
4631 	s32 hw_queued;
4632 
4633 	/* Num PPDU reaped from HW */
4634 	s32 hw_reaped;
4635 
4636 	/* Num underruns */
4637 	s32 underrun;
4638 
4639 	/* Num hw paused */
4640 	u32 hw_paused;
4641 
4642 	/* Num PPDUs cleaned up in TX abort */
4643 	s32 tx_abort;
4644 
4645 	/* Num MPDUs requeued by SW */
4646 	s32 mpdus_requeued;
4647 
4648 	/* excessive retries */
4649 	u32 tx_ko;
4650 
4651 	u32 tx_xretry;
4652 
4653 	/* data hw rate code */
4654 	u32 data_rc;
4655 
4656 	/* Scheduler self triggers */
4657 	u32 self_triggers;
4658 
4659 	/* frames dropped due to excessive sw retries */
4660 	u32 sw_retry_failure;
4661 
4662 	/* illegal rate phy errors  */
4663 	u32 illgl_rate_phy_err;
4664 
4665 	/* wal pdev continuous xretry */
4666 	u32 pdev_cont_xretry;
4667 
4668 	/* wal pdev tx timeouts */
4669 	u32 pdev_tx_timeout;
4670 
4671 	/* wal pdev resets  */
4672 	u32 pdev_resets;
4673 
4674 	/* frames dropped due to non-availability of stateless TIDs */
4675 	u32 stateless_tid_alloc_failure;
4676 
4677 	/* PhY/BB underrun */
4678 	u32 phy_underrun;
4679 
4680 	/* MPDU is more than txop limit */
4681 	u32 txop_ovf;
4682 
4683 	/* Num sequences posted */
4684 	u32 seq_posted;
4685 
4686 	/* Num sequences failed in queueing */
4687 	u32 seq_failed_queueing;
4688 
4689 	/* Num sequences completed */
4690 	u32 seq_completed;
4691 
4692 	/* Num sequences restarted */
4693 	u32 seq_restarted;
4694 
4695 	/* Num of MU sequences posted */
4696 	u32 mu_seq_posted;
4697 
4698 	/* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT
4699 	 * (Reset,channel change)
4700 	 */
4701 	s32 mpdus_sw_flush;
4702 
4703 	/* Num MPDUs filtered by HW, all filter condition (TTL expired) */
4704 	s32 mpdus_hw_filter;
4705 
4706 	/* Num MPDUs truncated by PDG (TXOP, TBTT,
4707 	 * PPDU_duration based on rate, dyn_bw)
4708 	 */
4709 	s32 mpdus_truncated;
4710 
4711 	/* Num MPDUs that was tried but didn't receive ACK or BA */
4712 	s32 mpdus_ack_failed;
4713 
4714 	/* Num MPDUs that was dropped du to expiry. */
4715 	s32 mpdus_expired;
4716 } __packed;
4717 
4718 struct wmi_pdev_stats_rx {
4719 	/* Cnts any change in ring routing mid-ppdu */
4720 	s32 mid_ppdu_route_change;
4721 
4722 	/* Total number of statuses processed */
4723 	s32 status_rcvd;
4724 
4725 	/* Extra frags on rings 0-3 */
4726 	s32 r0_frags;
4727 	s32 r1_frags;
4728 	s32 r2_frags;
4729 	s32 r3_frags;
4730 
4731 	/* MSDUs / MPDUs delivered to HTT */
4732 	s32 htt_msdus;
4733 	s32 htt_mpdus;
4734 
4735 	/* MSDUs / MPDUs delivered to local stack */
4736 	s32 loc_msdus;
4737 	s32 loc_mpdus;
4738 
4739 	/* AMSDUs that have more MSDUs than the status ring size */
4740 	s32 oversize_amsdu;
4741 
4742 	/* Number of PHY errors */
4743 	s32 phy_errs;
4744 
4745 	/* Number of PHY errors drops */
4746 	s32 phy_err_drop;
4747 
4748 	/* Number of mpdu errors - FCS, MIC, ENC etc. */
4749 	s32 mpdu_errs;
4750 
4751 	/* Num overflow errors */
4752 	s32 rx_ovfl_errs;
4753 } __packed;
4754 
4755 struct wmi_pdev_stats {
4756 	struct wmi_pdev_stats_base base;
4757 	struct wmi_pdev_stats_tx tx;
4758 	struct wmi_pdev_stats_rx rx;
4759 } __packed;
4760 
4761 #define WLAN_MAX_AC 4
4762 #define MAX_TX_RATE_VALUES 10
4763 #define MAX_TX_RATE_VALUES 10
4764 
4765 struct wmi_vdev_stats {
4766 	u32 vdev_id;
4767 	u32 beacon_snr;
4768 	u32 data_snr;
4769 	u32 num_tx_frames[WLAN_MAX_AC];
4770 	u32 num_rx_frames;
4771 	u32 num_tx_frames_retries[WLAN_MAX_AC];
4772 	u32 num_tx_frames_failures[WLAN_MAX_AC];
4773 	u32 num_rts_fail;
4774 	u32 num_rts_success;
4775 	u32 num_rx_err;
4776 	u32 num_rx_discard;
4777 	u32 num_tx_not_acked;
4778 	u32 tx_rate_history[MAX_TX_RATE_VALUES];
4779 	u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
4780 } __packed;
4781 
4782 struct wmi_bcn_stats {
4783 	u32 vdev_id;
4784 	u32 tx_bcn_succ_cnt;
4785 	u32 tx_bcn_outage_cnt;
4786 } __packed;
4787 
4788 struct wmi_stats_event {
4789 	u32 stats_id;
4790 	u32 num_pdev_stats;
4791 	u32 num_vdev_stats;
4792 	u32 num_peer_stats;
4793 	u32 num_bcnflt_stats;
4794 	u32 num_chan_stats;
4795 	u32 num_mib_stats;
4796 	u32 pdev_id;
4797 	u32 num_bcn_stats;
4798 	u32 num_peer_extd_stats;
4799 	u32 num_peer_extd2_stats;
4800 } __packed;
4801 
4802 struct wmi_rssi_stats {
4803 	u32 vdev_id;
4804 	u32 rssi_avg_beacon[WMI_MAX_CHAINS];
4805 	u32 rssi_avg_data[WMI_MAX_CHAINS];
4806 	struct wmi_mac_addr peer_macaddr;
4807 } __packed;
4808 
4809 struct wmi_per_chain_rssi_stats {
4810 	u32 num_per_chain_rssi_stats;
4811 } __packed;
4812 
4813 struct wmi_pdev_ctl_failsafe_chk_event {
4814 	u32 pdev_id;
4815 	u32 ctl_failsafe_status;
4816 } __packed;
4817 
4818 struct wmi_pdev_csa_switch_ev {
4819 	u32 pdev_id;
4820 	u32 current_switch_count;
4821 	u32 num_vdevs;
4822 } __packed;
4823 
4824 struct wmi_pdev_radar_ev {
4825 	u32 pdev_id;
4826 	u32 detection_mode;
4827 	u32 chan_freq;
4828 	u32 chan_width;
4829 	u32 detector_id;
4830 	u32 segment_id;
4831 	u32 timestamp;
4832 	u32 is_chirp;
4833 	s32 freq_offset;
4834 	s32 sidx;
4835 } __packed;
4836 
4837 struct wmi_pdev_temperature_event {
4838 	/* temperature value in Celsius degree */
4839 	s32 temp;
4840 	u32 pdev_id;
4841 } __packed;
4842 
4843 #define WMI_RX_STATUS_OK			0x00
4844 #define WMI_RX_STATUS_ERR_CRC			0x01
4845 #define WMI_RX_STATUS_ERR_DECRYPT		0x08
4846 #define WMI_RX_STATUS_ERR_MIC			0x10
4847 #define WMI_RX_STATUS_ERR_KEY_CACHE_MISS	0x20
4848 
4849 #define WLAN_MGMT_TXRX_HOST_MAX_ANTENNA 4
4850 
4851 struct mgmt_rx_event_params {
4852 	u32 chan_freq;
4853 	u32 channel;
4854 	u32 snr;
4855 	u8 rssi_ctl[WLAN_MGMT_TXRX_HOST_MAX_ANTENNA];
4856 	u32 rate;
4857 	enum wmi_phy_mode phy_mode;
4858 	u32 buf_len;
4859 	int status;
4860 	u32 flags;
4861 	int rssi;
4862 	u32 tsf_delta;
4863 	u8 pdev_id;
4864 };
4865 
4866 #define ATH_MAX_ANTENNA 4
4867 
4868 struct wmi_mgmt_rx_hdr {
4869 	u32 channel;
4870 	u32 snr;
4871 	u32 rate;
4872 	u32 phy_mode;
4873 	u32 buf_len;
4874 	u32 status;
4875 	u32 rssi_ctl[ATH_MAX_ANTENNA];
4876 	u32 flags;
4877 	int rssi;
4878 	u32 tsf_delta;
4879 	u32 rx_tsf_l32;
4880 	u32 rx_tsf_u32;
4881 	u32 pdev_id;
4882 	u32 chan_freq;
4883 } __packed;
4884 
4885 #define MAX_ANTENNA_EIGHT 8
4886 
4887 struct wmi_rssi_ctl_ext {
4888 	u32 tlv_header;
4889 	u32 rssi_ctl_ext[MAX_ANTENNA_EIGHT - ATH_MAX_ANTENNA];
4890 };
4891 
4892 struct wmi_mgmt_tx_compl_event {
4893 	u32 desc_id;
4894 	u32 status;
4895 	u32 pdev_id;
4896 	u32 ppdu_id;
4897 	u32 ack_rssi;
4898 } __packed;
4899 
4900 struct wmi_scan_event {
4901 	u32 event_type; /* %WMI_SCAN_EVENT_ */
4902 	u32 reason; /* %WMI_SCAN_REASON_ */
4903 	u32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */
4904 	u32 scan_req_id;
4905 	u32 scan_id;
4906 	u32 vdev_id;
4907 	/* TSF Timestamp when the scan event (%WMI_SCAN_EVENT_) is completed
4908 	 * In case of AP it is TSF of the AP vdev
4909 	 * In case of STA connected state, this is the TSF of the AP
4910 	 * In case of STA not connected, it will be the free running HW timer
4911 	 */
4912 	u32 tsf_timestamp;
4913 } __packed;
4914 
4915 struct wmi_peer_sta_kickout_arg {
4916 	const u8 *mac_addr;
4917 };
4918 
4919 struct wmi_peer_sta_kickout_event {
4920 	struct wmi_mac_addr peer_macaddr;
4921 } __packed;
4922 
4923 enum wmi_roam_reason {
4924 	WMI_ROAM_REASON_BETTER_AP = 1,
4925 	WMI_ROAM_REASON_BEACON_MISS = 2,
4926 	WMI_ROAM_REASON_LOW_RSSI = 3,
4927 	WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4,
4928 	WMI_ROAM_REASON_HO_FAILED = 5,
4929 
4930 	/* keep last */
4931 	WMI_ROAM_REASON_MAX,
4932 };
4933 
4934 struct wmi_roam_event {
4935 	u32 vdev_id;
4936 	u32 reason;
4937 	u32 rssi;
4938 } __packed;
4939 
4940 #define WMI_CHAN_INFO_START_RESP 0
4941 #define WMI_CHAN_INFO_END_RESP 1
4942 
4943 struct wmi_chan_info_event {
4944 	u32 err_code;
4945 	u32 freq;
4946 	u32 cmd_flags;
4947 	u32 noise_floor;
4948 	u32 rx_clear_count;
4949 	u32 cycle_count;
4950 	u32 chan_tx_pwr_range;
4951 	u32 chan_tx_pwr_tp;
4952 	u32 rx_frame_count;
4953 	u32 my_bss_rx_cycle_count;
4954 	u32 rx_11b_mode_data_duration;
4955 	u32 tx_frame_cnt;
4956 	u32 mac_clk_mhz;
4957 	u32 vdev_id;
4958 } __packed;
4959 
4960 struct ath11k_targ_cap {
4961 	u32 phy_capability;
4962 	u32 max_frag_entry;
4963 	u32 num_rf_chains;
4964 	u32 ht_cap_info;
4965 	u32 vht_cap_info;
4966 	u32 vht_supp_mcs;
4967 	u32 hw_min_tx_power;
4968 	u32 hw_max_tx_power;
4969 	u32 sys_cap_info;
4970 	u32 min_pkt_size_enable;
4971 	u32 max_bcn_ie_size;
4972 	u32 max_num_scan_channels;
4973 	u32 max_supported_macs;
4974 	u32 wmi_fw_sub_feat_caps;
4975 	u32 txrx_chainmask;
4976 	u32 default_dbs_hw_mode_index;
4977 	u32 num_msdu_desc;
4978 };
4979 
4980 enum wmi_vdev_type {
4981 	WMI_VDEV_TYPE_AP      = 1,
4982 	WMI_VDEV_TYPE_STA     = 2,
4983 	WMI_VDEV_TYPE_IBSS    = 3,
4984 	WMI_VDEV_TYPE_MONITOR = 4,
4985 };
4986 
4987 enum wmi_vdev_subtype {
4988 	WMI_VDEV_SUBTYPE_NONE,
4989 	WMI_VDEV_SUBTYPE_P2P_DEVICE,
4990 	WMI_VDEV_SUBTYPE_P2P_CLIENT,
4991 	WMI_VDEV_SUBTYPE_P2P_GO,
4992 	WMI_VDEV_SUBTYPE_PROXY_STA,
4993 	WMI_VDEV_SUBTYPE_MESH_NON_11S,
4994 	WMI_VDEV_SUBTYPE_MESH_11S,
4995 };
4996 
4997 enum wmi_sta_powersave_param {
4998 	WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0,
4999 	WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1,
5000 	WMI_STA_PS_PARAM_PSPOLL_COUNT = 2,
5001 	WMI_STA_PS_PARAM_INACTIVITY_TIME = 3,
5002 	WMI_STA_PS_PARAM_UAPSD = 4,
5003 };
5004 
5005 #define WMI_UAPSD_AC_TYPE_DELI 0
5006 #define WMI_UAPSD_AC_TYPE_TRIG 1
5007 
5008 #define WMI_UAPSD_AC_BIT_MASK(ac, type) \
5009 	((type ==  WMI_UAPSD_AC_TYPE_DELI) ? \
5010 	 (1 << (ac << 1)) : (1 << ((ac << 1) + 1)))
5011 
5012 enum wmi_sta_ps_param_uapsd {
5013 	WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
5014 	WMI_STA_PS_UAPSD_AC0_TRIGGER_EN  = (1 << 1),
5015 	WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
5016 	WMI_STA_PS_UAPSD_AC1_TRIGGER_EN  = (1 << 3),
5017 	WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
5018 	WMI_STA_PS_UAPSD_AC2_TRIGGER_EN  = (1 << 5),
5019 	WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
5020 	WMI_STA_PS_UAPSD_AC3_TRIGGER_EN  = (1 << 7),
5021 };
5022 
5023 #define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX
5024 
5025 struct wmi_sta_uapsd_auto_trig_param {
5026 	u32 wmm_ac;
5027 	u32 user_priority;
5028 	u32 service_interval;
5029 	u32 suspend_interval;
5030 	u32 delay_interval;
5031 };
5032 
5033 struct wmi_sta_uapsd_auto_trig_cmd_fixed_param {
5034 	u32 vdev_id;
5035 	struct wmi_mac_addr peer_macaddr;
5036 	u32 num_ac;
5037 };
5038 
5039 struct wmi_sta_uapsd_auto_trig_arg {
5040 	u32 wmm_ac;
5041 	u32 user_priority;
5042 	u32 service_interval;
5043 	u32 suspend_interval;
5044 	u32 delay_interval;
5045 };
5046 
5047 enum wmi_sta_ps_param_tx_wake_threshold {
5048 	WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0,
5049 	WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1,
5050 
5051 	/* Values greater than one indicate that many TX attempts per beacon
5052 	 * interval before the STA will wake up
5053 	 */
5054 };
5055 
5056 /* The maximum number of PS-Poll frames the FW will send in response to
5057  * traffic advertised in TIM before waking up (by sending a null frame with PS
5058  * = 0). Value 0 has a special meaning: there is no maximum count and the FW
5059  * will send as many PS-Poll as are necessary to retrieve buffered BU. This
5060  * parameter is used when the RX wake policy is
5061  * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake
5062  * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE.
5063  */
5064 enum wmi_sta_ps_param_pspoll_count {
5065 	WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0,
5066 	/* Values greater than 0 indicate the maximum number of PS-Poll frames
5067 	 * FW will send before waking up.
5068 	 */
5069 };
5070 
5071 /* U-APSD configuration of peer station from (re)assoc request and TSPECs */
5072 enum wmi_ap_ps_param_uapsd {
5073 	WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
5074 	WMI_AP_PS_UAPSD_AC0_TRIGGER_EN  = (1 << 1),
5075 	WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
5076 	WMI_AP_PS_UAPSD_AC1_TRIGGER_EN  = (1 << 3),
5077 	WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
5078 	WMI_AP_PS_UAPSD_AC2_TRIGGER_EN  = (1 << 5),
5079 	WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
5080 	WMI_AP_PS_UAPSD_AC3_TRIGGER_EN  = (1 << 7),
5081 };
5082 
5083 /* U-APSD maximum service period of peer station */
5084 enum wmi_ap_ps_peer_param_max_sp {
5085 	WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0,
5086 	WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1,
5087 	WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2,
5088 	WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3,
5089 	MAX_WMI_AP_PS_PEER_PARAM_MAX_SP,
5090 };
5091 
5092 enum wmi_ap_ps_peer_param {
5093 	/** Set uapsd configuration for a given peer.
5094 	 *
5095 	 * This include the delivery and trigger enabled state for each AC.
5096 	 * The host MLME needs to set this based on AP capability and stations
5097 	 * request Set in the association request  received from the station.
5098 	 *
5099 	 * Lower 8 bits of the value specify the UAPSD configuration.
5100 	 *
5101 	 * (see enum wmi_ap_ps_param_uapsd)
5102 	 * The default value is 0.
5103 	 */
5104 	WMI_AP_PS_PEER_PARAM_UAPSD = 0,
5105 
5106 	/**
5107 	 * Set the service period for a UAPSD capable station
5108 	 *
5109 	 * The service period from wme ie in the (re)assoc request frame.
5110 	 *
5111 	 * (see enum wmi_ap_ps_peer_param_max_sp)
5112 	 */
5113 	WMI_AP_PS_PEER_PARAM_MAX_SP = 1,
5114 
5115 	/** Time in seconds for aging out buffered frames
5116 	 * for STA in power save
5117 	 */
5118 	WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2,
5119 
5120 	/** Specify frame types that are considered SIFS
5121 	 * RESP trigger frame
5122 	 */
5123 	WMI_AP_PS_PEER_PARAM_SIFS_RESP_FRMTYPE = 3,
5124 
5125 	/** Specifies the trigger state of TID.
5126 	 * Valid only for UAPSD frame type
5127 	 */
5128 	WMI_AP_PS_PEER_PARAM_SIFS_RESP_UAPSD = 4,
5129 
5130 	/* Specifies the WNM sleep state of a STA */
5131 	WMI_AP_PS_PEER_PARAM_WNM_SLEEP = 5,
5132 };
5133 
5134 #define DISABLE_SIFS_RESPONSE_TRIGGER 0
5135 
5136 #define WMI_MAX_KEY_INDEX   3
5137 #define WMI_MAX_KEY_LEN     32
5138 
5139 #define WMI_KEY_PAIRWISE 0x00
5140 #define WMI_KEY_GROUP    0x01
5141 
5142 #define WMI_CIPHER_NONE     0x0 /* clear key */
5143 #define WMI_CIPHER_WEP      0x1
5144 #define WMI_CIPHER_TKIP     0x2
5145 #define WMI_CIPHER_AES_OCB  0x3
5146 #define WMI_CIPHER_AES_CCM  0x4
5147 #define WMI_CIPHER_WAPI     0x5
5148 #define WMI_CIPHER_CKIP     0x6
5149 #define WMI_CIPHER_AES_CMAC 0x7
5150 #define WMI_CIPHER_ANY      0x8
5151 #define WMI_CIPHER_AES_GCM  0x9
5152 #define WMI_CIPHER_AES_GMAC 0xa
5153 
5154 /* Value to disable fixed rate setting */
5155 #define WMI_FIXED_RATE_NONE	(0xffff)
5156 
5157 #define ATH11K_RC_VERSION_OFFSET	28
5158 #define ATH11K_RC_PREAMBLE_OFFSET	8
5159 #define ATH11K_RC_NSS_OFFSET		5
5160 
5161 #define ATH11K_HW_RATE_CODE(rate, nss, preamble)	\
5162 	((1 << ATH11K_RC_VERSION_OFFSET) |		\
5163 	 ((nss) << ATH11K_RC_NSS_OFFSET) |		\
5164 	 ((preamble) << ATH11K_RC_PREAMBLE_OFFSET) |	\
5165 	 (rate))
5166 
5167 /* Preamble types to be used with VDEV fixed rate configuration */
5168 enum wmi_rate_preamble {
5169 	WMI_RATE_PREAMBLE_OFDM,
5170 	WMI_RATE_PREAMBLE_CCK,
5171 	WMI_RATE_PREAMBLE_HT,
5172 	WMI_RATE_PREAMBLE_VHT,
5173 	WMI_RATE_PREAMBLE_HE,
5174 };
5175 
5176 /**
5177  * enum wmi_rtscts_prot_mode - Enable/Disable RTS/CTS and CTS2Self Protection.
5178  * @WMI_RTS_CTS_DISABLED: RTS/CTS protection is disabled.
5179  * @WMI_USE_RTS_CTS: RTS/CTS Enabled.
5180  * @WMI_USE_CTS2SELF: CTS to self protection Enabled.
5181  */
5182 enum wmi_rtscts_prot_mode {
5183 	WMI_RTS_CTS_DISABLED = 0,
5184 	WMI_USE_RTS_CTS = 1,
5185 	WMI_USE_CTS2SELF = 2,
5186 };
5187 
5188 /**
5189  * enum wmi_rtscts_profile - Selection of RTS CTS profile along with enabling
5190  *                           protection mode.
5191  * @WMI_RTSCTS_FOR_NO_RATESERIES: Neither of rate-series should use RTS-CTS
5192  * @WMI_RTSCTS_FOR_SECOND_RATESERIES: Only second rate-series will use RTS-CTS
5193  * @WMI_RTSCTS_ACROSS_SW_RETRIES: Only the second rate-series will use RTS-CTS,
5194  *                                but if there's a sw retry, both the rate
5195  *                                series will use RTS-CTS.
5196  * @WMI_RTSCTS_ERP: RTS/CTS used for ERP protection for every PPDU.
5197  * @WMI_RTSCTS_FOR_ALL_RATESERIES: Enable RTS-CTS for all rate series.
5198  */
5199 enum wmi_rtscts_profile {
5200 	WMI_RTSCTS_FOR_NO_RATESERIES = 0,
5201 	WMI_RTSCTS_FOR_SECOND_RATESERIES = 1,
5202 	WMI_RTSCTS_ACROSS_SW_RETRIES = 2,
5203 	WMI_RTSCTS_ERP = 3,
5204 	WMI_RTSCTS_FOR_ALL_RATESERIES = 4,
5205 };
5206 
5207 struct ath11k_hal_reg_cap {
5208 	u32 eeprom_rd;
5209 	u32 eeprom_rd_ext;
5210 	u32 regcap1;
5211 	u32 regcap2;
5212 	u32 wireless_modes;
5213 	u32 low_2ghz_chan;
5214 	u32 high_2ghz_chan;
5215 	u32 low_5ghz_chan;
5216 	u32 high_5ghz_chan;
5217 };
5218 
5219 struct ath11k_mem_chunk {
5220 	void *vaddr;
5221 	dma_addr_t paddr;
5222 	u32 len;
5223 	u32 req_id;
5224 };
5225 
5226 #define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr)
5227 
5228 enum wmi_sta_ps_param_rx_wake_policy {
5229 	WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0,
5230 	WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1,
5231 };
5232 
5233 /* Do not change existing values! Used by ath11k_frame_mode parameter
5234  * module parameter.
5235  */
5236 enum ath11k_hw_txrx_mode {
5237 	ATH11K_HW_TXRX_RAW = 0,
5238 	ATH11K_HW_TXRX_NATIVE_WIFI = 1,
5239 	ATH11K_HW_TXRX_ETHERNET = 2,
5240 };
5241 
5242 struct wmi_wmm_params {
5243 	u32 tlv_header;
5244 	u32 cwmin;
5245 	u32 cwmax;
5246 	u32 aifs;
5247 	u32 txoplimit;
5248 	u32 acm;
5249 	u32 no_ack;
5250 } __packed;
5251 
5252 struct wmi_wmm_params_arg {
5253 	u8 acm;
5254 	u8 aifs;
5255 	u16 cwmin;
5256 	u16 cwmax;
5257 	u16 txop;
5258 	u8 no_ack;
5259 };
5260 
5261 struct wmi_vdev_set_wmm_params_cmd {
5262 	u32 tlv_header;
5263 	u32 vdev_id;
5264 	struct wmi_wmm_params wmm_params[4];
5265 	u32 wmm_param_type;
5266 } __packed;
5267 
5268 struct wmi_wmm_params_all_arg {
5269 	struct wmi_wmm_params_arg ac_be;
5270 	struct wmi_wmm_params_arg ac_bk;
5271 	struct wmi_wmm_params_arg ac_vi;
5272 	struct wmi_wmm_params_arg ac_vo;
5273 };
5274 
5275 #define ATH11K_TWT_DEF_STA_CONG_TIMER_MS		5000
5276 #define ATH11K_TWT_DEF_DEFAULT_SLOT_SIZE		10
5277 #define ATH11K_TWT_DEF_CONGESTION_THRESH_SETUP		50
5278 #define ATH11K_TWT_DEF_CONGESTION_THRESH_TEARDOWN	20
5279 #define ATH11K_TWT_DEF_CONGESTION_THRESH_CRITICAL	100
5280 #define ATH11K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN	80
5281 #define ATH11K_TWT_DEF_INTERFERENCE_THRESH_SETUP	50
5282 #define ATH11K_TWT_DEF_MIN_NO_STA_SETUP			10
5283 #define ATH11K_TWT_DEF_MIN_NO_STA_TEARDOWN		2
5284 #define ATH11K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS		2
5285 #define ATH11K_TWT_DEF_MIN_NO_TWT_SLOTS			2
5286 #define ATH11K_TWT_DEF_MAX_NO_STA_TWT			500
5287 #define ATH11K_TWT_DEF_MODE_CHECK_INTERVAL		10000
5288 #define ATH11K_TWT_DEF_ADD_STA_SLOT_INTERVAL		1000
5289 #define ATH11K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL		5000
5290 
5291 struct wmi_twt_enable_params {
5292 	u32 sta_cong_timer_ms;
5293 	u32 mbss_support;
5294 	u32 default_slot_size;
5295 	u32 congestion_thresh_setup;
5296 	u32 congestion_thresh_teardown;
5297 	u32 congestion_thresh_critical;
5298 	u32 interference_thresh_teardown;
5299 	u32 interference_thresh_setup;
5300 	u32 min_no_sta_setup;
5301 	u32 min_no_sta_teardown;
5302 	u32 no_of_bcast_mcast_slots;
5303 	u32 min_no_twt_slots;
5304 	u32 max_no_sta_twt;
5305 	u32 mode_check_interval;
5306 	u32 add_sta_slot_interval;
5307 	u32 remove_sta_slot_interval;
5308 };
5309 
5310 struct wmi_twt_enable_params_cmd {
5311 	u32 tlv_header;
5312 	u32 pdev_id;
5313 	u32 sta_cong_timer_ms;
5314 	u32 mbss_support;
5315 	u32 default_slot_size;
5316 	u32 congestion_thresh_setup;
5317 	u32 congestion_thresh_teardown;
5318 	u32 congestion_thresh_critical;
5319 	u32 interference_thresh_teardown;
5320 	u32 interference_thresh_setup;
5321 	u32 min_no_sta_setup;
5322 	u32 min_no_sta_teardown;
5323 	u32 no_of_bcast_mcast_slots;
5324 	u32 min_no_twt_slots;
5325 	u32 max_no_sta_twt;
5326 	u32 mode_check_interval;
5327 	u32 add_sta_slot_interval;
5328 	u32 remove_sta_slot_interval;
5329 } __packed;
5330 
5331 struct wmi_twt_disable_params_cmd {
5332 	u32 tlv_header;
5333 	u32 pdev_id;
5334 } __packed;
5335 
5336 enum WMI_HOST_TWT_COMMAND {
5337 	WMI_HOST_TWT_COMMAND_REQUEST_TWT = 0,
5338 	WMI_HOST_TWT_COMMAND_SUGGEST_TWT,
5339 	WMI_HOST_TWT_COMMAND_DEMAND_TWT,
5340 	WMI_HOST_TWT_COMMAND_TWT_GROUPING,
5341 	WMI_HOST_TWT_COMMAND_ACCEPT_TWT,
5342 	WMI_HOST_TWT_COMMAND_ALTERNATE_TWT,
5343 	WMI_HOST_TWT_COMMAND_DICTATE_TWT,
5344 	WMI_HOST_TWT_COMMAND_REJECT_TWT,
5345 };
5346 
5347 #define WMI_TWT_ADD_DIALOG_FLAG_BCAST           BIT(8)
5348 #define WMI_TWT_ADD_DIALOG_FLAG_TRIGGER         BIT(9)
5349 #define WMI_TWT_ADD_DIALOG_FLAG_FLOW_TYPE       BIT(10)
5350 #define WMI_TWT_ADD_DIALOG_FLAG_PROTECTION      BIT(11)
5351 
5352 struct wmi_twt_add_dialog_params_cmd {
5353 	u32 tlv_header;
5354 	u32 vdev_id;
5355 	struct wmi_mac_addr peer_macaddr;
5356 	u32 dialog_id;
5357 	u32 wake_intvl_us;
5358 	u32 wake_intvl_mantis;
5359 	u32 wake_dura_us;
5360 	u32 sp_offset_us;
5361 	u32 flags;
5362 } __packed;
5363 
5364 struct wmi_twt_add_dialog_params {
5365 	u32 vdev_id;
5366 	u8 peer_macaddr[ETH_ALEN];
5367 	u32 dialog_id;
5368 	u32 wake_intvl_us;
5369 	u32 wake_intvl_mantis;
5370 	u32 wake_dura_us;
5371 	u32 sp_offset_us;
5372 	u8 twt_cmd;
5373 	u8 flag_bcast;
5374 	u8 flag_trigger;
5375 	u8 flag_flow_type;
5376 	u8 flag_protection;
5377 } __packed;
5378 
5379 enum  wmi_twt_add_dialog_status {
5380 	WMI_ADD_TWT_STATUS_OK,
5381 	WMI_ADD_TWT_STATUS_TWT_NOT_ENABLED,
5382 	WMI_ADD_TWT_STATUS_USED_DIALOG_ID,
5383 	WMI_ADD_TWT_STATUS_INVALID_PARAM,
5384 	WMI_ADD_TWT_STATUS_NOT_READY,
5385 	WMI_ADD_TWT_STATUS_NO_RESOURCE,
5386 	WMI_ADD_TWT_STATUS_NO_ACK,
5387 	WMI_ADD_TWT_STATUS_NO_RESPONSE,
5388 	WMI_ADD_TWT_STATUS_DENIED,
5389 	WMI_ADD_TWT_STATUS_UNKNOWN_ERROR,
5390 };
5391 
5392 struct wmi_twt_add_dialog_event {
5393 	u32 vdev_id;
5394 	struct wmi_mac_addr peer_macaddr;
5395 	u32 dialog_id;
5396 	u32 status;
5397 } __packed;
5398 
5399 struct wmi_twt_del_dialog_params {
5400 	u32 vdev_id;
5401 	u8 peer_macaddr[ETH_ALEN];
5402 	u32 dialog_id;
5403 } __packed;
5404 
5405 struct wmi_twt_del_dialog_params_cmd {
5406 	u32 tlv_header;
5407 	u32 vdev_id;
5408 	struct wmi_mac_addr peer_macaddr;
5409 	u32 dialog_id;
5410 } __packed;
5411 
5412 struct wmi_twt_pause_dialog_params {
5413 	u32 vdev_id;
5414 	u8 peer_macaddr[ETH_ALEN];
5415 	u32 dialog_id;
5416 } __packed;
5417 
5418 struct wmi_twt_pause_dialog_params_cmd {
5419 	u32 tlv_header;
5420 	u32 vdev_id;
5421 	struct wmi_mac_addr peer_macaddr;
5422 	u32 dialog_id;
5423 } __packed;
5424 
5425 struct wmi_twt_resume_dialog_params {
5426 	u32 vdev_id;
5427 	u8 peer_macaddr[ETH_ALEN];
5428 	u32 dialog_id;
5429 	u32 sp_offset_us;
5430 	u32 next_twt_size;
5431 } __packed;
5432 
5433 struct wmi_twt_resume_dialog_params_cmd {
5434 	u32 tlv_header;
5435 	u32 vdev_id;
5436 	struct wmi_mac_addr peer_macaddr;
5437 	u32 dialog_id;
5438 	u32 sp_offset_us;
5439 	u32 next_twt_size;
5440 } __packed;
5441 
5442 struct wmi_obss_spatial_reuse_params_cmd {
5443 	u32 tlv_header;
5444 	u32 pdev_id;
5445 	u32 enable;
5446 	s32 obss_min;
5447 	s32 obss_max;
5448 	u32 vdev_id;
5449 } __packed;
5450 
5451 struct wmi_pdev_obss_pd_bitmap_cmd {
5452 	u32 tlv_header;
5453 	u32 pdev_id;
5454 	u32 bitmap[2];
5455 } __packed;
5456 
5457 #define ATH11K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS		200
5458 #define ATH11K_OBSS_COLOR_COLLISION_DETECTION_DISABLE		0
5459 #define ATH11K_OBSS_COLOR_COLLISION_DETECTION			1
5460 
5461 #define ATH11K_BSS_COLOR_COLLISION_DETECTION_STA_PERIOD_MS	10000
5462 #define ATH11K_BSS_COLOR_COLLISION_DETECTION_AP_PERIOD_MS	5000
5463 
5464 enum wmi_bss_color_collision {
5465 	WMI_BSS_COLOR_COLLISION_DISABLE = 0,
5466 	WMI_BSS_COLOR_COLLISION_DETECTION,
5467 	WMI_BSS_COLOR_FREE_SLOT_TIMER_EXPIRY,
5468 	WMI_BSS_COLOR_FREE_SLOT_AVAILABLE,
5469 };
5470 
5471 struct wmi_obss_color_collision_cfg_params_cmd {
5472 	u32 tlv_header;
5473 	u32 vdev_id;
5474 	u32 flags;
5475 	u32 evt_type;
5476 	u32 current_bss_color;
5477 	u32 detection_period_ms;
5478 	u32 scan_period_ms;
5479 	u32 free_slot_expiry_time_ms;
5480 } __packed;
5481 
5482 struct wmi_bss_color_change_enable_params_cmd {
5483 	u32 tlv_header;
5484 	u32 vdev_id;
5485 	u32 enable;
5486 } __packed;
5487 
5488 struct wmi_obss_color_collision_event {
5489 	u32 vdev_id;
5490 	u32 evt_type;
5491 	u64 obss_color_bitmap;
5492 } __packed;
5493 
5494 #define ATH11K_IPV4_TH_SEED_SIZE 5
5495 #define ATH11K_IPV6_TH_SEED_SIZE 11
5496 
5497 struct ath11k_wmi_pdev_lro_config_cmd {
5498 	u32 tlv_header;
5499 	u32 lro_enable;
5500 	u32 res;
5501 	u32 th_4[ATH11K_IPV4_TH_SEED_SIZE];
5502 	u32 th_6[ATH11K_IPV6_TH_SEED_SIZE];
5503 	u32 pdev_id;
5504 } __packed;
5505 
5506 #define ATH11K_WMI_SPECTRAL_COUNT_DEFAULT                 0
5507 #define ATH11K_WMI_SPECTRAL_PERIOD_DEFAULT              224
5508 #define ATH11K_WMI_SPECTRAL_PRIORITY_DEFAULT              1
5509 #define ATH11K_WMI_SPECTRAL_FFT_SIZE_DEFAULT              7
5510 #define ATH11K_WMI_SPECTRAL_GC_ENA_DEFAULT                1
5511 #define ATH11K_WMI_SPECTRAL_RESTART_ENA_DEFAULT           0
5512 #define ATH11K_WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT     -96
5513 #define ATH11K_WMI_SPECTRAL_INIT_DELAY_DEFAULT           80
5514 #define ATH11K_WMI_SPECTRAL_NB_TONE_THR_DEFAULT          12
5515 #define ATH11K_WMI_SPECTRAL_STR_BIN_THR_DEFAULT           8
5516 #define ATH11K_WMI_SPECTRAL_WB_RPT_MODE_DEFAULT           0
5517 #define ATH11K_WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT         0
5518 #define ATH11K_WMI_SPECTRAL_RSSI_THR_DEFAULT           0xf0
5519 #define ATH11K_WMI_SPECTRAL_PWR_FORMAT_DEFAULT            0
5520 #define ATH11K_WMI_SPECTRAL_RPT_MODE_DEFAULT              2
5521 #define ATH11K_WMI_SPECTRAL_BIN_SCALE_DEFAULT             1
5522 #define ATH11K_WMI_SPECTRAL_DBM_ADJ_DEFAULT               1
5523 #define ATH11K_WMI_SPECTRAL_CHN_MASK_DEFAULT              1
5524 
5525 struct ath11k_wmi_vdev_spectral_conf_param {
5526 	u32 vdev_id;
5527 	u32 scan_count;
5528 	u32 scan_period;
5529 	u32 scan_priority;
5530 	u32 scan_fft_size;
5531 	u32 scan_gc_ena;
5532 	u32 scan_restart_ena;
5533 	u32 scan_noise_floor_ref;
5534 	u32 scan_init_delay;
5535 	u32 scan_nb_tone_thr;
5536 	u32 scan_str_bin_thr;
5537 	u32 scan_wb_rpt_mode;
5538 	u32 scan_rssi_rpt_mode;
5539 	u32 scan_rssi_thr;
5540 	u32 scan_pwr_format;
5541 	u32 scan_rpt_mode;
5542 	u32 scan_bin_scale;
5543 	u32 scan_dbm_adj;
5544 	u32 scan_chn_mask;
5545 } __packed;
5546 
5547 struct ath11k_wmi_vdev_spectral_conf_cmd {
5548 	u32 tlv_header;
5549 	struct ath11k_wmi_vdev_spectral_conf_param param;
5550 } __packed;
5551 
5552 #define ATH11K_WMI_SPECTRAL_TRIGGER_CMD_TRIGGER  1
5553 #define ATH11K_WMI_SPECTRAL_TRIGGER_CMD_CLEAR    2
5554 #define ATH11K_WMI_SPECTRAL_ENABLE_CMD_ENABLE    1
5555 #define ATH11K_WMI_SPECTRAL_ENABLE_CMD_DISABLE   2
5556 
5557 struct ath11k_wmi_vdev_spectral_enable_cmd {
5558 	u32 tlv_header;
5559 	u32 vdev_id;
5560 	u32 trigger_cmd;
5561 	u32 enable_cmd;
5562 } __packed;
5563 
5564 struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd {
5565 	u32 tlv_header;
5566 	u32 pdev_id;
5567 	u32 module_id;		/* see enum wmi_direct_buffer_module */
5568 	u32 base_paddr_lo;
5569 	u32 base_paddr_hi;
5570 	u32 head_idx_paddr_lo;
5571 	u32 head_idx_paddr_hi;
5572 	u32 tail_idx_paddr_lo;
5573 	u32 tail_idx_paddr_hi;
5574 	u32 num_elems;		/* Number of elems in the ring */
5575 	u32 buf_size;		/* size of allocated buffer in bytes */
5576 
5577 	/* Number of wmi_dma_buf_release_entry packed together */
5578 	u32 num_resp_per_event;
5579 
5580 	/* Target should timeout and send whatever resp
5581 	 * it has if this time expires, units in milliseconds
5582 	 */
5583 	u32 event_timeout_ms;
5584 } __packed;
5585 
5586 struct ath11k_wmi_dma_buf_release_fixed_param {
5587 	u32 pdev_id;
5588 	u32 module_id;
5589 	u32 num_buf_release_entry;
5590 	u32 num_meta_data_entry;
5591 } __packed;
5592 
5593 struct wmi_dma_buf_release_entry {
5594 	u32 tlv_header;
5595 	u32 paddr_lo;
5596 
5597 	/* Bits 11:0:   address of data
5598 	 * Bits 31:12:  host context data
5599 	 */
5600 	u32 paddr_hi;
5601 } __packed;
5602 
5603 #define WMI_SPECTRAL_META_INFO1_FREQ1		GENMASK(15, 0)
5604 #define WMI_SPECTRAL_META_INFO1_FREQ2		GENMASK(31, 16)
5605 
5606 #define WMI_SPECTRAL_META_INFO2_CHN_WIDTH	GENMASK(7, 0)
5607 
5608 struct wmi_dma_buf_release_meta_data {
5609 	u32 tlv_header;
5610 	s32 noise_floor[WMI_MAX_CHAINS];
5611 	u32 reset_delay;
5612 	u32 freq1;
5613 	u32 freq2;
5614 	u32 ch_width;
5615 } __packed;
5616 
5617 enum wmi_fils_discovery_cmd_type {
5618 	WMI_FILS_DISCOVERY_CMD,
5619 	WMI_UNSOL_BCAST_PROBE_RESP,
5620 };
5621 
5622 struct wmi_fils_discovery_cmd {
5623 	u32 tlv_header;
5624 	u32 vdev_id;
5625 	u32 interval;
5626 	u32 config; /* enum wmi_fils_discovery_cmd_type */
5627 } __packed;
5628 
5629 struct wmi_fils_discovery_tmpl_cmd {
5630 	u32 tlv_header;
5631 	u32 vdev_id;
5632 	u32 buf_len;
5633 } __packed;
5634 
5635 struct wmi_probe_tmpl_cmd {
5636 	u32 tlv_header;
5637 	u32 vdev_id;
5638 	u32 buf_len;
5639 } __packed;
5640 
5641 struct target_resource_config {
5642 	u32 num_vdevs;
5643 	u32 num_peers;
5644 	u32 num_active_peers;
5645 	u32 num_offload_peers;
5646 	u32 num_offload_reorder_buffs;
5647 	u32 num_peer_keys;
5648 	u32 num_tids;
5649 	u32 ast_skid_limit;
5650 	u32 tx_chain_mask;
5651 	u32 rx_chain_mask;
5652 	u32 rx_timeout_pri[4];
5653 	u32 rx_decap_mode;
5654 	u32 scan_max_pending_req;
5655 	u32 bmiss_offload_max_vdev;
5656 	u32 roam_offload_max_vdev;
5657 	u32 roam_offload_max_ap_profiles;
5658 	u32 num_mcast_groups;
5659 	u32 num_mcast_table_elems;
5660 	u32 mcast2ucast_mode;
5661 	u32 tx_dbg_log_size;
5662 	u32 num_wds_entries;
5663 	u32 dma_burst_size;
5664 	u32 mac_aggr_delim;
5665 	u32 rx_skip_defrag_timeout_dup_detection_check;
5666 	u32 vow_config;
5667 	u32 gtk_offload_max_vdev;
5668 	u32 num_msdu_desc;
5669 	u32 max_frag_entries;
5670 	u32 max_peer_ext_stats;
5671 	u32 smart_ant_cap;
5672 	u32 bk_minfree;
5673 	u32 be_minfree;
5674 	u32 vi_minfree;
5675 	u32 vo_minfree;
5676 	u32 rx_batchmode;
5677 	u32 tt_support;
5678 	u32 flag1;
5679 	u32 iphdr_pad_config;
5680 	u32 qwrap_config:16,
5681 	    alloc_frag_desc_for_data_pkt:16;
5682 	u32 num_tdls_vdevs;
5683 	u32 num_tdls_conn_table_entries;
5684 	u32 beacon_tx_offload_max_vdev;
5685 	u32 num_multicast_filter_entries;
5686 	u32 num_wow_filters;
5687 	u32 num_keep_alive_pattern;
5688 	u32 keep_alive_pattern_size;
5689 	u32 max_tdls_concurrent_sleep_sta;
5690 	u32 max_tdls_concurrent_buffer_sta;
5691 	u32 wmi_send_separate;
5692 	u32 num_ocb_vdevs;
5693 	u32 num_ocb_channels;
5694 	u32 num_ocb_schedules;
5695 	u32 num_ns_ext_tuples_cfg;
5696 	u32 bpf_instruction_size;
5697 	u32 max_bssid_rx_filters;
5698 	u32 use_pdev_id;
5699 	u32 peer_map_unmap_v2_support;
5700 	u32 sched_params;
5701 	u32 twt_ap_pdev_count;
5702 	u32 twt_ap_sta_count;
5703 	u8 is_reg_cc_ext_event_supported;
5704 	u32 ema_max_vap_cnt;
5705 	u32 ema_max_profile_period;
5706 };
5707 
5708 enum wmi_debug_log_param {
5709 	WMI_DEBUG_LOG_PARAM_LOG_LEVEL = 0x1,
5710 	WMI_DEBUG_LOG_PARAM_VDEV_ENABLE,
5711 	WMI_DEBUG_LOG_PARAM_VDEV_DISABLE,
5712 	WMI_DEBUG_LOG_PARAM_VDEV_ENABLE_BITMAP,
5713 	WMI_DEBUG_LOG_PARAM_MOD_ENABLE_BITMAP,
5714 	WMI_DEBUG_LOG_PARAM_WOW_MOD_ENABLE_BITMAP,
5715 };
5716 
5717 struct wmi_debug_log_config_cmd_fixed_param {
5718 	u32 tlv_header;
5719 	u32 dbg_log_param;
5720 	u32 value;
5721 } __packed;
5722 
5723 #define WMI_MAX_MEM_REQS 32
5724 
5725 #define MAX_RADIOS 3
5726 
5727 #define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ)
5728 #define WMI_SEND_TIMEOUT_HZ (3 * HZ)
5729 
5730 enum ath11k_wmi_peer_ps_state {
5731 	WMI_PEER_PS_STATE_OFF,
5732 	WMI_PEER_PS_STATE_ON,
5733 	WMI_PEER_PS_STATE_DISABLED,
5734 };
5735 
5736 enum wmi_peer_ps_supported_bitmap {
5737 	/* Used to indicate that power save state change is valid */
5738 	WMI_PEER_PS_VALID = 0x1,
5739 	WMI_PEER_PS_STATE_TIMESTAMP = 0x2,
5740 };
5741 
5742 struct wmi_peer_sta_ps_state_chg_event {
5743 	struct wmi_mac_addr peer_macaddr;
5744 	u32 peer_ps_state;
5745 	u32 ps_supported_bitmap;
5746 	u32 peer_ps_valid;
5747 	u32 peer_ps_timestamp;
5748 } __packed;
5749 
5750 struct ath11k_wmi_base {
5751 	struct ath11k_base *ab;
5752 	struct ath11k_pdev_wmi wmi[MAX_RADIOS];
5753 	enum ath11k_htc_ep_id wmi_endpoint_id[MAX_RADIOS];
5754 	u32 max_msg_len[MAX_RADIOS];
5755 
5756 	struct completion service_ready;
5757 	struct completion unified_ready;
5758 	DECLARE_BITMAP(svc_map, WMI_MAX_EXT2_SERVICE);
5759 	wait_queue_head_t tx_credits_wq;
5760 	const struct wmi_peer_flags_map *peer_flags;
5761 	u32 num_mem_chunks;
5762 	u32 rx_decap_mode;
5763 	struct wmi_host_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];
5764 
5765 	enum wmi_host_hw_mode_config_type preferred_hw_mode;
5766 	struct target_resource_config  wlan_resource_config;
5767 
5768 	struct ath11k_targ_cap *targ_cap;
5769 };
5770 
5771 /* Definition of HW data filtering */
5772 enum hw_data_filter_type {
5773 	WMI_HW_DATA_FILTER_DROP_NON_ARP_BC = BIT(0),
5774 	WMI_HW_DATA_FILTER_DROP_NON_ICMPV6_MC = BIT(1),
5775 };
5776 
5777 struct wmi_hw_data_filter_cmd {
5778 	u32 tlv_header;
5779 	u32 vdev_id;
5780 	u32 enable;
5781 	u32 hw_filter_bitmap;
5782 } __packed;
5783 
5784 /* WOW structures */
5785 enum wmi_wow_wakeup_event {
5786 	WOW_BMISS_EVENT = 0,
5787 	WOW_BETTER_AP_EVENT,
5788 	WOW_DEAUTH_RECVD_EVENT,
5789 	WOW_MAGIC_PKT_RECVD_EVENT,
5790 	WOW_GTK_ERR_EVENT,
5791 	WOW_FOURWAY_HSHAKE_EVENT,
5792 	WOW_EAPOL_RECVD_EVENT,
5793 	WOW_NLO_DETECTED_EVENT,
5794 	WOW_DISASSOC_RECVD_EVENT,
5795 	WOW_PATTERN_MATCH_EVENT,
5796 	WOW_CSA_IE_EVENT,
5797 	WOW_PROBE_REQ_WPS_IE_EVENT,
5798 	WOW_AUTH_REQ_EVENT,
5799 	WOW_ASSOC_REQ_EVENT,
5800 	WOW_HTT_EVENT,
5801 	WOW_RA_MATCH_EVENT,
5802 	WOW_HOST_AUTO_SHUTDOWN_EVENT,
5803 	WOW_IOAC_MAGIC_EVENT,
5804 	WOW_IOAC_SHORT_EVENT,
5805 	WOW_IOAC_EXTEND_EVENT,
5806 	WOW_IOAC_TIMER_EVENT,
5807 	WOW_DFS_PHYERR_RADAR_EVENT,
5808 	WOW_BEACON_EVENT,
5809 	WOW_CLIENT_KICKOUT_EVENT,
5810 	WOW_EVENT_MAX,
5811 };
5812 
5813 enum wmi_wow_interface_cfg {
5814 	WOW_IFACE_PAUSE_ENABLED,
5815 	WOW_IFACE_PAUSE_DISABLED
5816 };
5817 
5818 #define C2S(x) case x: return #x
5819 
wow_wakeup_event(enum wmi_wow_wakeup_event ev)5820 static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev)
5821 {
5822 	switch (ev) {
5823 	C2S(WOW_BMISS_EVENT);
5824 	C2S(WOW_BETTER_AP_EVENT);
5825 	C2S(WOW_DEAUTH_RECVD_EVENT);
5826 	C2S(WOW_MAGIC_PKT_RECVD_EVENT);
5827 	C2S(WOW_GTK_ERR_EVENT);
5828 	C2S(WOW_FOURWAY_HSHAKE_EVENT);
5829 	C2S(WOW_EAPOL_RECVD_EVENT);
5830 	C2S(WOW_NLO_DETECTED_EVENT);
5831 	C2S(WOW_DISASSOC_RECVD_EVENT);
5832 	C2S(WOW_PATTERN_MATCH_EVENT);
5833 	C2S(WOW_CSA_IE_EVENT);
5834 	C2S(WOW_PROBE_REQ_WPS_IE_EVENT);
5835 	C2S(WOW_AUTH_REQ_EVENT);
5836 	C2S(WOW_ASSOC_REQ_EVENT);
5837 	C2S(WOW_HTT_EVENT);
5838 	C2S(WOW_RA_MATCH_EVENT);
5839 	C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT);
5840 	C2S(WOW_IOAC_MAGIC_EVENT);
5841 	C2S(WOW_IOAC_SHORT_EVENT);
5842 	C2S(WOW_IOAC_EXTEND_EVENT);
5843 	C2S(WOW_IOAC_TIMER_EVENT);
5844 	C2S(WOW_DFS_PHYERR_RADAR_EVENT);
5845 	C2S(WOW_BEACON_EVENT);
5846 	C2S(WOW_CLIENT_KICKOUT_EVENT);
5847 	C2S(WOW_EVENT_MAX);
5848 	default:
5849 		return NULL;
5850 	}
5851 }
5852 
5853 enum wmi_wow_wake_reason {
5854 	WOW_REASON_UNSPECIFIED = -1,
5855 	WOW_REASON_NLOD = 0,
5856 	WOW_REASON_AP_ASSOC_LOST,
5857 	WOW_REASON_LOW_RSSI,
5858 	WOW_REASON_DEAUTH_RECVD,
5859 	WOW_REASON_DISASSOC_RECVD,
5860 	WOW_REASON_GTK_HS_ERR,
5861 	WOW_REASON_EAP_REQ,
5862 	WOW_REASON_FOURWAY_HS_RECV,
5863 	WOW_REASON_TIMER_INTR_RECV,
5864 	WOW_REASON_PATTERN_MATCH_FOUND,
5865 	WOW_REASON_RECV_MAGIC_PATTERN,
5866 	WOW_REASON_P2P_DISC,
5867 	WOW_REASON_WLAN_HB,
5868 	WOW_REASON_CSA_EVENT,
5869 	WOW_REASON_PROBE_REQ_WPS_IE_RECV,
5870 	WOW_REASON_AUTH_REQ_RECV,
5871 	WOW_REASON_ASSOC_REQ_RECV,
5872 	WOW_REASON_HTT_EVENT,
5873 	WOW_REASON_RA_MATCH,
5874 	WOW_REASON_HOST_AUTO_SHUTDOWN,
5875 	WOW_REASON_IOAC_MAGIC_EVENT,
5876 	WOW_REASON_IOAC_SHORT_EVENT,
5877 	WOW_REASON_IOAC_EXTEND_EVENT,
5878 	WOW_REASON_IOAC_TIMER_EVENT,
5879 	WOW_REASON_ROAM_HO,
5880 	WOW_REASON_DFS_PHYERR_RADADR_EVENT,
5881 	WOW_REASON_BEACON_RECV,
5882 	WOW_REASON_CLIENT_KICKOUT_EVENT,
5883 	WOW_REASON_PAGE_FAULT = 0x3a,
5884 	WOW_REASON_DEBUG_TEST = 0xFF,
5885 };
5886 
wow_reason(enum wmi_wow_wake_reason reason)5887 static inline const char *wow_reason(enum wmi_wow_wake_reason reason)
5888 {
5889 	switch (reason) {
5890 	C2S(WOW_REASON_UNSPECIFIED);
5891 	C2S(WOW_REASON_NLOD);
5892 	C2S(WOW_REASON_AP_ASSOC_LOST);
5893 	C2S(WOW_REASON_LOW_RSSI);
5894 	C2S(WOW_REASON_DEAUTH_RECVD);
5895 	C2S(WOW_REASON_DISASSOC_RECVD);
5896 	C2S(WOW_REASON_GTK_HS_ERR);
5897 	C2S(WOW_REASON_EAP_REQ);
5898 	C2S(WOW_REASON_FOURWAY_HS_RECV);
5899 	C2S(WOW_REASON_TIMER_INTR_RECV);
5900 	C2S(WOW_REASON_PATTERN_MATCH_FOUND);
5901 	C2S(WOW_REASON_RECV_MAGIC_PATTERN);
5902 	C2S(WOW_REASON_P2P_DISC);
5903 	C2S(WOW_REASON_WLAN_HB);
5904 	C2S(WOW_REASON_CSA_EVENT);
5905 	C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV);
5906 	C2S(WOW_REASON_AUTH_REQ_RECV);
5907 	C2S(WOW_REASON_ASSOC_REQ_RECV);
5908 	C2S(WOW_REASON_HTT_EVENT);
5909 	C2S(WOW_REASON_RA_MATCH);
5910 	C2S(WOW_REASON_HOST_AUTO_SHUTDOWN);
5911 	C2S(WOW_REASON_IOAC_MAGIC_EVENT);
5912 	C2S(WOW_REASON_IOAC_SHORT_EVENT);
5913 	C2S(WOW_REASON_IOAC_EXTEND_EVENT);
5914 	C2S(WOW_REASON_IOAC_TIMER_EVENT);
5915 	C2S(WOW_REASON_ROAM_HO);
5916 	C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT);
5917 	C2S(WOW_REASON_BEACON_RECV);
5918 	C2S(WOW_REASON_CLIENT_KICKOUT_EVENT);
5919 	C2S(WOW_REASON_PAGE_FAULT);
5920 	C2S(WOW_REASON_DEBUG_TEST);
5921 	default:
5922 		return NULL;
5923 	}
5924 }
5925 
5926 #undef C2S
5927 
5928 struct wmi_wow_ev_arg {
5929 	u32 vdev_id;
5930 	u32 flag;
5931 	enum wmi_wow_wake_reason wake_reason;
5932 	u32 data_len;
5933 };
5934 
5935 enum wmi_tlv_pattern_type {
5936 	WOW_PATTERN_MIN = 0,
5937 	WOW_BITMAP_PATTERN = WOW_PATTERN_MIN,
5938 	WOW_IPV4_SYNC_PATTERN,
5939 	WOW_IPV6_SYNC_PATTERN,
5940 	WOW_WILD_CARD_PATTERN,
5941 	WOW_TIMER_PATTERN,
5942 	WOW_MAGIC_PATTERN,
5943 	WOW_IPV6_RA_PATTERN,
5944 	WOW_IOAC_PKT_PATTERN,
5945 	WOW_IOAC_TMR_PATTERN,
5946 	WOW_PATTERN_MAX
5947 };
5948 
5949 #define WOW_DEFAULT_BITMAP_PATTERN_SIZE		148
5950 #define WOW_DEFAULT_BITMASK_SIZE		148
5951 
5952 #define WOW_MIN_PATTERN_SIZE	1
5953 #define WOW_MAX_PATTERN_SIZE	148
5954 #define WOW_MAX_PKT_OFFSET	128
5955 #define WOW_HDR_LEN	(sizeof(struct ieee80211_hdr_3addr) + \
5956 	sizeof(struct rfc1042_hdr))
5957 #define WOW_MAX_REDUCE	(WOW_HDR_LEN - sizeof(struct ethhdr) - \
5958 	offsetof(struct ieee80211_hdr_3addr, addr1))
5959 
5960 struct wmi_wow_add_del_event_cmd {
5961 	u32 tlv_header;
5962 	u32 vdev_id;
5963 	u32 is_add;
5964 	u32 event_bitmap;
5965 } __packed;
5966 
5967 struct wmi_wow_enable_cmd {
5968 	u32 tlv_header;
5969 	u32 enable;
5970 	u32 pause_iface_config;
5971 	u32 flags;
5972 }  __packed;
5973 
5974 struct wmi_wow_host_wakeup_ind {
5975 	u32 tlv_header;
5976 	u32 reserved;
5977 } __packed;
5978 
5979 struct wmi_tlv_wow_event_info {
5980 	u32 vdev_id;
5981 	u32 flag;
5982 	u32 wake_reason;
5983 	u32 data_len;
5984 } __packed;
5985 
5986 struct wmi_wow_bitmap_pattern {
5987 	u32 tlv_header;
5988 	u8 patternbuf[WOW_DEFAULT_BITMAP_PATTERN_SIZE];
5989 	u8 bitmaskbuf[WOW_DEFAULT_BITMASK_SIZE];
5990 	u32 pattern_offset;
5991 	u32 pattern_len;
5992 	u32 bitmask_len;
5993 	u32 pattern_id;
5994 } __packed;
5995 
5996 struct wmi_wow_add_pattern_cmd {
5997 	u32 tlv_header;
5998 	u32 vdev_id;
5999 	u32 pattern_id;
6000 	u32 pattern_type;
6001 } __packed;
6002 
6003 struct wmi_wow_del_pattern_cmd {
6004 	u32 tlv_header;
6005 	u32 vdev_id;
6006 	u32 pattern_id;
6007 	u32 pattern_type;
6008 } __packed;
6009 
6010 #define WMI_PNO_MAX_SCHED_SCAN_PLANS      2
6011 #define WMI_PNO_MAX_SCHED_SCAN_PLAN_INT   7200
6012 #define WMI_PNO_MAX_SCHED_SCAN_PLAN_ITRNS 100
6013 #define WMI_PNO_MAX_NETW_CHANNELS         26
6014 #define WMI_PNO_MAX_NETW_CHANNELS_EX      60
6015 #define WMI_PNO_MAX_SUPP_NETWORKS         WLAN_SCAN_PARAMS_MAX_SSID
6016 #define WMI_PNO_MAX_IE_LENGTH             WLAN_SCAN_PARAMS_MAX_IE_LEN
6017 
6018 /* size based of dot11 declaration without extra IEs as we will not carry those for PNO */
6019 #define WMI_PNO_MAX_PB_REQ_SIZE    450
6020 
6021 #define WMI_PNO_24G_DEFAULT_CH     1
6022 #define WMI_PNO_5G_DEFAULT_CH      36
6023 
6024 #define WMI_ACTIVE_MAX_CHANNEL_TIME 40
6025 #define WMI_PASSIVE_MAX_CHANNEL_TIME   110
6026 
6027 /* SSID broadcast type */
6028 enum wmi_ssid_bcast_type {
6029 	BCAST_UNKNOWN      = 0,
6030 	BCAST_NORMAL       = 1,
6031 	BCAST_HIDDEN       = 2,
6032 };
6033 
6034 #define WMI_NLO_MAX_SSIDS    16
6035 #define WMI_NLO_MAX_CHAN     48
6036 
6037 #define WMI_NLO_CONFIG_STOP                             BIT(0)
6038 #define WMI_NLO_CONFIG_START                            BIT(1)
6039 #define WMI_NLO_CONFIG_RESET                            BIT(2)
6040 #define WMI_NLO_CONFIG_SLOW_SCAN                        BIT(4)
6041 #define WMI_NLO_CONFIG_FAST_SCAN                        BIT(5)
6042 #define WMI_NLO_CONFIG_SSID_HIDE_EN                     BIT(6)
6043 
6044 /* This bit is used to indicate if EPNO or supplicant PNO is enabled.
6045  * Only one of them can be enabled at a given time
6046  */
6047 #define WMI_NLO_CONFIG_ENLO                             BIT(7)
6048 #define WMI_NLO_CONFIG_SCAN_PASSIVE                     BIT(8)
6049 #define WMI_NLO_CONFIG_ENLO_RESET                       BIT(9)
6050 #define WMI_NLO_CONFIG_SPOOFED_MAC_IN_PROBE_REQ         BIT(10)
6051 #define WMI_NLO_CONFIG_RANDOM_SEQ_NO_IN_PROBE_REQ       BIT(11)
6052 #define WMI_NLO_CONFIG_ENABLE_IE_WHITELIST_IN_PROBE_REQ BIT(12)
6053 #define WMI_NLO_CONFIG_ENABLE_CNLO_RSSI_CONFIG          BIT(13)
6054 
6055 struct wmi_nlo_ssid_param {
6056 	u32 valid;
6057 	struct wmi_ssid ssid;
6058 } __packed;
6059 
6060 struct wmi_nlo_enc_param {
6061 	u32 valid;
6062 	u32 enc_type;
6063 } __packed;
6064 
6065 struct wmi_nlo_auth_param {
6066 	u32 valid;
6067 	u32 auth_type;
6068 } __packed;
6069 
6070 struct wmi_nlo_bcast_nw_param {
6071 	u32 valid;
6072 	u32 bcast_nw_type;
6073 } __packed;
6074 
6075 struct wmi_nlo_rssi_param {
6076 	u32 valid;
6077 	s32 rssi;
6078 } __packed;
6079 
6080 struct nlo_configured_parameters {
6081 	/* TLV tag and len;*/
6082 	u32 tlv_header;
6083 	struct wmi_nlo_ssid_param ssid;
6084 	struct wmi_nlo_enc_param enc_type;
6085 	struct wmi_nlo_auth_param auth_type;
6086 	struct wmi_nlo_rssi_param rssi_cond;
6087 
6088 	/* indicates if the SSID is hidden or not */
6089 	struct wmi_nlo_bcast_nw_param bcast_nw_type;
6090 } __packed;
6091 
6092 struct wmi_network_type {
6093 	struct wmi_ssid ssid;
6094 	u32 authentication;
6095 	u32 encryption;
6096 	u32 bcast_nw_type;
6097 	u8 channel_count;
6098 	u16 channels[WMI_PNO_MAX_NETW_CHANNELS_EX];
6099 	s32 rssi_threshold;
6100 };
6101 
6102 struct wmi_pno_scan_req {
6103 	u8 enable;
6104 	u8 vdev_id;
6105 	u8 uc_networks_count;
6106 	struct wmi_network_type a_networks[WMI_PNO_MAX_SUPP_NETWORKS];
6107 	u32 fast_scan_period;
6108 	u32 slow_scan_period;
6109 	u8 fast_scan_max_cycles;
6110 
6111 	bool do_passive_scan;
6112 
6113 	u32 delay_start_time;
6114 	u32 active_min_time;
6115 	u32 active_max_time;
6116 	u32 passive_min_time;
6117 	u32 passive_max_time;
6118 
6119 	/* mac address randomization attributes */
6120 	u32 enable_pno_scan_randomization;
6121 	u8 mac_addr[ETH_ALEN];
6122 	u8 mac_addr_mask[ETH_ALEN];
6123 };
6124 
6125 struct wmi_wow_nlo_config_cmd {
6126 	u32 tlv_header;
6127 	u32 flags;
6128 	u32 vdev_id;
6129 	u32 fast_scan_max_cycles;
6130 	u32 active_dwell_time;
6131 	u32 passive_dwell_time;
6132 	u32 probe_bundle_size;
6133 
6134 	/* ART = IRT */
6135 	u32 rest_time;
6136 
6137 	/* Max value that can be reached after SBM */
6138 	u32 max_rest_time;
6139 
6140 	/* SBM */
6141 	u32 scan_backoff_multiplier;
6142 
6143 	/* SCBM */
6144 	u32 fast_scan_period;
6145 
6146 	/* specific to windows */
6147 	u32 slow_scan_period;
6148 
6149 	u32 no_of_ssids;
6150 
6151 	u32 num_of_channels;
6152 
6153 	/* NLO scan start delay time in milliseconds */
6154 	u32 delay_start_time;
6155 
6156 	/* MAC Address to use in Probe Req as SA */
6157 	struct wmi_mac_addr mac_addr;
6158 
6159 	/* Mask on which MAC has to be randomized */
6160 	struct wmi_mac_addr mac_mask;
6161 
6162 	/* IE bitmap to use in Probe Req */
6163 	u32 ie_bitmap[8];
6164 
6165 	/* Number of vendor OUIs. In the TLV vendor_oui[] */
6166 	u32 num_vendor_oui;
6167 
6168 	/* Number of connected NLO band preferences */
6169 	u32 num_cnlo_band_pref;
6170 
6171 	/* The TLVs will follow.
6172 	 * nlo_configured_parameters nlo_list[];
6173 	 * u32 channel_list[num_of_channels];
6174 	 */
6175 } __packed;
6176 
6177 #define WMI_MAX_NS_OFFLOADS           2
6178 #define WMI_MAX_ARP_OFFLOADS          2
6179 
6180 #define WMI_ARPOL_FLAGS_VALID              BIT(0)
6181 #define WMI_ARPOL_FLAGS_MAC_VALID          BIT(1)
6182 #define WMI_ARPOL_FLAGS_REMOTE_IP_VALID    BIT(2)
6183 
6184 struct wmi_arp_offload_tuple {
6185 	u32 tlv_header;
6186 	u32 flags;
6187 	u8 target_ipaddr[4];
6188 	u8 remote_ipaddr[4];
6189 	struct wmi_mac_addr target_mac;
6190 } __packed;
6191 
6192 #define WMI_NSOL_FLAGS_VALID               BIT(0)
6193 #define WMI_NSOL_FLAGS_MAC_VALID           BIT(1)
6194 #define WMI_NSOL_FLAGS_REMOTE_IP_VALID     BIT(2)
6195 #define WMI_NSOL_FLAGS_IS_IPV6_ANYCAST     BIT(3)
6196 
6197 #define WMI_NSOL_MAX_TARGET_IPS    2
6198 
6199 struct wmi_ns_offload_tuple {
6200 	u32 tlv_header;
6201 	u32 flags;
6202 	u8 target_ipaddr[WMI_NSOL_MAX_TARGET_IPS][16];
6203 	u8 solicitation_ipaddr[16];
6204 	u8 remote_ipaddr[16];
6205 	struct wmi_mac_addr target_mac;
6206 } __packed;
6207 
6208 struct wmi_set_arp_ns_offload_cmd {
6209 	u32 tlv_header;
6210 	u32 flags;
6211 	u32 vdev_id;
6212 	u32 num_ns_ext_tuples;
6213 	/* The TLVs follow:
6214 	 * wmi_ns_offload_tuple  ns_tuples[WMI_MAX_NS_OFFLOADS];
6215 	 * wmi_arp_offload_tuple arp_tuples[WMI_MAX_ARP_OFFLOADS];
6216 	 * wmi_ns_offload_tuple  ns_ext_tuples[num_ns_ext_tuples];
6217 	 */
6218 } __packed;
6219 
6220 #define GTK_OFFLOAD_OPCODE_MASK             0xFF000000
6221 #define GTK_OFFLOAD_ENABLE_OPCODE           0x01000000
6222 #define GTK_OFFLOAD_DISABLE_OPCODE          0x02000000
6223 #define GTK_OFFLOAD_REQUEST_STATUS_OPCODE   0x04000000
6224 
6225 #define GTK_OFFLOAD_KEK_BYTES       16
6226 #define GTK_OFFLOAD_KCK_BYTES       16
6227 #define GTK_REPLAY_COUNTER_BYTES    8
6228 #define WMI_MAX_KEY_LEN             32
6229 #define IGTK_PN_SIZE                6
6230 
6231 struct wmi_replayc_cnt {
6232 	union {
6233 		u8 counter[GTK_REPLAY_COUNTER_BYTES];
6234 		struct {
6235 			u32 word0;
6236 			u32 word1;
6237 		} __packed;
6238 	} __packed;
6239 } __packed;
6240 
6241 struct wmi_gtk_offload_status_event {
6242 	u32 vdev_id;
6243 	u32 flags;
6244 	u32 refresh_cnt;
6245 	struct wmi_replayc_cnt replay_ctr;
6246 	u8 igtk_key_index;
6247 	u8 igtk_key_length;
6248 	u8 igtk_key_rsc[IGTK_PN_SIZE];
6249 	u8 igtk_key[WMI_MAX_KEY_LEN];
6250 	u8 gtk_key_index;
6251 	u8 gtk_key_length;
6252 	u8 gtk_key_rsc[GTK_REPLAY_COUNTER_BYTES];
6253 	u8 gtk_key[WMI_MAX_KEY_LEN];
6254 } __packed;
6255 
6256 struct wmi_gtk_rekey_offload_cmd {
6257 	u32 tlv_header;
6258 	u32 vdev_id;
6259 	u32 flags;
6260 	u8 kek[GTK_OFFLOAD_KEK_BYTES];
6261 	u8 kck[GTK_OFFLOAD_KCK_BYTES];
6262 	u8 replay_ctr[GTK_REPLAY_COUNTER_BYTES];
6263 } __packed;
6264 
6265 #define BIOS_SAR_TABLE_LEN	(22)
6266 #define BIOS_SAR_RSVD1_LEN	(6)
6267 #define BIOS_SAR_RSVD2_LEN	(18)
6268 
6269 struct wmi_pdev_set_sar_table_cmd {
6270 	u32 tlv_header;
6271 	u32 pdev_id;
6272 	u32 sar_len;
6273 	u32 rsvd_len;
6274 } __packed;
6275 
6276 struct wmi_pdev_set_geo_table_cmd {
6277 	u32 tlv_header;
6278 	u32 pdev_id;
6279 	u32 rsvd_len;
6280 } __packed;
6281 
6282 struct wmi_sta_keepalive_cmd {
6283 	u32 tlv_header;
6284 	u32 vdev_id;
6285 	u32 enabled;
6286 
6287 	/* WMI_STA_KEEPALIVE_METHOD_ */
6288 	u32 method;
6289 
6290 	/* in seconds */
6291 	u32 interval;
6292 
6293 	/* following this structure is the TLV for struct
6294 	 * wmi_sta_keepalive_arp_resp
6295 	 */
6296 } __packed;
6297 
6298 struct wmi_sta_keepalive_arp_resp {
6299 	u32 tlv_header;
6300 	u32 src_ip4_addr;
6301 	u32 dest_ip4_addr;
6302 	struct wmi_mac_addr dest_mac_addr;
6303 } __packed;
6304 
6305 struct wmi_sta_keepalive_arg {
6306 	u32 vdev_id;
6307 	u32 enabled;
6308 	u32 method;
6309 	u32 interval;
6310 	u32 src_ip4_addr;
6311 	u32 dest_ip4_addr;
6312 	const u8 dest_mac_addr[ETH_ALEN];
6313 };
6314 
6315 enum wmi_sta_keepalive_method {
6316 	WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1,
6317 	WMI_STA_KEEPALIVE_METHOD_UNSOLICITED_ARP_RESPONSE = 2,
6318 	WMI_STA_KEEPALIVE_METHOD_ETHERNET_LOOPBACK = 3,
6319 	WMI_STA_KEEPALIVE_METHOD_GRATUITOUS_ARP_REQUEST = 4,
6320 	WMI_STA_KEEPALIVE_METHOD_MGMT_VENDOR_ACTION = 5,
6321 };
6322 
6323 #define WMI_STA_KEEPALIVE_INTERVAL_DEFAULT	30
6324 #define WMI_STA_KEEPALIVE_INTERVAL_DISABLE	0
6325 
6326 const void **ath11k_wmi_tlv_parse_alloc(struct ath11k_base *ab, const void *ptr,
6327 					size_t len, gfp_t gfp);
6328 int ath11k_wmi_cmd_send(struct ath11k_pdev_wmi *wmi, struct sk_buff *skb,
6329 			u32 cmd_id);
6330 struct sk_buff *ath11k_wmi_alloc_skb(struct ath11k_wmi_base *wmi_sc, u32 len);
6331 int ath11k_wmi_mgmt_send(struct ath11k *ar, u32 vdev_id, u32 buf_id,
6332 			 struct sk_buff *frame);
6333 int ath11k_wmi_bcn_tmpl(struct ath11k *ar, u32 vdev_id,
6334 			struct ieee80211_mutable_offsets *offs,
6335 			struct sk_buff *bcn, u32 ema_param);
6336 int ath11k_wmi_vdev_down(struct ath11k *ar, u8 vdev_id);
6337 int ath11k_wmi_vdev_up(struct ath11k *ar, u32 vdev_id, u32 aid,
6338 		       const u8 *bssid, u8 *tx_bssid, u32 nontx_profile_idx,
6339 		       u32 nontx_profile_cnt);
6340 int ath11k_wmi_vdev_stop(struct ath11k *ar, u8 vdev_id);
6341 int ath11k_wmi_vdev_start(struct ath11k *ar, struct wmi_vdev_start_req_arg *arg,
6342 			  bool restart);
6343 int ath11k_wmi_set_peer_param(struct ath11k *ar, const u8 *peer_addr,
6344 			      u32 vdev_id, u32 param_id, u32 param_val);
6345 int ath11k_wmi_pdev_set_param(struct ath11k *ar, u32 param_id,
6346 			      u32 param_value, u8 pdev_id);
6347 int ath11k_wmi_pdev_set_ps_mode(struct ath11k *ar, int vdev_id,
6348 				enum wmi_sta_ps_mode psmode);
6349 int ath11k_wmi_wait_for_unified_ready(struct ath11k_base *ab);
6350 int ath11k_wmi_cmd_init(struct ath11k_base *ab);
6351 int ath11k_wmi_wait_for_service_ready(struct ath11k_base *ab);
6352 int ath11k_wmi_connect(struct ath11k_base *ab);
6353 int ath11k_wmi_pdev_attach(struct ath11k_base *ab,
6354 			   u8 pdev_id);
6355 int ath11k_wmi_attach(struct ath11k_base *ab);
6356 void ath11k_wmi_detach(struct ath11k_base *ab);
6357 int ath11k_wmi_vdev_create(struct ath11k *ar, u8 *macaddr,
6358 			   struct vdev_create_params *param);
6359 int ath11k_wmi_peer_rx_reorder_queue_setup(struct ath11k *ar, int vdev_id,
6360 					   const u8 *addr, dma_addr_t paddr,
6361 					   u8 tid, u8 ba_window_size_valid,
6362 					   u32 ba_window_size);
6363 int ath11k_wmi_send_peer_create_cmd(struct ath11k *ar,
6364 				    struct peer_create_params *param);
6365 int ath11k_wmi_vdev_set_param_cmd(struct ath11k *ar, u32 vdev_id,
6366 				  u32 param_id, u32 param_value);
6367 
6368 int ath11k_wmi_set_sta_ps_param(struct ath11k *ar, u32 vdev_id,
6369 				u32 param, u32 param_value);
6370 int ath11k_wmi_force_fw_hang_cmd(struct ath11k *ar, u32 type, u32 delay_time_ms);
6371 int ath11k_wmi_send_peer_delete_cmd(struct ath11k *ar,
6372 				    const u8 *peer_addr, u8 vdev_id);
6373 int ath11k_wmi_vdev_delete(struct ath11k *ar, u8 vdev_id);
6374 void ath11k_wmi_start_scan_init(struct ath11k *ar, struct scan_req_params *arg);
6375 int ath11k_wmi_send_scan_start_cmd(struct ath11k *ar,
6376 				   struct scan_req_params *params);
6377 int ath11k_wmi_send_scan_stop_cmd(struct ath11k *ar,
6378 				  struct scan_cancel_param *param);
6379 int ath11k_wmi_send_wmm_update_cmd_tlv(struct ath11k *ar, u32 vdev_id,
6380 				       struct wmi_wmm_params_all_arg *param);
6381 int ath11k_wmi_pdev_suspend(struct ath11k *ar, u32 suspend_opt,
6382 			    u32 pdev_id);
6383 int ath11k_wmi_pdev_resume(struct ath11k *ar, u32 pdev_id);
6384 
6385 int ath11k_wmi_send_peer_assoc_cmd(struct ath11k *ar,
6386 				   struct peer_assoc_params *param);
6387 int ath11k_wmi_vdev_install_key(struct ath11k *ar,
6388 				struct wmi_vdev_install_key_arg *arg);
6389 int ath11k_wmi_pdev_bss_chan_info_request(struct ath11k *ar,
6390 					  enum wmi_bss_chan_info_req_type type);
6391 int ath11k_wmi_send_stats_request_cmd(struct ath11k *ar,
6392 				      struct stats_request_params *param);
6393 int ath11k_wmi_send_pdev_temperature_cmd(struct ath11k *ar);
6394 int ath11k_wmi_send_peer_flush_tids_cmd(struct ath11k *ar,
6395 					u8 peer_addr[ETH_ALEN],
6396 					struct peer_flush_params *param);
6397 int ath11k_wmi_send_set_ap_ps_param_cmd(struct ath11k *ar, u8 *peer_addr,
6398 					struct ap_ps_params *param);
6399 int ath11k_wmi_send_scan_chan_list_cmd(struct ath11k *ar,
6400 				       struct scan_chan_list_params *chan_list);
6401 int ath11k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath11k *ar,
6402 						  u32 pdev_id);
6403 int ath11k_wmi_addba_clear_resp(struct ath11k *ar, u32 vdev_id, const u8 *mac);
6404 int ath11k_wmi_addba_send(struct ath11k *ar, u32 vdev_id, const u8 *mac,
6405 			  u32 tid, u32 buf_size);
6406 int ath11k_wmi_addba_set_resp(struct ath11k *ar, u32 vdev_id, const u8 *mac,
6407 			      u32 tid, u32 status);
6408 int ath11k_wmi_delba_send(struct ath11k *ar, u32 vdev_id, const u8 *mac,
6409 			  u32 tid, u32 initiator, u32 reason);
6410 int ath11k_wmi_send_bcn_offload_control_cmd(struct ath11k *ar,
6411 					    u32 vdev_id, u32 bcn_ctrl_op);
6412 int ath11k_wmi_send_set_current_country_cmd(struct ath11k *ar,
6413 					    struct wmi_set_current_country_params *param);
6414 int
6415 ath11k_wmi_send_init_country_cmd(struct ath11k *ar,
6416 				 struct wmi_init_country_params init_cc_param);
6417 
6418 int ath11k_wmi_send_11d_scan_start_cmd(struct ath11k *ar,
6419 				       struct wmi_11d_scan_start_params *param);
6420 int ath11k_wmi_send_11d_scan_stop_cmd(struct ath11k *ar, u32 vdev_id);
6421 
6422 int
6423 ath11k_wmi_send_thermal_mitigation_param_cmd(struct ath11k *ar,
6424 					     struct thermal_mitigation_params *param);
6425 int ath11k_wmi_pdev_pktlog_enable(struct ath11k *ar, u32 pktlog_filter);
6426 int ath11k_wmi_pdev_pktlog_disable(struct ath11k *ar);
6427 int ath11k_wmi_pdev_peer_pktlog_filter(struct ath11k *ar, u8 *addr, u8 enable);
6428 int
6429 ath11k_wmi_rx_reord_queue_remove(struct ath11k *ar,
6430 				 struct rx_reorder_queue_remove_params *param);
6431 int ath11k_wmi_send_pdev_set_regdomain(struct ath11k *ar,
6432 				       struct pdev_set_regdomain_params *param);
6433 int ath11k_wmi_pull_fw_stats(struct ath11k_base *ab, struct sk_buff *skb,
6434 			     struct ath11k_fw_stats *stats);
6435 void ath11k_wmi_fw_stats_fill(struct ath11k *ar,
6436 			      struct ath11k_fw_stats *fw_stats, u32 stats_id,
6437 			      char *buf);
6438 int ath11k_wmi_simulate_radar(struct ath11k *ar);
6439 void ath11k_wmi_fill_default_twt_params(struct wmi_twt_enable_params *twt_params);
6440 int ath11k_wmi_send_twt_enable_cmd(struct ath11k *ar, u32 pdev_id,
6441 				   struct wmi_twt_enable_params *params);
6442 int ath11k_wmi_send_twt_disable_cmd(struct ath11k *ar, u32 pdev_id);
6443 int ath11k_wmi_send_twt_add_dialog_cmd(struct ath11k *ar,
6444 				       struct wmi_twt_add_dialog_params *params);
6445 int ath11k_wmi_send_twt_del_dialog_cmd(struct ath11k *ar,
6446 				       struct wmi_twt_del_dialog_params *params);
6447 int ath11k_wmi_send_twt_pause_dialog_cmd(struct ath11k *ar,
6448 					 struct wmi_twt_pause_dialog_params *params);
6449 int ath11k_wmi_send_twt_resume_dialog_cmd(struct ath11k *ar,
6450 					  struct wmi_twt_resume_dialog_params *params);
6451 int ath11k_wmi_send_obss_spr_cmd(struct ath11k *ar, u32 vdev_id,
6452 				 struct ieee80211_he_obss_pd *he_obss_pd);
6453 int ath11k_wmi_pdev_set_srg_bss_color_bitmap(struct ath11k *ar, u32 *bitmap);
6454 int ath11k_wmi_pdev_set_srg_patial_bssid_bitmap(struct ath11k *ar, u32 *bitmap);
6455 int ath11k_wmi_pdev_srg_obss_color_enable_bitmap(struct ath11k *ar,
6456 						 u32 *bitmap);
6457 int ath11k_wmi_pdev_srg_obss_bssid_enable_bitmap(struct ath11k *ar,
6458 						 u32 *bitmap);
6459 int ath11k_wmi_pdev_non_srg_obss_color_enable_bitmap(struct ath11k *ar,
6460 						     u32 *bitmap);
6461 int ath11k_wmi_pdev_non_srg_obss_bssid_enable_bitmap(struct ath11k *ar,
6462 						     u32 *bitmap);
6463 int ath11k_wmi_send_obss_color_collision_cfg_cmd(struct ath11k *ar, u32 vdev_id,
6464 						 u8 bss_color, u32 period,
6465 						 bool enable);
6466 int ath11k_wmi_send_bss_color_change_enable_cmd(struct ath11k *ar, u32 vdev_id,
6467 						bool enable);
6468 int ath11k_wmi_pdev_lro_cfg(struct ath11k *ar, int pdev_id);
6469 int ath11k_wmi_pdev_dma_ring_cfg(struct ath11k *ar,
6470 				 struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd *param);
6471 int ath11k_wmi_vdev_spectral_enable(struct ath11k *ar, u32 vdev_id,
6472 				    u32 trigger, u32 enable);
6473 int ath11k_wmi_vdev_spectral_conf(struct ath11k *ar,
6474 				  struct ath11k_wmi_vdev_spectral_conf_param *param);
6475 int ath11k_wmi_fils_discovery_tmpl(struct ath11k *ar, u32 vdev_id,
6476 				   struct sk_buff *tmpl);
6477 int ath11k_wmi_fils_discovery(struct ath11k *ar, u32 vdev_id, u32 interval,
6478 			      bool unsol_bcast_probe_resp_enabled);
6479 int ath11k_wmi_probe_resp_tmpl(struct ath11k *ar, u32 vdev_id,
6480 			       struct sk_buff *tmpl);
6481 int ath11k_wmi_set_hw_mode(struct ath11k_base *ab,
6482 			   enum wmi_host_hw_mode_config_type mode);
6483 int ath11k_wmi_wow_host_wakeup_ind(struct ath11k *ar);
6484 int ath11k_wmi_wow_enable(struct ath11k *ar);
6485 int ath11k_wmi_scan_prob_req_oui(struct ath11k *ar,
6486 				 const u8 mac_addr[ETH_ALEN]);
6487 int ath11k_wmi_fw_dbglog_cfg(struct ath11k *ar, u32 *module_id_bitmap,
6488 			     struct ath11k_fw_dbglog *dbglog);
6489 int ath11k_wmi_wow_config_pno(struct ath11k *ar, u32 vdev_id,
6490 			      struct wmi_pno_scan_req  *pno_scan);
6491 int ath11k_wmi_wow_del_pattern(struct ath11k *ar, u32 vdev_id, u32 pattern_id);
6492 int ath11k_wmi_wow_add_pattern(struct ath11k *ar, u32 vdev_id, u32 pattern_id,
6493 			       const u8 *pattern, const u8 *mask,
6494 			       int pattern_len, int pattern_offset);
6495 int ath11k_wmi_wow_add_wakeup_event(struct ath11k *ar, u32 vdev_id,
6496 				    enum wmi_wow_wakeup_event event,
6497 				    u32 enable);
6498 int ath11k_wmi_hw_data_filter_cmd(struct ath11k *ar, u32 vdev_id,
6499 				  u32 filter_bitmap, bool enable);
6500 int ath11k_wmi_arp_ns_offload(struct ath11k *ar,
6501 			      struct ath11k_vif *arvif, bool enable);
6502 int ath11k_wmi_gtk_rekey_offload(struct ath11k *ar,
6503 				 struct ath11k_vif *arvif, bool enable);
6504 int ath11k_wmi_gtk_rekey_getinfo(struct ath11k *ar,
6505 				 struct ath11k_vif *arvif);
6506 int ath11k_wmi_pdev_set_bios_sar_table_param(struct ath11k *ar, const u8 *sar_val);
6507 int ath11k_wmi_pdev_set_bios_geo_table_param(struct ath11k *ar);
6508 int ath11k_wmi_sta_keepalive(struct ath11k *ar,
6509 			     const struct wmi_sta_keepalive_arg *arg);
6510 
6511 #endif
6512