1 /* $NetBSD: if_wmvar.h,v 1.49 2023/05/11 07:14:46 msaitoh Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /******************************************************************************* 39 40 Copyright (c) 2001-2005, Intel Corporation 41 All rights reserved. 42 43 Redistribution and use in source and binary forms, with or without 44 modification, are permitted provided that the following conditions are met: 45 46 1. Redistributions of source code must retain the above copyright notice, 47 this list of conditions and the following disclaimer. 48 49 2. Redistributions in binary form must reproduce the above copyright 50 notice, this list of conditions and the following disclaimer in the 51 documentation and/or other materials provided with the distribution. 52 53 3. Neither the name of the Intel Corporation nor the names of its 54 contributors may be used to endorse or promote products derived from 55 this software without specific prior written permission. 56 57 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 58 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 59 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 60 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 61 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 62 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 63 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 64 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 65 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 66 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 67 POSSIBILITY OF SUCH DAMAGE. 68 69 *******************************************************************************/ 70 71 #ifndef _DEV_PCI_IF_WMVAR_H_ 72 #define _DEV_PCI_IF_WMVAR_H_ 73 74 /* sc_flags */ 75 #define WM_F_HAS_MII 0x00000001 /* has MII */ 76 #define WM_F_LOCK_EECD 0x00000002 /* Lock using with EECD register */ 77 #define WM_F_EEPROM_INVM 0x00000020 /* NVM is iNVM */ 78 #define WM_F_EEPROM_SPI 0x00000040 /* EEPROM is SPI */ 79 #define WM_F_EEPROM_FLASH 0x00000080 /* EEPROM is FLASH */ 80 #define WM_F_EEPROM_FLASH_HW 0x00000100 /* EEPROM is FLASH */ 81 #define WM_F_EEPROM_INVALID 0x00000200 /* EEPROM not present (bad cksum) */ 82 #define WM_F_IOH_VALID 0x00000400 /* I/O handle is valid */ 83 #define WM_F_BUS64 0x00000800 /* bus is 64-bit */ 84 #define WM_F_PCIX 0x00001000 /* bus is PCI-X */ 85 #define WM_F_CSA 0x00002000 /* bus is CSA */ 86 #define WM_F_PCIE 0x00004000 /* bus is PCI-Express */ 87 #define WM_F_SGMII 0x00008000 /* use SGMII */ 88 #define WM_F_NEWQUEUE 0x00010000 /* use new queue system */ 89 #define WM_F_ASF_FIRMWARE_PRES 0x00020000 90 #define WM_F_ARC_SUBSYS_VALID 0x00040000 91 #define WM_F_HAS_AMT 0x00080000 92 #define WM_F_HAS_MANAGE 0x00100000 93 #define WM_F_WOL 0x00200000 94 #define WM_F_EEE 0x00400000 /* Energy Efficiency Ethernet */ 95 #define WM_F_ATTACHED 0x00800000 /* attach() finished successfully */ 96 #define WM_F_80003_MDIC_WA 0x01000000 /* 80003 MDIC workaround */ 97 #define WM_F_PCS_DIS_AUTONEGO 0x02000000 /* PCS Disable Autonego */ 98 #define WM_F_PLL_WA_I210 0x04000000 /* I21[01] PLL workaround */ 99 #define WM_F_WA_I210_CLSEM 0x08000000 /* I21[01] Semaphore workaround */ 100 #define WM_F_SFP 0x10000000 /* SFP */ 101 #define WM_F_MAS 0x20000000 /* Media Auto Sense */ 102 #define WM_F_CRC_STRIP 0x40000000 /* CRC strip */ 103 104 #define WM_FLAGS "\20" \ 105 "\1" "HAS_MII" "\2" "LOCK_EECD" "\3" "_B02" "\4" "_B03" \ 106 "\5" "_B04" "\6" "INVM" "\7" "SPI" "\10" "FLASH" \ 107 "\11" "FLASH_HW" "\12" "INVALID" "\13" "IOH_VALID" "\14" "BUS64" \ 108 "\15" "PCIX" "\16" "CSA" "\17" "PCIE" "\20" "SGMII" \ 109 "\21" "NEWQUEUE" "\22" "ASF_FIRM" "\23" "ARC_SUBSYS" "\24" "AMT" \ 110 "\25" "MANAGE" "\26" "WOL" "\27" "EEE" "\30" "ATTACHED" \ 111 "\31" "MDIC_WA" "\32" "PCS_DIS_AUTONEGO" "\33" "PLLWA" "\34" "CLSEMWA" \ 112 "\35" "SFP" "\36" "MAS" "\37" "CRC_STRIP" 113 114 /* 115 * Variations of Intel gigabit Ethernet controller: 116 * 117 * +-- 82542 118 * | +-- 82543 - 82544 119 * | | +-- 82540 - 82545 - 82546 120 * | | | +-- 82541 - 82547 121 * | | | | +---------- 82571 - 82572 - 82573 - 82574 - 82583 122 * | | | | | +--------- 82575 - 82576 - 82580 - I350 - I354 - I210 - I211 123 * | | | | | | +-- 80003 124 * | | | | | | | +-- ICH8 - 9 - 10 - PCH - 2 - LPT - SPT - CNP 125 * | | | | | | | | 126 * -+--+--+--+--+--+--+--+-----------------------------------------------> 127 */ 128 129 typedef enum { 130 WM_T_unknown = 0, 131 WM_T_82542_2_0, /* i82542 2.0 (really old) */ 132 WM_T_82542_2_1, /* i82542 2.1+ (old) */ 133 WM_T_82543, /* i82543 */ 134 WM_T_82544, /* i82544 */ 135 WM_T_82540, /* i82540 */ 136 WM_T_82545, /* i82545 */ 137 WM_T_82545_3, /* i82545 3.0+ */ 138 WM_T_82546, /* i82546 */ 139 WM_T_82546_3, /* i82546 3.0+ */ 140 WM_T_82541, /* i82541 */ 141 WM_T_82541_2, /* i82541 2.0+ */ 142 WM_T_82547, /* i82547 */ 143 WM_T_82547_2, /* i82547 2.0+ */ 144 WM_T_82571, /* i82571 */ 145 WM_T_82572, /* i82572 */ 146 WM_T_82573, /* i82573 */ 147 WM_T_82574, /* i82574 */ 148 WM_T_82583, /* i82583 */ 149 WM_T_82575, /* i82575 */ 150 WM_T_82576, /* i82576 */ 151 WM_T_82580, /* i82580 */ 152 WM_T_I350, /* I350 */ 153 WM_T_I354, /* I354 */ 154 WM_T_I210, /* I210 */ 155 WM_T_I211, /* I211 */ 156 WM_T_80003, /* i80003 */ 157 WM_T_ICH8, /* ICH8 (I/O Controller Hub) LAN */ 158 WM_T_ICH9, /* ICH9 LAN */ 159 WM_T_ICH10, /* ICH10 LAN */ 160 WM_T_PCH, /* PCH (Platform Controller Hub) LAN */ 161 WM_T_PCH2, /* PCH2 LAN */ 162 WM_T_PCH_LPT, /* PCH "Lynx Point" LAN (I217, I218) */ 163 WM_T_PCH_SPT, /* PCH "Sunrise Point" LAN (I219) */ 164 WM_T_PCH_CNP, /* (I219) */ 165 } wm_chip_type; 166 167 /* 168 * Variations of internal or external PHYs 169 * 170 * +- 82562 - 8254[17] - 8257[12] - 82566 171 * | 172 * -+-------------------------------------> 173 * 174 * 175 * +---------------------------- I347 ----- E1512 ---- E1543 176 * | | 177 * | +--------------------------- I210 - I211 178 * | | 179 * | | +-------------+--- 82580 - I350 180 * | | | | 181 * | | +- 578 - 577 - 579 - I217 - I218 - I219 182 * | | | 183 * +- 56[34] -- 567 -- 573 184 * | (E1149) (E1111) 185 * | 186 * -+-----------------------------------------------------------------------> 187 */ 188 189 typedef enum { 190 WMPHY_UNKNOWN = 0, 191 WMPHY_NONE, 192 WMPHY_M88, /* 88E1000: 8254[34], E1011: 8254[056], E1111: 82573 */ 193 WMPHY_IGP, /* 8254[17] */ 194 WMPHY_IGP_2, /* 8257[12] */ 195 WMPHY_GG82563, /* 8256[34]: 80003 */ 196 WMPHY_IGP_3, /* 82566: 82575, 82576, ICH8, ICH9 */ 197 WMPHY_IFE, /* 82562: ICH8 ICH9 */ 198 WMPHY_BM, /* 82567: ICH8 ICH9 ICH10 */ 199 WMPHY_82578, /* 82578: PCH */ 200 WMPHY_82577, /* 82577: PCH (NOTE: functionality newer than 82578) */ 201 WMPHY_82579, /* 82579: PCH2 */ 202 WMPHY_I217, /* I217: _LPT, I218: _LPT, I219: _SPT _CNP */ 203 WMPHY_82580, /* 82580 */ 204 WMPHY_I350, /* I350 */ 205 WMPHY_VF, 206 WMPHY_I210 /* I210: I210 I211 */ 207 } wm_phy_type; 208 209 210 #define WM_GEN_POLL_TIMEOUT 640 211 #define WM_PHY_CFG_TIMEOUT 100 212 #define WM_ICH8_LAN_INIT_TIMEOUT 1500 213 #define WM_MDIO_OWNERSHIP_TIMEOUT 10 214 #define WM_MAX_PLL_TRIES 5 215 216 /* For 80003, ICHs and PCHs */ 217 #define WM_IS_ICHPCH(x) ((x)->sc_type >= WM_T_80003) 218 219 #endif /* _DEV_PCI_IF_WMVAR_H_ */ 220