1 /*
2  * cpu_emulation.h - CPU interface
3  *
4  * Copyright (c) 2001-2005 Milan Jurik of ARAnyM dev team (see AUTHORS)
5  *
6  * Inspired by Christian Bauer's Basilisk II
7  *
8  * This file is part of the ARAnyM project which builds a new and powerful
9  * TOS/FreeMiNT compatible virtual machine running on almost any hardware.
10  *
11  * ARAnyM is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation; either version 2 of the License, or
14  * (at your option) any later version.
15  *
16  * ARAnyM is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with ARAnyM; if not, write to the Free Software
23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
24  */
25 
26 #ifndef CPU_EMULATION_H
27 #define CPU_EMULATION_H
28 
29 /*
30  *  Memory system
31  */
32 
33 #include "sysdeps.h"
34 #include "memory-uae.h"
35 #include "tools.h"
36 
37 // RAM and ROM pointers (allocated and set by main_*.cpp)
38 extern memptr RAMBase;		// RAM base (Atari address space), does not include Low Mem when != 0
39 extern uint8 *RAMBaseHost;	// RAM base (host address space)
40 extern uint32 RAMSize;		// Size of RAM
41 extern memptr ROMBase;		// ROM base (Atari address space)
42 extern uint8 *ROMBaseHost;	// ROM base (host address space)
43 extern uint32 ROMSize;		// Size of ROM
44 extern uint32 RealROMSize;	// Real size of ROM
45 extern memptr HWBase;		// HW base (Atari address space)
46 extern uint8 *HWBaseHost;	// HW base (host address space)
47 extern uint32 HWSize;		// Size of HW space
48 
49 extern memptr FastRAMBase;	// Fast-RAM base (Atari address space)
50 extern uint8 *FastRAMBaseHost;	// Fast-RAM base (host address space)
51 extern memptr VideoRAMBase;	// VideoRAM base (Atari address space)
52 extern uint8 *VideoRAMBaseHost;	// VideoRAM base (host address space)
53 
54 #ifdef HW_SIGSEGV
55 extern uint8 *FakeIOBaseHost;
56 #endif
57 
58 #ifdef RAMENDNEEDED
59 # define RAMEnd 0x01000000	// Not accessible top of memory
60 #else
61 # define RAMEnd 0
62 #endif
63 
64 // Atari memory access functions
65 // Direct access to CPU address space
66 // For HW operations
67 // Read/WriteAtariIntXX
68 //
ReadAtariInt64(memptr addr)69 static inline uint64 ReadAtariInt64(memptr addr) {return phys_get_quad(addr);}
ReadAtariInt32(memptr addr)70 static inline uint32 ReadAtariInt32(memptr addr) {return phys_get_long(addr);}
ReadAtariInt16(memptr addr)71 static inline uint16 ReadAtariInt16(memptr addr) {return phys_get_word(addr);}
ReadAtariInt8(memptr addr)72 static inline uint8 ReadAtariInt8(memptr addr) {return phys_get_byte(addr);}
WriteAtariInt64(memptr addr,uint64 q)73 static inline void WriteAtariInt64(memptr addr, uint64 q) {phys_put_quad(addr, q);}
WriteAtariInt32(memptr addr,uint32 l)74 static inline void WriteAtariInt32(memptr addr, uint32 l) {phys_put_long(addr, l);}
WriteAtariInt16(memptr addr,uint16 w)75 static inline void WriteAtariInt16(memptr addr, uint16 w) {phys_put_word(addr, w);}
WriteAtariInt8(memptr addr,uint8 b)76 static inline void WriteAtariInt8(memptr addr, uint8 b) {phys_put_byte(addr, b);}
77 
78 // Direct access to allocated memory
79 // Ignores HW checks, so that be carefull
80 // Read/WriteHWMemIntXX
81 //
ReadHWMemInt32(memptr addr)82 static inline uint32 ReadHWMemInt32(memptr addr) {return do_get_mem_long((uae_u32 *)phys_get_real_address(addr));}
ReadHWMemInt16(memptr addr)83 static inline uint16 ReadHWMemInt16(memptr addr) {return do_get_mem_word((uae_u16 *)phys_get_real_address(addr));}
ReadHWMemInt8(memptr addr)84 static inline uint8 ReadHWMemInt8(memptr addr) {return do_get_mem_byte((uae_u8 *)phys_get_real_address(addr));}
WriteHWMemInt32(memptr addr,uint32 l)85 static inline void WriteHWMemInt32(memptr addr, uint32 l) {do_put_mem_long((uae_u32 *)phys_get_real_address(addr), l);}
WriteHWMemInt16(memptr addr,uint16 w)86 static inline void WriteHWMemInt16(memptr addr, uint16 w) {do_put_mem_word((uae_u16 *)phys_get_real_address(addr), w);}
WriteHWMemInt8(memptr addr,uint8 b)87 static inline void WriteHWMemInt8(memptr addr, uint8 b) {do_put_mem_byte((uae_u8 *)phys_get_real_address(addr), b);}
88 
89 // Indirect access to CPU address space
90 // Uses MMU if available
91 // For SW operations
92 // Only data space
93 // Read/WriteIntXX
94 //
ReadInt64(memptr addr)95 static inline uint64 ReadInt64(memptr addr) {return get_quad(addr);}
ReadInt32(memptr addr)96 static inline uint32 ReadInt32(memptr addr) {return get_long(addr);}
ReadInt16(memptr addr)97 static inline uint16 ReadInt16(memptr addr) {return get_word(addr);}
ReadInt8(memptr addr)98 static inline uint8 ReadInt8(memptr addr) {return get_byte(addr);}
WriteInt64(memptr addr,uint64 q)99 static inline void WriteInt64(memptr addr, uint64 q) {put_quad(addr, q);}
WriteInt32(memptr addr,uint32 l)100 static inline void WriteInt32(memptr addr, uint32 l) {put_long(addr, l);}
WriteInt16(memptr addr,uint16 w)101 static inline void WriteInt16(memptr addr, uint16 w) {put_word(addr, w);}
WriteInt8(memptr addr,uint8 b)102 static inline void WriteInt8(memptr addr, uint8 b) {put_byte(addr, b);}
103 
104 #ifdef EXTENDED_SIGSEGV
105 extern int in_handler;
106 #ifdef NO_NESTED_SIGSEGV
107 extern JMP_BUF sigsegv_env;
108 # define BUS_ERROR(a) \
109 { \
110 	regs.mmu_fault_addr=(a); \
111 	if (in_handler) \
112 	{ \
113 		in_handler = 0; \
114 		LONGJMP(sigsegv_env, 1); \
115 	} \
116 	else { \
117 		breakpt(); \
118 		THROW(2); \
119 	} \
120 }
121 #else /* NO_NESTED_SIGSEGV */
122 # define BUS_ERROR(a) \
123 { \
124 	regs.mmu_fault_addr=(a); \
125 	in_handler = 0; \
126 	breakpt(); \
127 	THROW(2); \
128 }
129 #endif /* NO_NESTED_SIGSEGV */
130 #else /* EXTENDED_SIGSEGV */
131 # define BUS_ERROR(a) \
132 { \
133 	regs.mmu_fault_addr=(a); \
134 	breakpt(); \
135 	THROW(2); \
136 }
137 #endif /* EXTENDED_SIGSEGV */
138 
139 // For address validation
ValidAtariAddr(memptr addr,bool write,uint32 len)140 static inline bool ValidAtariAddr(memptr addr, bool write, uint32 len) { return phys_valid_address(addr, write, len); }
ValidAddr(memptr addr,bool write,uint32 len)141 static inline bool ValidAddr(memptr addr, bool write, uint32 len) { return valid_address(addr, write, len); }
142 
143 // Helper functions for usual memory operations
Atari2HostAddr(memptr addr)144 static inline uint8 *Atari2HostAddr(memptr addr) {return phys_get_real_address(addr);}
145 
146 
147 // From newcpu.cpp
148 extern int quit_program;
149 extern int exit_val;
150 
151 /*
152  *  680x0 emulation
153  */
154 
155 // Initialization
156 extern bool InitMEM();
157 extern bool Init680x0(void);
158 extern void Reset680x0(void);
159 extern void Exit680x0(void);
160 extern void AtariReset(void);
161 
162 // 680x0 emulation functions
163 struct M68kRegisters;
164 extern void Start680x0(void);	// Reset and start 680x0
165 extern void Restart680x0(void);	// Restart running 680x0
166 extern void Quit680x0(void);	// Quit 680x0
167 
168 // Interrupt functions
169 extern int MFPdoInterrupt(void);
170 extern int SCCdoInterrupt(void);
171 extern void TriggerInternalIRQ(void);
172 extern void TriggerInt3(void);		// Trigger interrupt level 3
173 extern void TriggerVBL(void);		// Trigger interrupt level 4
174 extern void TriggerInt5(void);		// Trigger interrupt level 5
175 extern void TriggerSCC(bool);		// Trigger interrupt level 5
176 extern void TriggerMFP(bool);		// Trigger interrupt level 6
177 extern void TriggerNMI(void);		// Trigger interrupt level 7
178 
179 #ifdef FLIGHT_RECORDER
180 extern void cpu_flight_recorder(int);
181 extern void dump_flight_recorder(void);
182 #endif
183 
184 // CPU looping handlers
185 void check_eps_limit(uaecptr);
186 void report_double_bus_error(void);
187 
188 // This function will be removed
showPC(void)189 static inline uaecptr showPC(void) { return m68k_getpc(); }	// for debugging only
190 
191 #endif
192 
193 /*
194 vim:ts=4:sw=4:
195 */
196