xref: /openbsd/sys/arch/riscv64/include/sbi.h (revision 114916ad)
1 /*	$OpenBSD: sbi.h,v 1.6 2024/03/29 22:11:34 kettenis Exp $	*/
2 
3 /*-
4  * Copyright (c) 2016-2017 Ruslan Bukin <br@bsdpad.com>
5  * All rights reserved.
6  * Copyright (c) 2019 Mitchell Horne <mhorne@FreeBSD.org>
7  *
8  * Portions of this software were developed by SRI International and the
9  * University of Cambridge Computer Laboratory under DARPA/AFRL contract
10  * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
11  *
12  * Portions of this software were developed by the University of Cambridge
13  * Computer Laboratory as part of the CTSRD Project, with support from the
14  * UK Higher Education Innovation Fund (HEIF).
15  *
16  * Redistribution and use in source and binary forms, with or without
17  * modification, are permitted provided that the following conditions
18  * are met:
19  * 1. Redistributions of source code must retain the above copyright
20  *    notice, this list of conditions and the following disclaimer.
21  * 2. Redistributions in binary form must reproduce the above copyright
22  *    notice, this list of conditions and the following disclaimer in the
23  *    documentation and/or other materials provided with the distribution.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
29  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35  * SUCH DAMAGE.
36  */
37 
38 #ifndef _MACHINE_SBI_H_
39 #define	_MACHINE_SBI_H_
40 
41 /* SBI Specification Version */
42 #define	SBI_SPEC_VERS_MAJOR_OFFSET	24
43 #define	SBI_SPEC_VERS_MAJOR_MASK	(0x7F << SBI_SPEC_VERS_MAJOR_OFFSET)
44 #define	SBI_SPEC_VERS_MINOR_OFFSET	0
45 #define	SBI_SPEC_VERS_MINOR_MASK	(0xFFFFFF << SBI_SPEC_VERS_MINOR_OFFSET)
46 
47 /* SBI Implementation IDs */
48 #define	SBI_IMPL_ID_BBL			0
49 #define	SBI_IMPL_ID_OPENSBI		1
50 
51 /* SBI Error Codes */
52 #define	SBI_SUCCESS			0
53 #define	SBI_ERR_FAILURE			-1
54 #define	SBI_ERR_NOT_SUPPORTED		-2
55 #define	SBI_ERR_INVALID_PARAM		-3
56 #define	SBI_ERR_DENIED			-4
57 #define	SBI_ERR_INVALID_ADDRESS		-5
58 
59 /* SBI Base Extension */
60 #define	SBI_EXT_ID_BASE			0x10
61 #define	SBI_BASE_GET_SPEC_VERSION	0
62 #define	SBI_BASE_GET_IMPL_ID		1
63 #define	SBI_BASE_GET_IMPL_VERSION	2
64 #define	SBI_BASE_PROBE_EXTENSION	3
65 #define	SBI_BASE_GET_MVENDORID		4
66 #define	SBI_BASE_GET_MARCHID		5
67 #define	SBI_BASE_GET_MIMPID		6
68 
69 /* Hart State Management (HSM) Extension */
70 #define	SBI_EXT_ID_HSM			0x48534D
71 #define	SBI_HSM_HART_START		0
72 #define	SBI_HSM_HART_STOP		1
73 #define	SBI_HSM_HART_STATUS		2
74 #define	 SBI_HSM_STATUS_STARTED		0
75 #define	 SBI_HSM_STATUS_STOPPED		1
76 #define	 SBI_HSM_STATUS_START_PENDING	2
77 #define	 SBI_HSM_STATUS_STOP_PENDING	3
78 
79 /* System Reset Extension */
80 #define	SBI_EXT_ID_SRST			0x53525354
81 #define	SBI_SRST_RESET			0
82 #define	 SBI_SRST_RESET_SHUTDOWN	0
83 #define	 SBI_SRST_RESET_COLD_REBOOT	1
84 #define	 SBI_SRST_RESET_WARM_REBOOT	2
85 
86 /* Legacy Extensions */
87 #define	SBI_SET_TIMER			0
88 #define	SBI_CONSOLE_PUTCHAR		1
89 #define	SBI_CONSOLE_GETCHAR		2
90 #define	SBI_CLEAR_IPI			3
91 #define	SBI_SEND_IPI			4
92 #define	SBI_REMOTE_FENCE_I		5
93 #define	SBI_REMOTE_SFENCE_VMA		6
94 #define	SBI_REMOTE_SFENCE_VMA_ASID	7
95 #define	SBI_SHUTDOWN			8
96 
97 #define	SBI_CALL0(e, f)			SBI_CALL4(e, f, 0, 0, 0, 0)
98 #define	SBI_CALL1(e, f, p1)		SBI_CALL4(e, f, p1, 0, 0, 0)
99 #define	SBI_CALL2(e, f, p1, p2)		SBI_CALL4(e, f, p1, p2, 0, 0)
100 #define	SBI_CALL3(e, f, p1, p2, p3)	SBI_CALL4(e, f, p1, p2, p3, 0)
101 #define	SBI_CALL4(e, f, p1, p2, p3, p4)	sbi_call(e, f, p1, p2, p3, p4)
102 
103 /*
104  * Documentation available at
105  * https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc
106  */
107 
108 struct sbi_ret {
109 	long error;
110 	long value;
111 };
112 
113 static __inline struct sbi_ret
sbi_call(uint64_t arg7,uint64_t arg6,uint64_t arg0,uint64_t arg1,uint64_t arg2,uint64_t arg3)114 sbi_call(uint64_t arg7, uint64_t arg6, uint64_t arg0, uint64_t arg1,
115     uint64_t arg2, uint64_t arg3)
116 {
117 	struct sbi_ret ret;
118 
119 	register uintptr_t a0 __asm ("a0") = (uintptr_t)(arg0);
120 	register uintptr_t a1 __asm ("a1") = (uintptr_t)(arg1);
121 	register uintptr_t a2 __asm ("a2") = (uintptr_t)(arg2);
122 	register uintptr_t a3 __asm ("a3") = (uintptr_t)(arg3);
123 	register uintptr_t a6 __asm ("a6") = (uintptr_t)(arg6);
124 	register uintptr_t a7 __asm ("a7") = (uintptr_t)(arg7);
125 
126 	__asm volatile(			\
127 		"ecall"				\
128 		:"+r"(a0), "+r"(a1)		\
129 		:"r"(a2), "r"(a3), "r"(a6), "r"(a7)	\
130 		:"memory");
131 
132 	ret.error = a0;
133 	ret.value = a1;
134 	return (ret);
135 }
136 
137 /* Base extension functions and variables. */
138 extern u_long sbi_spec_version;
139 extern u_long sbi_impl_id;
140 extern u_long sbi_impl_version;
141 
142 static __inline u_int
sbi_get_mvendorid(void)143 sbi_get_mvendorid(void)
144 {
145 	return (SBI_CALL0(SBI_EXT_ID_BASE, SBI_BASE_GET_MVENDORID).value);
146 }
147 
148 
149 static __inline u_long
sbi_get_marchid(void)150 sbi_get_marchid(void)
151 {
152 	return (SBI_CALL0(SBI_EXT_ID_BASE, SBI_BASE_GET_MARCHID).value);
153 }
154 
155 static __inline u_long
sbi_get_mimpid(void)156 sbi_get_mimpid(void)
157 {
158 	return (SBI_CALL0(SBI_EXT_ID_BASE, SBI_BASE_GET_MIMPID).value);
159 }
160 
161 static __inline long
sbi_probe_extension(long id)162 sbi_probe_extension(long id)
163 {
164 	return (SBI_CALL1(SBI_EXT_ID_BASE, SBI_BASE_PROBE_EXTENSION, id).value);
165 }
166 
167 /* Hart State Management extension functions. */
168 
169 /*
170  * Start execution on the specified hart at physical address start_addr. The
171  * register a0 will contain the hart's ID, and a1 will contain the value of
172  * priv.
173  */
174 int sbi_hsm_hart_start(u_long hart, u_long start_addr, u_long priv);
175 
176 /*
177  * Stop execution on the current hart. Interrupts should be disabled, or this
178  * function may return.
179  */
180 void sbi_hsm_hart_stop(void);
181 
182 /*
183  * Get the execution status of the specified hart. The status will be one of:
184  *  - SBI_HSM_STATUS_STARTED
185  *  - SBI_HSM_STATUS_STOPPED
186  *  - SBI_HSM_STATUS_START_PENDING
187  *  - SBI_HSM_STATUS_STOP_PENDING
188  */
189 int sbi_hsm_hart_status(u_long hart);
190 
191 /* Legacy extension functions. */
192 static __inline void
sbi_console_putchar(int ch)193 sbi_console_putchar(int ch)
194 {
195 
196 	(void)SBI_CALL1(SBI_CONSOLE_PUTCHAR, 0, ch);
197 }
198 
199 static __inline int
sbi_console_getchar(void)200 sbi_console_getchar(void)
201 {
202 
203 	/*
204 	 * XXX: The "error" is returned here because legacy SBI functions
205 	 * continue to return their value in a0.
206 	 */
207 	return (SBI_CALL0(SBI_CONSOLE_GETCHAR, 0).error);
208 }
209 
210 static __inline void
sbi_set_timer(uint64_t val)211 sbi_set_timer(uint64_t val)
212 {
213 
214 	(void)SBI_CALL1(SBI_SET_TIMER, 0, val);
215 }
216 
217 static __inline void
sbi_shutdown(void)218 sbi_shutdown(void)
219 {
220 
221 	(void)SBI_CALL0(SBI_SHUTDOWN, 0);
222 }
223 
224 static __inline void
sbi_clear_ipi(void)225 sbi_clear_ipi(void)
226 {
227 
228 	(void)SBI_CALL0(SBI_CLEAR_IPI, 0);
229 }
230 
231 static __inline void
sbi_send_ipi(const unsigned long * hart_mask)232 sbi_send_ipi(const unsigned long *hart_mask)
233 {
234 
235 	(void)SBI_CALL1(SBI_SEND_IPI, 0, (uint64_t)hart_mask);
236 }
237 
238 static __inline void
sbi_remote_fence_i(const unsigned long * hart_mask)239 sbi_remote_fence_i(const unsigned long *hart_mask)
240 {
241 
242 	(void)SBI_CALL1(SBI_REMOTE_FENCE_I, 0, (uint64_t)hart_mask);
243 }
244 
245 static __inline void
sbi_remote_sfence_vma(const unsigned long * hart_mask,unsigned long start,unsigned long size)246 sbi_remote_sfence_vma(const unsigned long *hart_mask,
247     unsigned long start, unsigned long size)
248 {
249 
250 	(void)SBI_CALL3(SBI_REMOTE_SFENCE_VMA, 0, (uint64_t)hart_mask, start,
251 	    size);
252 }
253 
254 static __inline void
sbi_remote_sfence_vma_asid(const unsigned long * hart_mask,unsigned long start,unsigned long size,unsigned long asid)255 sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
256     unsigned long start, unsigned long size,
257     unsigned long asid)
258 {
259 
260 	(void)SBI_CALL4(SBI_REMOTE_SFENCE_VMA_ASID, 0, (uint64_t)hart_mask,
261 	    start, size, asid);
262 }
263 
264 void sbi_print_version(void);
265 void sbi_init(void);
266 
267 #endif /* !_MACHINE_SBI_H_ */
268