1 /* $OpenBSD: pte.h,v 1.2 2008/06/26 05:42:13 ray Exp $ */ 2 /* $NetBSD: pte.h,v 1.11 2006/03/04 01:55:03 uwe Exp $ */ 3 4 /*- 5 * Copyright (c) 2002 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by UCHIYAMA Yasushi. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #ifndef _SH_PTE_H_ 34 #define _SH_PTE_H_ 35 36 /* 37 * OpenBSD/sh PTE format. 38 * 39 * [Hardware bit] 40 * SH3 41 * PPN V PR SZ C D SH 42 * [28:10][8][6:5][4][3][2][1] 43 * 44 * SH4 45 * V SZ PR SZ C D SH WT 46 * [28:10][8][7][6:5][4][3][2][1][0] 47 * 48 * [Software bit] 49 * [31] - PMAP_WIRED bit (not hardware wired entry) 50 * [11:9] - SH4 PCMCIA Assistant bit. (space attribute bit only) 51 */ 52 53 /* 54 * Hardware bits 55 */ 56 #define PG_PPN 0x1ffff000 /* Physical page number mask */ 57 #define PG_V 0x00000100 /* Valid */ 58 #define PG_PR_MASK 0x00000060 /* Page protection mask */ 59 #define PG_PR_URW 0x00000060 /* kernel/user read/write */ 60 #define PG_PR_URO 0x00000040 /* kernel/user read only */ 61 #define PG_PR_KRW 0x00000020 /* kernel read/write */ 62 #define PG_PR_KRO 0x00000000 /* kernel read only */ 63 #define PG_4K 0x00000010 /* page size 4KB */ 64 #define PG_C 0x00000008 /* Cacheable */ 65 #define PG_D 0x00000004 /* Dirty */ 66 #define PG_SH 0x00000002 /* Share status */ 67 #define PG_WT 0x00000001 /* Write-through (SH4 only) */ 68 69 #define PG_HW_BITS 0x1ffff17e /* [28:12][8][6:1] */ 70 71 /* 72 * Software bits 73 */ 74 #define _PG_WIRED 0x80000000 75 76 /* SH4 PCMCIA MMU support bits */ 77 /* PTEA SA (Space Attribute bit) */ 78 #define _PG_PCMCIA 0x00000e00 /* [11:9] */ 79 #define _PG_PCMCIA_SHIFT 9 80 #define _PG_PCMCIA_NONE 0x00000000 /* Non PCMCIA space */ 81 #define _PG_PCMCIA_IO 0x00000200 /* IOIS16 signal */ 82 #define _PG_PCMCIA_IO8 0x00000400 /* 8 bit I/O */ 83 #define _PG_PCMCIA_IO16 0x00000600 /* 16 bit I/O */ 84 #define _PG_PCMCIA_MEM8 0x00000800 /* 8 bit common memory */ 85 #define _PG_PCMCIA_MEM16 0x00000a00 /* 16 bit common memory */ 86 #define _PG_PCMCIA_ATTR8 0x00000c00 /* 8 bit attribute */ 87 #define _PG_PCMCIA_ATTR16 0x00000e00 /* 16 bit attribute */ 88 89 #ifndef _LOCORE 90 typedef uint32_t pt_entry_t; 91 #endif /* _LOCORE */ 92 #endif /* !_SH_PTE_H_ */ 93