Home
last modified time | relevance | path

Searched defs:__cacheline_aligned (Results 1 – 25 of 159) sorted by relevance

1234567

/dports/misc/rump/buildrump.sh-b914579/src/sys/kern/
H A Dsubr_xcall.c107 static xc_state_t xc_low_pri __cacheline_aligned; variable
108 static uint64_t xc_tailp __cacheline_aligned; variable
111 static xc_state_t xc_high_pri __cacheline_aligned; variable
112 static void * xc_sih __cacheline_aligned; variable
115 static struct evcnt xc_unicast_ev __cacheline_aligned; variable
116 static struct evcnt xc_broadcast_ev __cacheline_aligned; variable
H A Dsubr_pserialize.c62 static u_int psz_work_todo __cacheline_aligned; variable
63 static kmutex_t psz_lock __cacheline_aligned; variable
64 static struct evcnt psz_ev_excl __cacheline_aligned; variable
H A Dvfs_vnode.c212 u_int numvnodes __cacheline_aligned; variable
220 static vnodelst_t vnode_free_list __cacheline_aligned; variable
221 static vnodelst_t vnode_hold_list __cacheline_aligned; variable
222 static kcondvar_t vdrain_cv __cacheline_aligned; variable
224 static vnodelst_t vrele_list __cacheline_aligned; variable
225 static kmutex_t vrele_lock __cacheline_aligned; variable
226 static kcondvar_t vrele_cv __cacheline_aligned; variable
227 static lwp_t * vrele_lwp __cacheline_aligned; variable
228 static int vrele_pending __cacheline_aligned; variable
229 static int vrele_gen __cacheline_aligned; variable
[all …]
H A Dsubr_percpu.c59 static krwlock_t percpu_swap_lock __cacheline_aligned; variable
60 static kmutex_t percpu_allocation_lock __cacheline_aligned; variable
61 static vmem_t * percpu_offset_arena __cacheline_aligned; variable
62 static unsigned int percpu_nextoff __cacheline_aligned; variable
H A Dkern_synch.c130 kcondvar_t lbolt __cacheline_aligned; variable
132 u_int sched_pstats_ticks __cacheline_aligned; variable
135 static struct evcnt kpreempt_ev_crit __cacheline_aligned; variable
136 static struct evcnt kpreempt_ev_klock __cacheline_aligned; variable
137 static struct evcnt kpreempt_ev_immed __cacheline_aligned; variable
H A Dsysv_shm.c92 int shm_nused __cacheline_aligned; variable
95 static kmutex_t shm_lock __cacheline_aligned; variable
96 static kcondvar_t * shm_cv __cacheline_aligned; variable
97 static int shm_last_free __cacheline_aligned; variable
98 static size_t shm_committed __cacheline_aligned; variable
/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/
H A Dcache.h23 #define __cacheline_aligned macro
31 #define __cacheline_aligned \ macro
/dports/misc/rump/buildrump.sh-b914579/src/sys/arch/x86/x86/
H A Dpmap_tlb.c83 static pmap_tlb_packet_t pmap_tlb_packet __cacheline_aligned; variable
84 static volatile u_int pmap_tlb_pendcount __cacheline_aligned; variable
85 static volatile u_int pmap_tlb_gen __cacheline_aligned; variable
86 static struct evcnt pmap_tlb_evcnt __cacheline_aligned; variable
/dports/misc/rump/buildrump.sh-b914579/src/sys/net/npf/
H A Dnpf_conf.c72 static npf_config_t * npf_config __cacheline_aligned; variable
73 static kmutex_t npf_config_lock __cacheline_aligned; variable
74 static pserialize_t npf_config_psz __cacheline_aligned; variable
/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/h8300/include/asm/
H A Dcache.h9 #define __cacheline_aligned macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/h8300/include/asm/
H A Dcache.h9 #define __cacheline_aligned macro
/dports/multimedia/libv4l/linux-5.13-rc2/arch/h8300/include/asm/
H A Dcache.h9 #define __cacheline_aligned macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/hexagon/include/asm/
H A Dcache.h17 #define __cacheline_aligned __aligned(L1_CACHE_BYTES) macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/hexagon/include/asm/
H A Dcache.h17 #define __cacheline_aligned __aligned(L1_CACHE_BYTES) macro
/dports/multimedia/libv4l/linux-5.13-rc2/arch/hexagon/include/asm/
H A Dcache.h17 #define __cacheline_aligned __aligned(L1_CACHE_BYTES) macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/powerpc/include/asm/
H A Dcache.h36 #define __cacheline_aligned __attribute__((__aligned__(L1_CACHE_BYTES))) macro
38 #define __cacheline_aligned \ macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/powerpc/include/asm/
H A Dcache.h36 #define __cacheline_aligned __attribute__((__aligned__(L1_CACHE_BYTES))) macro
38 #define __cacheline_aligned \ macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/powerpc/include/asm/
H A Dcache.h36 #define __cacheline_aligned __attribute__((__aligned__(L1_CACHE_BYTES))) macro
38 #define __cacheline_aligned \ macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/powerpc/include/asm/
H A Dcache.h36 #define __cacheline_aligned __attribute__((__aligned__(L1_CACHE_BYTES))) macro
38 #define __cacheline_aligned \ macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/powerpc/include/asm/
H A Dcache.h36 #define __cacheline_aligned __attribute__((__aligned__(L1_CACHE_BYTES))) macro
38 #define __cacheline_aligned \ macro
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/powerpc/include/asm/
H A Dcache.h36 #define __cacheline_aligned __attribute__((__aligned__(L1_CACHE_BYTES))) macro
38 #define __cacheline_aligned \ macro
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/powerpc/include/asm/
H A Dcache.h36 #define __cacheline_aligned __attribute__((__aligned__(L1_CACHE_BYTES))) macro
38 #define __cacheline_aligned \ macro
/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/powerpc/include/asm/
H A Dcache.h41 #define __cacheline_aligned __attribute__((__aligned__(L1_CACHE_BYTES))) macro
43 #define __cacheline_aligned \ macro
/dports/multimedia/libv4l/linux-5.13-rc2/arch/nios2/include/asm/
H A Dcache.h23 #define __cacheline_aligned macro
/dports/lang/gnatdroid-sysroot-x86/android-19-x86/usr/include/linux/
H A Dcache.h39 #define __cacheline_aligned __attribute__((__aligned__(SMP_CACHE_BYTES), __section__(".data.cac… macro

1234567