xref: /openbsd/sys/arch/sh/sh/mmu.c (revision 3cfca013)
1 /*	$OpenBSD: mmu.c,v 1.4 2010/06/02 05:35:17 jasper Exp $	*/
2 /*	$NetBSD: mmu.c,v 1.15 2006/02/12 02:30:55 uwe Exp $	*/
3 
4 /*-
5  * Copyright (c) 2002 The NetBSD Foundation, Inc.
6  * All rights reserved.
7  *
8  * This code is derived from software contributed to The NetBSD Foundation
9  * by UCHIYAMA Yasushi.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30  * POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 
36 #include <sh/mmu.h>
37 #include <sh/mmu_sh3.h>
38 #include <sh/mmu_sh4.h>
39 
40 #if defined(SH3) && defined(SH4)
41 void (*__sh_mmu_start)(void);
42 void (*__sh_tlb_invalidate_addr)(int, vaddr_t);
43 void (*__sh_tlb_invalidate_asid)(int);
44 void (*__sh_tlb_invalidate_all)(void);
45 void (*__sh_tlb_update)(int, vaddr_t, uint32_t);
46 #endif /* SH3 && SH4 */
47 
48 void
sh_mmu_init(void)49 sh_mmu_init(void)
50 {
51 	/*
52 	 * Assign function hooks but only if both SH3 and SH4 are defined.
53 	 * They are called directly otherwise.  See <sh3/mmu.h>.
54 	 */
55 #if defined(SH3) && defined(SH4)
56 	if (CPU_IS_SH3) {
57 		__sh_mmu_start = sh3_mmu_start;
58 		__sh_tlb_invalidate_addr = sh3_tlb_invalidate_addr;
59 		__sh_tlb_invalidate_asid = sh3_tlb_invalidate_asid;
60 		__sh_tlb_invalidate_all = sh3_tlb_invalidate_all;
61 		__sh_tlb_update = sh3_tlb_update;
62 	}
63 	else if (CPU_IS_SH4) {
64 		__sh_mmu_start = sh4_mmu_start;
65 		__sh_tlb_invalidate_addr = sh4_tlb_invalidate_addr;
66 		__sh_tlb_invalidate_asid = sh4_tlb_invalidate_asid;
67 		__sh_tlb_invalidate_all = sh4_tlb_invalidate_all;
68 		__sh_tlb_update = sh4_tlb_update;
69 	}
70 #endif /* SH3 && SH4 */
71 }
72 
73 void
sh_mmu_information(void)74 sh_mmu_information(void)
75 {
76 #ifdef DEBUG
77 	uint32_t r;
78 #ifdef SH3
79 	if (CPU_IS_SH3) {
80 		printf("cpu0: 4-way set-associative 128 TLB entries\n");
81 		r = _reg_read_4(SH3_MMUCR);
82 		printf("cpu0: %s mode, %s virtual storage mode\n",
83 		    r & SH3_MMUCR_IX ? "ASID+VPN" : "VPN",
84 		    r & SH3_MMUCR_SV ? "single" : "multiple");
85 	}
86 #endif
87 #ifdef SH4
88 	if (CPU_IS_SH4) {
89 		unsigned int urb;
90 		printf("cpu0: fully-associative 4 ITLB, 64 UTLB entries\n");
91 		r = _reg_read_4(SH4_MMUCR);
92 		urb = (r & SH4_MMUCR_URB_MASK) >> SH4_MMUCR_URB_SHIFT;
93 		printf("cpu0: %s virtual storage mode, SQ access: kernel%s, ",
94 		    r & SH3_MMUCR_SV ? "single" : "multiple",
95 		    r & SH4_MMUCR_SQMD ? "" : "/user");
96 		printf("wired %d\n",
97 		    urb ? 64 - urb : 0);
98 	}
99 #endif
100 #endif /* DEBUG */
101 }
102 
103 void
sh_tlb_set_asid(int asid)104 sh_tlb_set_asid(int asid)
105 {
106 	_reg_write_4(SH_(PTEH), asid);
107 }
108