xref: /netbsd/sys/arch/mips/atheros/include/platform.h (revision f95dd4e8)
1 /* $NetBSD: platform.h,v 1.2 2011/07/10 06:26:02 matt Exp $ */
2 /*
3  * Copyright (c) 2006 Urbana-Champaign Independent Media Center.
4  * Copyright (c) 2006 Garrett D'Amore.
5  * All rights reserved.
6  *
7  * This code was written by Garrett D'Amore for the Champaign-Urbana
8  * Community Wireless Network Project.
9  *
10  * Redistribution and use in source and binary forms, with or
11  * without modification, are permitted provided that the following
12  * conditions are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above
16  *    copyright notice, this list of conditions and the following
17  *    disclaimer in the documentation and/or other materials provided
18  *    with the distribution.
19  * 3. All advertising materials mentioning features or use of this
20  *    software must display the following acknowledgements:
21  *      This product includes software developed by the Urbana-Champaign
22  *      Independent Media Center.
23  *	This product includes software developed by Garrett D'Amore.
24  * 4. Urbana-Champaign Independent Media Center's name and Garrett
25  *    D'Amore's name may not be used to endorse or promote products
26  *    derived from this software without specific prior written permission.
27  *
28  * THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
29  * MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
30  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
31  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
32  * ARE DISCLAIMED.  IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
33  * MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
34  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
35  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
36  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
37  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
38  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
39  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
40  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41  */
42 
43 #ifndef	_MIPS_ATHEROS_PLATFORM_H_
44 #define	_MIPS_ATHEROS_PLATFORM_H_
45 
46 #include <sys/param.h>
47 #include <sys/bus.h>
48 
49 struct atheros_device {
50 	const char	*adv_name;
51 	bus_addr_t	adv_addr;
52 	bus_size_t	adv_size;
53 	u_int		adv_cirq;
54 	u_int		adv_mirq;
55 	uint32_t	adv_mask;
56 	uint32_t	adv_reset;
57 	uint32_t	adv_enable;
58 };
59 
60 /*
61  * Board specific things.
62  */
63 struct atheros_boarddata;
64 struct atheros_config;
65 
66 struct atheros_intrsw {
67 	void (*aisw_init)(void);
68 	void *(*aisw_cpu_establish)(int, int (*)(void *), void *);
69 	void (*aisw_cpu_disestablish)(void *);
70 	void *(*aisw_misc_establish)(int, int (*)(void *), void *);
71 	void (*aisw_misc_disestablish)(void *);
72 	void (*aisw_cpuintr)(int, vaddr_t, uint32_t);
73 	void (*aisw_iointr)(int, vaddr_t, uint32_t);
74 };
75 
76 struct arfreqs {
77 	uint32_t freq_bus;
78 	uint32_t freq_cpu;
79 	uint32_t freq_mem;
80 	uint32_t freq_pll;
81 	uint32_t freq_ref;
82 	uint32_t freq_uart;
83 };
84 
85 struct atheros_platformsw {
86 	const struct atheros_intrsw *apsw_intrsw;
87 
88 	void (*apsw_intr_init)(void);
89 	const char * const * apsw_cpu_intrnames;
90 	const char * const * apsw_misc_intrnames;
91 	size_t apsw_cpu_nintrs;
92 	size_t apsw_misc_nintrs;
93 	u_int apsw_cpuirq_misc;
94 
95 	bus_addr_t apsw_misc_intmask;
96 	bus_addr_t apsw_misc_intstat;
97 
98 	const struct ipl_sr_map *apsw_ipl_sr_map;
99 
100 	/*
101 	 * CPU specific routines.
102 	 */
103 	size_t (*apsw_get_memsize)(void);
104 	void (*apsw_wdog_reload)(uint32_t);
105 	void (*apsw_bus_init)(void);
106 	void (*apsw_get_freqs)(struct arfreqs *);
107 	void (*apsw_device_register)(device_t, void *);
108 	int (*apsw_enable_device)(const struct atheros_device *);
109 	void (*apsw_reset)(void);
110 	const struct atheros_device *apsw_devices;
111 
112 	/*
113 	 * Early console support.
114 	 */
115 	bus_addr_t apsw_uart0_base;
116 	bus_addr_t apsw_revision_id_addr;
117 };
118 
119 /*
120  * Board specific data.
121  */
122 struct ar531x_config;
123 struct ar531x_boarddata;
124 struct atheros_boardsw {
125 	const struct ar531x_boarddata *(*absw_get_board_info)(void);
126 	const void *(*absw_get_radio_info)(void);
127 };
128 
129 #ifdef _KERNEL
130 void	atheros_consinit(void);
131 void	atheros_early_consinit(void);
132 
133 void	atheros_set_platformsw(void);
134 const char *
135 	atheros_get_cpuname(void);
136 u_int	atheros_get_chipid(void);
137 
138 uint32_t atheros_get_uart_freq(void);
139 uint32_t atheros_get_bus_freq(void);
140 uint32_t atheros_get_cpu_freq(void);
141 uint32_t atheros_get_mem_freq(void);
142 
143 const struct ar531x_boarddata *
144 	atheros_get_board_info(void);
145 int 	atheros_get_board_config(struct ar531x_config *);
146 
147 extern const struct atheros_boardsw ar5312_boardsw;
148 extern const struct atheros_boardsw ar5315_boardsw;
149 
150 extern const struct atheros_platformsw ar5312_platformsw;
151 extern const struct atheros_platformsw ar5315_platformsw;
152 extern const struct atheros_platformsw ar7100_platformsw;
153 extern const struct atheros_platformsw ar9344_platformsw;
154 extern const struct atheros_platformsw *platformsw;
155 
156 extern const struct atheros_intrsw atheros_intrsw;
157 
158 static inline uint32_t
atheros_get_memsize(void)159 atheros_get_memsize(void)
160 {
161 	return (*platformsw->apsw_get_memsize)();
162 }
163 
164 static inline void
atheros_wdog_reload(uint32_t period)165 atheros_wdog_reload(uint32_t period)
166 {
167 	(*platformsw->apsw_wdog_reload)(period);
168 }
169 
170 static inline void
atheros_bus_init(void)171 atheros_bus_init(void)
172 {
173 	return (*platformsw->apsw_bus_init)();
174 }
175 
176 static inline void
atheros_intr_init(void)177 atheros_intr_init(void)
178 {
179 	(*platformsw->apsw_intrsw->aisw_init)();
180 }
181 
182 static inline void *
atheros_cpu_intr_establish(int irq,int (* func)(void *),void * arg)183 atheros_cpu_intr_establish(int irq, int (*func)(void *), void *arg)
184 {
185 	return (*platformsw->apsw_intrsw->aisw_cpu_establish)(irq, func, arg);
186 }
187 
188 static inline void
atheros_cpu_intr_disestablish(void * cookie)189 atheros_cpu_intr_disestablish(void *cookie)
190 {
191 	(*platformsw->apsw_intrsw->aisw_cpu_disestablish)(cookie);
192 }
193 
194 static inline void *
atheros_misc_intr_establish(int irq,int (* func)(void *),void * arg)195 atheros_misc_intr_establish(int irq, int (*func)(void *), void *arg)
196 {
197 	return (*platformsw->apsw_intrsw->aisw_misc_establish)(irq, func, arg);
198 }
199 
200 static inline void
atheros_misc_intr_disestablish(void * cookie)201 atheros_misc_intr_disestablish(void *cookie)
202 {
203 	(*platformsw->apsw_intrsw->aisw_misc_disestablish)(cookie);
204 }
205 
206 static inline int
atheros_enable_device(const struct atheros_device * adv)207 atheros_enable_device(const struct atheros_device *adv)
208 {
209 	return (*platformsw->apsw_enable_device)(adv);
210 }
211 
212 static inline void
atheros_reset(void)213 atheros_reset(void)
214 {
215 	return (*platformsw->apsw_reset)();
216 }
217 
218 #endif /* _KERNEL */
219 
220 #endif /* _MIPS_ATHEROS_PLATFORM_H_ */
221