1 /* $OpenBSD: agp_amd.c,v 1.24 2024/05/24 06:02:53 jsg Exp $ */
2 /* $NetBSD: agp_amd.c,v 1.6 2001/10/06 02:48:50 thorpej Exp $ */
3
4 /*-
5 * Copyright (c) 2000 Doug Rabson
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * $FreeBSD: src/sys/pci/agp_amd.c,v 1.6 2001/07/05 21:28:46 jhb Exp $
30 */
31
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/malloc.h>
35 #include <sys/device.h>
36
37 #include <dev/pci/pcivar.h>
38 #include <dev/pci/pcireg.h>
39 #include <dev/pci/agpvar.h>
40 #include <dev/pci/agpreg.h>
41
42 #include <dev/pci/pcidevs.h>
43
44 #define READ2(off) bus_space_read_2(asc->iot, asc->ioh, off)
45 #define READ4(off) bus_space_read_4(asc->iot, asc->ioh, off)
46 #define WRITE2(off,v) bus_space_write_2(asc->iot, asc->ioh, off, v)
47 #define WRITE4(off,v) bus_space_write_4(asc->iot, asc->ioh, off, v)
48
49 struct agp_amd_gatt {
50 bus_dmamap_t ag_dmamap;
51 bus_dma_segment_t ag_dmaseg;
52 int ag_nseg;
53 u_int32_t ag_entries;
54 u_int32_t *ag_vdir; /* virtual address of page dir */
55 bus_addr_t ag_pdir; /* bus address of page dir */
56 u_int32_t *ag_virtual; /* virtual address of gatt */
57 bus_addr_t ag_physical; /* bus address of gatt */
58 size_t ag_size;
59 };
60
61 struct agp_amd_softc {
62 struct device dev;
63 struct agp_softc *agpdev;
64 struct agp_amd_gatt *gatt;
65 pci_chipset_tag_t asc_pc;
66 pcitag_t asc_tag;
67 bus_space_handle_t ioh;
68 bus_space_tag_t iot;
69 bus_addr_t asc_apaddr;
70 bus_size_t asc_apsize;
71 pcireg_t asc_apctrl;
72 pcireg_t asc_modectrl;
73 u_int16_t asc_status;
74 };
75
76 void agp_amd_attach(struct device *, struct device *, void *);
77 int agp_amd_activate(struct device *, int);
78 void agp_amd_save(struct agp_amd_softc *);
79 void agp_amd_restore(struct agp_amd_softc *);
80 int agp_amd_probe(struct device *, void *, void *);
81 bus_size_t agp_amd_get_aperture(void *);
82 struct agp_amd_gatt *agp_amd_alloc_gatt(bus_dma_tag_t, bus_size_t);
83 int agp_amd_set_aperture(void *, bus_size_t);
84 void agp_amd_bind_page(void *, bus_size_t, paddr_t, int);
85 void agp_amd_unbind_page(void *, bus_size_t);
86 void agp_amd_flush_tlb(void *);
87
88 const struct cfattach amdagp_ca = {
89 sizeof(struct agp_amd_softc), agp_amd_probe, agp_amd_attach, NULL,
90 agp_amd_activate
91 };
92
93 struct cfdriver amdagp_cd = {
94 NULL, "amdagp", DV_DULL
95 };
96
97 const struct agp_methods agp_amd_methods = {
98 agp_amd_bind_page,
99 agp_amd_unbind_page,
100 agp_amd_flush_tlb,
101 };
102
103
104 struct agp_amd_gatt *
agp_amd_alloc_gatt(bus_dma_tag_t dmat,bus_size_t apsize)105 agp_amd_alloc_gatt(bus_dma_tag_t dmat, bus_size_t apsize)
106 {
107 bus_size_t entries = apsize >> AGP_PAGE_SHIFT;
108 struct agp_amd_gatt *gatt;
109 int i, npages;
110 caddr_t vdir;
111
112 gatt = malloc(sizeof(struct agp_amd_gatt), M_AGP, M_NOWAIT);
113 if (!gatt)
114 return (0);
115 gatt->ag_size = AGP_PAGE_SIZE + entries * sizeof(u_int32_t);
116
117 if (agp_alloc_dmamem(dmat, gatt->ag_size, &gatt->ag_dmamap,
118 &gatt->ag_pdir, &gatt->ag_dmaseg) != 0) {
119 printf("failed to allocate GATT\n");
120 free(gatt, M_AGP, sizeof *gatt);
121 return (NULL);
122 }
123
124 if (bus_dmamem_map(dmat, &gatt->ag_dmaseg, 1, gatt->ag_size,
125 &vdir, BUS_DMA_NOWAIT) != 0) {
126 printf("failed to map GATT\n");
127 agp_free_dmamem(dmat, gatt->ag_size, gatt->ag_dmamap,
128 &gatt->ag_dmaseg);
129 free(gatt, M_AGP, sizeof *gatt);
130 return (NULL);
131 }
132
133 gatt->ag_vdir = (u_int32_t *)vdir;
134 gatt->ag_entries = entries;
135 gatt->ag_virtual = (u_int32_t *)(vdir + AGP_PAGE_SIZE);
136 gatt->ag_physical = gatt->ag_pdir + AGP_PAGE_SIZE;
137
138 /*
139 * Map the pages of the GATT into the page directory.
140 */
141 npages = ((gatt->ag_size - 1) >> AGP_PAGE_SHIFT);
142
143 for (i = 0; i < npages; i++)
144 gatt->ag_vdir[i] = (gatt->ag_physical + i * AGP_PAGE_SIZE) | 1;
145
146 /*
147 * Make sure the chipset can see everything.
148 */
149 agp_flush_cache();
150
151 return (gatt);
152 }
153
154 int
agp_amd_probe(struct device * parent,void * match,void * aux)155 agp_amd_probe(struct device *parent, void *match, void *aux)
156 {
157 struct agp_attach_args *aa = aux;
158 struct pci_attach_args *pa = aa->aa_pa;
159
160 /* Must be a pchb */
161 if (agpbus_probe(aa) == 1 && PCI_VENDOR(pa->pa_id) == PCI_VENDOR_AMD &&
162 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_SC751_SC ||
163 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_761_PCHB ||
164 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_762_PCHB))
165 return (1);
166 return (0);
167 }
168
169 void
agp_amd_attach(struct device * parent,struct device * self,void * aux)170 agp_amd_attach(struct device *parent, struct device *self, void *aux)
171 {
172 struct agp_amd_softc *asc = (struct agp_amd_softc *)self;
173 struct agp_attach_args *aa = aux;
174 struct pci_attach_args *pa = aa->aa_pa;
175 struct agp_amd_gatt *gatt;
176 pcireg_t reg;
177 int error;
178
179 asc->asc_pc = pa->pa_pc;
180 asc->asc_tag = pa->pa_tag;
181
182 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, AGP_APBASE,
183 PCI_MAPREG_TYPE_MEM, &asc->asc_apaddr, NULL, NULL) != 0) {
184 printf(": can't get aperture info\n");
185 return;
186 }
187
188 error = pci_mapreg_map(pa, AGP_AMD751_REGISTERS,
189 PCI_MAPREG_TYPE_MEM, 0, &asc->iot, &asc->ioh, NULL, NULL, 0);
190 if (error != 0) {
191 printf("can't map AGP registers\n");
192 return;
193 }
194
195 asc->asc_apsize = agp_amd_get_aperture(asc);
196
197 for (;;) {
198 gatt = agp_amd_alloc_gatt(pa->pa_dmat, asc->asc_apsize);
199 if (gatt != NULL)
200 break;
201
202 /*
203 * almost certainly error allocating contiguous dma memory
204 * so reduce aperture so that the gatt size reduces.
205 */
206 asc->asc_apsize /= 2;
207 if (agp_amd_set_aperture(asc, asc->asc_apsize)) {
208 printf(": failed to set aperture\n");
209 return;
210 }
211 }
212 asc->gatt = gatt;
213
214 /* Install the gatt. */
215 WRITE4(AGP_AMD751_ATTBASE, gatt->ag_physical);
216
217 /* Enable synchronisation between host and agp. */
218 reg = pci_conf_read(asc->asc_pc, asc->asc_tag, AGP_AMD751_MODECTRL);
219 reg &= ~0x00ff00ff;
220 reg |= (AGP_AMD751_MODECTRL_SYNEN) | (AGP_AMD751_MODECTRL2_GPDCE << 16);
221 pci_conf_write(asc->asc_pc, asc->asc_tag, AGP_AMD751_MODECTRL, reg);
222 /* Enable the TLB and flush */
223 WRITE2(AGP_AMD751_STATUS,
224 READ2(AGP_AMD751_STATUS) | AGP_AMD751_STATUS_GCE);
225 agp_amd_flush_tlb(asc);
226
227 asc->agpdev = (struct agp_softc *)agp_attach_bus(pa, &agp_amd_methods,
228 asc->asc_apaddr, asc->asc_apsize, &asc->dev);
229 return;
230 }
231
232 int
agp_amd_activate(struct device * arg,int act)233 agp_amd_activate(struct device *arg, int act)
234 {
235 struct agp_amd_softc *asc = (struct agp_amd_softc *)arg;
236
237 switch (act) {
238 case DVACT_SUSPEND:
239 agp_amd_save(asc);
240 break;
241 case DVACT_RESUME:
242 agp_amd_restore(asc);
243 break;
244 }
245
246 return (0);
247 }
248
249 void
agp_amd_save(struct agp_amd_softc * asc)250 agp_amd_save(struct agp_amd_softc *asc)
251 {
252 asc->asc_apctrl = pci_conf_read(asc->asc_pc, asc->asc_tag,
253 AGP_AMD751_APCTRL);
254 asc->asc_modectrl = pci_conf_read(asc->asc_pc, asc->asc_tag,
255 AGP_AMD751_MODECTRL);
256 asc->asc_status = READ2(AGP_AMD751_STATUS);
257 }
258
259 void
agp_amd_restore(struct agp_amd_softc * asc)260 agp_amd_restore(struct agp_amd_softc *asc)
261 {
262
263 /* restore aperture size */
264 pci_conf_write(asc->asc_pc, asc->asc_tag, AGP_AMD751_APCTRL,
265 asc->asc_apctrl);
266
267 /* Install the gatt. */
268 WRITE4(AGP_AMD751_ATTBASE, asc->gatt->ag_physical);
269
270 /* Reenable synchronisation between host and agp. */
271 pci_conf_write(asc->asc_pc, asc->asc_tag, AGP_AMD751_MODECTRL,
272 asc->asc_modectrl);
273 /* Enable the TLB and flush */
274 WRITE2(AGP_AMD751_STATUS, asc->asc_status);
275 agp_amd_flush_tlb(asc);
276 }
277
278 bus_size_t
agp_amd_get_aperture(void * sc)279 agp_amd_get_aperture(void *sc)
280 {
281 struct agp_amd_softc *asc = sc;
282 int vas;
283
284 vas = (pci_conf_read(asc->asc_pc, asc->asc_tag,
285 AGP_AMD751_APCTRL) & 0x06);
286 vas >>= 1;
287 /*
288 * The aperture size is equal to 32M<<vas.
289 */
290 return ((32 * 1024 * 1024) << vas);
291 }
292
293 int
agp_amd_set_aperture(void * sc,bus_size_t aperture)294 agp_amd_set_aperture(void *sc, bus_size_t aperture)
295 {
296 struct agp_amd_softc *asc = sc;
297 int vas;
298 pcireg_t reg;
299
300 /*
301 * Check for a power of two and make sure its within the
302 * programmable range.
303 */
304 if (aperture & (aperture - 1)
305 || aperture < 32*1024*1024
306 || aperture > 2U*1024*1024*1024)
307 return (EINVAL);
308
309 vas = ffs(aperture / 32*1024*1024) - 1;
310
311 reg = pci_conf_read(asc->asc_pc, asc->asc_tag, AGP_AMD751_APCTRL);
312 reg = (reg & ~0x06) | (vas << 1);
313 pci_conf_write(asc->asc_pc, asc->asc_tag, AGP_AMD751_APCTRL, reg);
314
315 return (0);
316 }
317
318 void
agp_amd_bind_page(void * sc,bus_size_t offset,paddr_t physical,int flags)319 agp_amd_bind_page(void *sc, bus_size_t offset, paddr_t physical, int flags)
320 {
321 struct agp_amd_softc *asc = sc;
322
323 asc->gatt->ag_virtual[(offset - asc->asc_apaddr) >> AGP_PAGE_SHIFT] =
324 physical | 1;
325 }
326
327 void
agp_amd_unbind_page(void * sc,bus_size_t offset)328 agp_amd_unbind_page(void *sc, bus_size_t offset)
329 {
330 struct agp_amd_softc *asc = sc;
331
332 asc->gatt->ag_virtual[(offset - asc->asc_apaddr) >> AGP_PAGE_SHIFT] = 0;
333 }
334
335 void
agp_amd_flush_tlb(void * sc)336 agp_amd_flush_tlb(void *sc)
337 {
338 struct agp_amd_softc *asc = sc;
339
340 /* Set the cache invalidate bit and wait for the chipset to clear */
341 WRITE4(AGP_AMD751_TLBCTRL, 1);
342 do {
343 DELAY(1);
344 } while (READ4(AGP_AMD751_TLBCTRL));
345 }
346