1 /* $OpenBSD: aic6360.c,v 1.41 2024/09/04 07:54:52 mglocker Exp $ */
2 /* $NetBSD: aic6360.c,v 1.52 1996/12/10 21:27:51 thorpej Exp $ */
3
4 #ifdef DDB
5 #define integrate
6 #else
7 #define integrate static inline
8 #endif
9
10 /*
11 * Copyright (c) 1994, 1995, 1996 Charles Hannum. All rights reserved.
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
21 * 3. All advertising materials mentioning features or use of this software
22 * must display the following acknowledgement:
23 * This product includes software developed by Charles M. Hannum.
24 * 4. The name of the author may not be used to endorse or promote products
25 * derived from this software without specific prior written permission.
26 *
27 * Copyright (c) 1994 Jarle Greipsland
28 * All rights reserved.
29 *
30 * Redistribution and use in source and binary forms, with or without
31 * modification, are permitted provided that the following conditions
32 * are met:
33 * 1. Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * 2. Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in the
37 * documentation and/or other materials provided with the distribution.
38 * 3. The name of the author may not be used to endorse or promote products
39 * derived from this software without specific prior written permission.
40 *
41 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
42 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
43 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
44 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
45 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
46 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
47 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
48 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
49 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
50 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
51 * POSSIBILITY OF SUCH DAMAGE.
52 */
53
54 /*
55 * Acknowledgements: Many of the algorithms used in this driver are
56 * inspired by the work of Julian Elischer (julian@tfs.com) and
57 * Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million!
58 */
59
60 /* TODO list:
61 * 1) Get the DMA stuff working.
62 * 2) Get the iov/uio stuff working. Is this a good thing ???
63 * 3) Get the synch stuff working.
64 * 4) Rewrite it to use malloc for the acb structs instead of static alloc.?
65 */
66
67 /*
68 * A few customizable items:
69 */
70
71 /* Use doubleword transfers to/from SCSI chip. Note: This requires
72 * motherboard support. Basically, some motherboard chipsets are able to
73 * split a 32 bit I/O operation into two 16 bit I/O operations,
74 * transparently to the processor. This speeds up some things, notably long
75 * data transfers.
76 */
77 #define AIC_USE_DWORDS 0
78
79 /* Synchronous data transfers? */
80 #define AIC_USE_SYNCHRONOUS 0
81 #define AIC_SYNC_REQ_ACK_OFS 8
82
83 /* Wide data transfers? */
84 #define AIC_USE_WIDE 0
85 #define AIC_MAX_WIDTH 0
86
87 /* Max attempts made to transmit a message */
88 #define AIC_MSG_MAX_ATTEMPT 3 /* Not used now XXX */
89
90 /* Use DMA (else we do programmed I/O using string instructions) (not yet!)*/
91 #define AIC_USE_EISA_DMA 0
92 #define AIC_USE_ISA_DMA 0
93
94 /* How to behave on the (E)ISA bus when/if DMAing (on<<4) + off in us */
95 #define EISA_BRST_TIM ((15<<4) + 1) /* 15us on, 1us off */
96
97 /* Some spin loop parameters (essentially how long to wait some places)
98 * The problem(?) is that sometimes we expect either to be able to transmit a
99 * byte or to get a new one from the SCSI bus pretty soon. In order to avoid
100 * returning from the interrupt just to get yanked back for the next byte we
101 * may spin in the interrupt routine waiting for this byte to come. How long?
102 * This is really (SCSI) device and processor dependent. Tuneable, I guess.
103 */
104 #define AIC_MSGIN_SPIN 1 /* Spin upto ?ms for a new msg byte */
105 #define AIC_MSGOUT_SPIN 1
106
107 /* Include debug functions? At the end of this file there are a bunch of
108 * functions that will print out various information regarding queued SCSI
109 * commands, driver state and chip contents. You can call them from the
110 * kernel debugger. If you set AIC_DEBUG to 0 they are not included (the
111 * kernel uses less memory) but you lose the debugging facilities.
112 */
113 #ifndef SMALL_KERNEL
114 #define AIC_DEBUG 1
115 #endif
116
117 #define AIC_ABORT_TIMEOUT 2000 /* time to wait for abort */
118
119 /* End of customizable parameters */
120
121 #if AIC_USE_EISA_DMA || AIC_USE_ISA_DMA
122 #error "I said not yet! Start paying attention... grumble"
123 #endif
124
125 #include <sys/param.h>
126 #include <sys/systm.h>
127 #include <sys/kernel.h>
128 #include <sys/errno.h>
129 #include <sys/ioctl.h>
130 #include <sys/device.h>
131 #include <sys/buf.h>
132 #include <sys/queue.h>
133
134 #include <machine/bus.h>
135 #include <machine/intr.h>
136
137 #include <scsi/scsi_all.h>
138 #include <scsi/scsi_message.h>
139 #include <scsi/scsiconf.h>
140
141 #include <dev/isa/isavar.h>
142
143 #include <dev/ic/aic6360reg.h>
144 #include <dev/ic/aic6360var.h>
145
146 #ifndef DDB
147 #define db_enter() panic("should call debugger here (aic6360.c)")
148 #endif /* ! DDB */
149
150 #ifdef AIC_DEBUG
151 int aic_debug = 0x00; /* AIC_SHOWSTART|AIC_SHOWMISC|AIC_SHOWTRACE; */
152 #endif
153
154 void aic_init(struct aic_softc *);
155 void aic_done(struct aic_softc *, struct aic_acb *);
156 void aic_dequeue(struct aic_softc *, struct aic_acb *);
157 void aic_scsi_cmd(struct scsi_xfer *);
158 int aic_poll(struct aic_softc *, struct scsi_xfer *, int);
159 integrate void aic_sched_msgout(struct aic_softc *, u_char);
160 integrate void aic_setsync(struct aic_softc *, struct aic_tinfo *);
161 void aic_select(struct aic_softc *, struct aic_acb *);
162 void aic_timeout(void *);
163 void aic_sched(struct aic_softc *);
164 void aic_scsi_reset(struct aic_softc *);
165 void aic_reset(struct aic_softc *);
166 void aic_acb_free(void *, void *);
167 void *aic_acb_alloc(void *);
168 int aic_reselect(struct aic_softc *, int);
169 void aic_sense(struct aic_softc *, struct aic_acb *);
170 void aic_msgin(struct aic_softc *);
171 void aic_abort(struct aic_softc *, struct aic_acb *);
172 void aic_msgout(struct aic_softc *);
173 int aic_dataout_pio(struct aic_softc *, u_char *, int);
174 int aic_datain_pio(struct aic_softc *, u_char *, int);
175 #ifdef AIC_DEBUG
176 void aic_print_acb(struct aic_acb *);
177 void aic_dump_driver(struct aic_softc *);
178 void aic_dump6360(struct aic_softc *);
179 void aic_show_scsi_cmd(struct aic_acb *);
180 void aic_print_active_acb(void);
181 #endif
182
183 struct cfdriver aic_cd = {
184 NULL, "aic", DV_DULL
185 };
186
187 const struct scsi_adapter aic_switch = {
188 aic_scsi_cmd, NULL, NULL, NULL, NULL
189 };
190
191 /*
192 * Do the real search-for-device.
193 */
194 int
aic_find(bus_space_tag_t iot,bus_space_handle_t ioh)195 aic_find(bus_space_tag_t iot, bus_space_handle_t ioh)
196 {
197 char chip_id[sizeof(IDSTRING)]; /* For chips that support it */
198 int i;
199
200 /* Remove aic6360 from possible powerdown mode */
201 bus_space_write_1(iot, ioh, DMACNTRL0, 0);
202
203 /* Thanks to mark@aggregate.com for the new method for detecting
204 * whether the chip is present or not. Bonus: may also work for
205 * the AIC-6260!
206 */
207 AIC_TRACE(("aic: probing for aic-chip\n"));
208 /*
209 * Linux also init's the stack to 1-16 and then clears it,
210 * 6260's don't appear to have an ID reg - mpg
211 */
212 /* Push the sequence 0,1,..,15 on the stack */
213 #define STSIZE 16
214 bus_space_write_1(iot, ioh, DMACNTRL1, 0); /* Reset stack pointer */
215 for (i = 0; i < STSIZE; i++)
216 bus_space_write_1(iot, ioh, STACK, i);
217
218 /* See if we can pull out the same sequence */
219 bus_space_write_1(iot, ioh, DMACNTRL1, 0);
220 for (i = 0; i < STSIZE && bus_space_read_1(iot, ioh, STACK) == i; i++)
221 ;
222 if (i != STSIZE) {
223 AIC_START(("STACK futzed at %d.\n", i));
224 return (0);
225 }
226
227 /* See if we can pull the id string out of the ID register,
228 * now only used for informational purposes.
229 */
230 bzero(chip_id, sizeof(chip_id));
231 bus_space_read_multi_1(iot, ioh, ID, chip_id, sizeof(IDSTRING) - 1);
232 AIC_START(("AIC ID: %s ", chip_id));
233 AIC_START(("chip revision %d\n",
234 (int)bus_space_read_1(iot, ioh, REV)));
235
236 return (1);
237 }
238
239 /*
240 * Attach the AIC6360, fill out some high and low level data structures
241 */
242 void
aicattach(struct aic_softc * sc)243 aicattach(struct aic_softc *sc)
244 {
245 struct scsibus_attach_args saa;
246 AIC_TRACE(("aicattach "));
247 sc->sc_state = AIC_INIT;
248
249 sc->sc_initiator = 7;
250 sc->sc_freq = 20; /* XXXX assume 20 MHz. */
251
252 /*
253 * These are the bounds of the sync period, based on the frequency of
254 * the chip's clock input and the size and offset of the sync period
255 * register.
256 *
257 * For a 20MHz clock, this gives us 25, or 100nS, or 10MB/s, as a
258 * maximum transfer rate, and 112.5, or 450nS, or 2.22MB/s, as a
259 * minimum transfer rate.
260 */
261 sc->sc_minsync = (2 * 250) / sc->sc_freq;
262 sc->sc_maxsync = (9 * 250) / sc->sc_freq;
263
264 aic_init(sc); /* init chip and driver */
265
266 saa.saa_adapter_softc = sc;
267 saa.saa_adapter_target = sc->sc_initiator;
268 saa.saa_adapter = &aic_switch;
269 saa.saa_luns = saa.saa_adapter_buswidth = 8;
270 saa.saa_openings = 2;
271 saa.saa_pool = &sc->sc_iopool;
272 saa.saa_quirks = saa.saa_flags = 0;
273 saa.saa_wwpn = saa.saa_wwnn = 0;
274
275 config_found(&sc->sc_dev, &saa, scsiprint);
276 }
277
278 int
aic_detach(struct device * self,int flags)279 aic_detach(struct device *self, int flags)
280 {
281 struct aic_softc *sc = (struct aic_softc *) self;
282 int rv = 0;
283
284 rv = config_detach_children(&sc->sc_dev, flags);
285
286 return (rv);
287 }
288
289 /* Initialize AIC6360 chip itself
290 * The following conditions should hold:
291 * aicprobe should have succeeded, i.e. the ioh handle in aic_softc must
292 * be valid.
293 */
294 void
aic_reset(struct aic_softc * sc)295 aic_reset(struct aic_softc *sc)
296 {
297 bus_space_tag_t iot = sc->sc_iot;
298 bus_space_handle_t ioh = sc->sc_ioh;
299
300 /*
301 * Doc. recommends to clear these two registers before operations
302 * commence
303 */
304 bus_space_write_1(iot, ioh, SCSITEST, 0);
305 bus_space_write_1(iot, ioh, TEST, 0);
306
307 /* Reset SCSI-FIFO and abort any transfers */
308 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | CLRCH | CLRSTCNT);
309
310 /* Reset DMA-FIFO */
311 bus_space_write_1(iot, ioh, DMACNTRL0, RSTFIFO);
312 bus_space_write_1(iot, ioh, DMACNTRL1, 0);
313
314 /* Disable all selection features */
315 bus_space_write_1(iot, ioh, SCSISEQ, 0);
316 bus_space_write_1(iot, ioh, SXFRCTL1, 0);
317
318 /* Disable some interrupts */
319 bus_space_write_1(iot, ioh, SIMODE0, 0x00);
320 /* Clear a slew of interrupts */
321 bus_space_write_1(iot, ioh, CLRSINT0, 0x7f);
322
323 /* Disable some more interrupts */
324 bus_space_write_1(iot, ioh, SIMODE1, 0x00);
325 /* Clear another slew of interrupts */
326 bus_space_write_1(iot, ioh, CLRSINT1, 0xef);
327
328 /* Disable synchronous transfers */
329 bus_space_write_1(iot, ioh, SCSIRATE, 0);
330
331 /* Haven't seen ant errors (yet) */
332 bus_space_write_1(iot, ioh, CLRSERR, 0x07);
333
334 /* Set our SCSI-ID */
335 bus_space_write_1(iot, ioh, SCSIID, sc->sc_initiator << OID_S);
336 bus_space_write_1(iot, ioh, BRSTCNTRL, EISA_BRST_TIM);
337 }
338
339 /* Pull the SCSI RST line for 500 us */
340 void
aic_scsi_reset(struct aic_softc * sc)341 aic_scsi_reset(struct aic_softc *sc)
342 {
343 bus_space_tag_t iot = sc->sc_iot;
344 bus_space_handle_t ioh = sc->sc_ioh;
345
346 bus_space_write_1(iot, ioh, SCSISEQ, SCSIRSTO);
347 delay(500);
348 bus_space_write_1(iot, ioh, SCSISEQ, 0);
349 delay(50);
350 }
351
352 /*
353 * Initialize aic SCSI driver.
354 */
355 void
aic_init(struct aic_softc * sc)356 aic_init(struct aic_softc *sc)
357 {
358 bus_space_tag_t iot = sc->sc_iot;
359 bus_space_handle_t ioh = sc->sc_ioh;
360 struct aic_acb *acb;
361 int r;
362
363 aic_reset(sc);
364 aic_scsi_reset(sc);
365 aic_reset(sc);
366
367 if (sc->sc_state == AIC_INIT) {
368 /* First time through; initialize. */
369 TAILQ_INIT(&sc->ready_list);
370 TAILQ_INIT(&sc->nexus_list);
371 TAILQ_INIT(&sc->free_list);
372 mtx_init(&sc->sc_acb_mtx, IPL_BIO);
373 scsi_iopool_init(&sc->sc_iopool, sc, aic_acb_alloc,
374 aic_acb_free);
375 sc->sc_nexus = NULL;
376 acb = sc->sc_acb;
377 bzero(acb, sizeof(sc->sc_acb));
378 for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) {
379 TAILQ_INSERT_TAIL(&sc->free_list, acb, chain);
380 acb++;
381 }
382 bzero(&sc->sc_tinfo, sizeof(sc->sc_tinfo));
383 } else {
384 /* Cancel any active commands. */
385 sc->sc_state = AIC_CLEANING;
386 if ((acb = sc->sc_nexus) != NULL) {
387 acb->xs->error = XS_DRIVER_STUFFUP;
388 timeout_del(&acb->xs->stimeout);
389 aic_done(sc, acb);
390 }
391 while ((acb = TAILQ_FIRST(&sc->nexus_list)) != NULL) {
392 acb->xs->error = XS_DRIVER_STUFFUP;
393 timeout_del(&acb->xs->stimeout);
394 aic_done(sc, acb);
395 }
396 }
397
398 sc->sc_prevphase = PH_INVALID;
399 for (r = 0; r < 8; r++) {
400 struct aic_tinfo *ti = &sc->sc_tinfo[r];
401
402 ti->flags = 0;
403 #if AIC_USE_SYNCHRONOUS
404 ti->flags |= DO_SYNC;
405 ti->period = sc->sc_minsync;
406 ti->offset = AIC_SYNC_REQ_ACK_OFS;
407 #else
408 ti->period = ti->offset = 0;
409 #endif
410 #if AIC_USE_WIDE
411 ti->flags |= DO_WIDE;
412 ti->width = AIC_MAX_WIDTH;
413 #else
414 ti->width = 0;
415 #endif
416 }
417
418 sc->sc_state = AIC_IDLE;
419 bus_space_write_1(iot, ioh, DMACNTRL0, INTEN);
420 }
421
422 void
aic_acb_free(void * xsc,void * xacb)423 aic_acb_free(void *xsc, void *xacb)
424 {
425 struct aic_softc *sc = xsc;
426 struct aic_acb *acb = xacb;
427
428 mtx_enter(&sc->sc_acb_mtx);
429 acb->flags = 0;
430 TAILQ_INSERT_HEAD(&sc->free_list, acb, chain);
431 mtx_leave(&sc->sc_acb_mtx);
432 }
433
434 void *
aic_acb_alloc(void * xsc)435 aic_acb_alloc(void *xsc)
436 {
437 struct aic_softc *sc = xsc;
438 struct aic_acb *acb;
439
440 mtx_enter(&sc->sc_acb_mtx);
441 acb = TAILQ_FIRST(&sc->free_list);
442 if (acb) {
443 TAILQ_REMOVE(&sc->free_list, acb, chain);
444 acb->flags |= ACB_ALLOC;
445 }
446 mtx_leave(&sc->sc_acb_mtx);
447
448 return acb;
449 }
450
451 /*
452 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
453 */
454
455 /*
456 * Expected sequence:
457 * 1) Command inserted into ready list
458 * 2) Command selected for execution
459 * 3) Command won arbitration and has selected target device
460 * 4) Send message out (identify message, eventually also sync.negotiations)
461 * 5) Send command
462 * 5a) Receive disconnect message, disconnect.
463 * 5b) Reselected by target
464 * 5c) Receive identify message from target.
465 * 6) Send or receive data
466 * 7) Receive status
467 * 8) Receive message (command complete etc.)
468 * 9) If status == SCSI_CHECK construct a synthetic request sense SCSI cmd.
469 * Repeat 2-8 (no disconnects please...)
470 */
471
472 /*
473 * Start a SCSI-command
474 * This function is called by the higher level SCSI-driver to queue/run
475 * SCSI-commands.
476 */
477 void
aic_scsi_cmd(struct scsi_xfer * xs)478 aic_scsi_cmd(struct scsi_xfer *xs)
479 {
480 struct scsi_link *sc_link = xs->sc_link;
481 struct aic_softc *sc = sc_link->bus->sb_adapter_softc;
482 struct aic_acb *acb;
483 int s, flags;
484
485 AIC_TRACE(("aic_scsi_cmd "));
486 AIC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd.opcode, xs->cmdlen,
487 sc_link->target));
488
489 flags = xs->flags;
490 acb = xs->io;
491
492 /* Initialize acb */
493 acb->xs = xs;
494 acb->timeout = xs->timeout;
495 timeout_set(&xs->stimeout, aic_timeout, acb);
496
497 if (xs->flags & SCSI_RESET) {
498 acb->flags |= ACB_RESET;
499 acb->scsi_cmd_length = 0;
500 acb->data_length = 0;
501 } else {
502 bcopy(&xs->cmd, &acb->scsi_cmd, xs->cmdlen);
503 acb->scsi_cmd_length = xs->cmdlen;
504 acb->data_addr = xs->data;
505 acb->data_length = xs->datalen;
506 }
507 acb->target_stat = 0;
508
509 s = splbio();
510
511 TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain);
512 if (sc->sc_state == AIC_IDLE)
513 aic_sched(sc);
514
515 splx(s);
516
517 if ((flags & SCSI_POLL) == 0)
518 return;
519
520 /* Not allowed to use interrupts, use polling instead */
521 if (aic_poll(sc, xs, acb->timeout)) {
522 aic_timeout(acb);
523 if (aic_poll(sc, xs, acb->timeout))
524 aic_timeout(acb);
525 }
526 }
527
528 /*
529 * Used when interrupt driven I/O isn't allowed, e.g. during boot.
530 */
531 int
aic_poll(struct aic_softc * sc,struct scsi_xfer * xs,int count)532 aic_poll(struct aic_softc *sc, struct scsi_xfer *xs, int count)
533 {
534 bus_space_tag_t iot = sc->sc_iot;
535 bus_space_handle_t ioh = sc->sc_ioh;
536 int s;
537
538 AIC_TRACE(("aic_poll "));
539 while (count) {
540 /*
541 * If we had interrupts enabled, would we
542 * have got an interrupt?
543 */
544 if ((bus_space_read_1(iot, ioh, DMASTAT) & INTSTAT) != 0) {
545 s = splbio();
546 aicintr(sc);
547 splx(s);
548 }
549 if ((xs->flags & ITSDONE) != 0)
550 return 0;
551 delay(1000);
552 count--;
553 }
554 return 1;
555 }
556
557 /*
558 * LOW LEVEL SCSI UTILITIES
559 */
560
561 integrate void
aic_sched_msgout(struct aic_softc * sc,u_char m)562 aic_sched_msgout(struct aic_softc *sc, u_char m)
563 {
564 bus_space_tag_t iot = sc->sc_iot;
565 bus_space_handle_t ioh = sc->sc_ioh;
566
567 if (sc->sc_msgpriq == 0)
568 bus_space_write_1(iot, ioh, SCSISIG, sc->sc_phase | ATNO);
569 sc->sc_msgpriq |= m;
570 }
571
572 /*
573 * Set synchronous transfer offset and period.
574 */
575 integrate void
aic_setsync(struct aic_softc * sc,struct aic_tinfo * ti)576 aic_setsync(struct aic_softc *sc, struct aic_tinfo *ti)
577 {
578 #if AIC_USE_SYNCHRONOUS
579 bus_space_tag_t iot = sc->sc_iot;
580 bus_space_handle_t ioh = sc->sc_ioh;
581
582 if (ti->offset != 0)
583 bus_space_write_1(iot, ioh, SCSIRATE,
584 ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset);
585 else
586 bus_space_write_1(iot, ioh, SCSIRATE, 0);
587 #endif
588 }
589
590 /*
591 * Start a selection. This is used by aic_sched() to select an idle target,
592 * and by aic_done() to immediately reselect a target to get sense information.
593 */
594 void
aic_select(struct aic_softc * sc,struct aic_acb * acb)595 aic_select(struct aic_softc *sc, struct aic_acb *acb)
596 {
597 bus_space_tag_t iot = sc->sc_iot;
598 bus_space_handle_t ioh = sc->sc_ioh;
599 struct scsi_link *sc_link = acb->xs->sc_link;
600 int target = sc_link->target;
601 struct aic_tinfo *ti = &sc->sc_tinfo[target];
602
603 bus_space_write_1(iot, ioh, SCSIID,
604 sc->sc_initiator << OID_S | target);
605 aic_setsync(sc, ti);
606 bus_space_write_1(iot, ioh, SXFRCTL1, STIMO_256ms | ENSTIMER);
607
608 /* Always enable reselections. */
609 bus_space_write_1(iot, ioh, SIMODE0, ENSELDI | ENSELDO);
610 bus_space_write_1(iot, ioh, SIMODE1, ENSCSIRST | ENSELTIMO);
611 bus_space_write_1(iot, ioh, SCSISEQ, ENRESELI | ENSELO | ENAUTOATNO);
612
613 sc->sc_state = AIC_SELECTING;
614 }
615
616 int
aic_reselect(struct aic_softc * sc,int message)617 aic_reselect(struct aic_softc *sc, int message)
618 {
619 u_char selid, target, lun;
620 struct aic_acb *acb;
621 struct scsi_link *sc_link;
622 struct aic_tinfo *ti;
623
624 /*
625 * The SCSI chip made a snapshot of the data bus while the reselection
626 * was being negotiated. This enables us to determine which target did
627 * the reselect.
628 */
629 selid = sc->sc_selid & ~(1 << sc->sc_initiator);
630 if (selid & (selid - 1)) {
631 printf("%s: reselect with invalid selid %02x; ",
632 sc->sc_dev.dv_xname, selid);
633 printf("sending DEVICE RESET\n");
634 AIC_BREAK();
635 goto reset;
636 }
637
638 /* Search wait queue for disconnected cmd
639 * The list should be short, so I haven't bothered with
640 * any more sophisticated structures than a simple
641 * singly linked list.
642 */
643 target = ffs(selid) - 1;
644 lun = message & 0x07;
645 TAILQ_FOREACH(acb, &sc->nexus_list, chain) {
646 sc_link = acb->xs->sc_link;
647 if (sc_link->target == target && sc_link->lun == lun)
648 break;
649 }
650 if (acb == NULL) {
651 printf("%s: reselect from target %d lun %d with no nexus; ",
652 sc->sc_dev.dv_xname, target, lun);
653 printf("sending ABORT\n");
654 AIC_BREAK();
655 goto abort;
656 }
657
658 /* Make this nexus active again. */
659 TAILQ_REMOVE(&sc->nexus_list, acb, chain);
660 sc->sc_state = AIC_CONNECTED;
661 sc->sc_nexus = acb;
662 ti = &sc->sc_tinfo[target];
663 ti->lubusy |= (1 << lun);
664 aic_setsync(sc, ti);
665
666 if (acb->flags & ACB_RESET)
667 aic_sched_msgout(sc, SEND_DEV_RESET);
668 else if (acb->flags & ACB_ABORT)
669 aic_sched_msgout(sc, SEND_ABORT);
670
671 /* Do an implicit RESTORE POINTERS. */
672 sc->sc_dp = acb->data_addr;
673 sc->sc_dleft = acb->data_length;
674 sc->sc_cp = (u_char *)&acb->scsi_cmd;
675 sc->sc_cleft = acb->scsi_cmd_length;
676
677 return (0);
678
679 reset:
680 aic_sched_msgout(sc, SEND_DEV_RESET);
681 return (1);
682
683 abort:
684 aic_sched_msgout(sc, SEND_ABORT);
685 return (1);
686 }
687
688 /*
689 * Schedule a SCSI operation. This has now been pulled out of the interrupt
690 * handler so that we may call it from aic_scsi_cmd and aic_done. This may
691 * save us an unnecessary interrupt just to get things going. Should only be
692 * called when state == AIC_IDLE and at bio pl.
693 */
694 void
aic_sched(struct aic_softc * sc)695 aic_sched(struct aic_softc *sc)
696 {
697 bus_space_tag_t iot = sc->sc_iot;
698 bus_space_handle_t ioh = sc->sc_ioh;
699 struct aic_acb *acb;
700 struct scsi_link *sc_link;
701 struct aic_tinfo *ti;
702
703 /*
704 * Find first acb in ready queue that is for a target/lunit pair that
705 * is not busy.
706 */
707 bus_space_write_1(iot, ioh, CLRSINT1,
708 CLRSELTIMO | CLRBUSFREE | CLRSCSIPERR);
709 TAILQ_FOREACH(acb, &sc->ready_list, chain) {
710 sc_link = acb->xs->sc_link;
711 ti = &sc->sc_tinfo[sc_link->target];
712 if ((ti->lubusy & (1 << sc_link->lun)) == 0) {
713 AIC_MISC(("selecting %d:%d ",
714 sc_link->target, sc_link->lun));
715 TAILQ_REMOVE(&sc->ready_list, acb, chain);
716 sc->sc_nexus = acb;
717 aic_select(sc, acb);
718 return;
719 } else
720 AIC_MISC(("%d:%d busy\n",
721 sc_link->target, sc_link->lun));
722 }
723 AIC_MISC(("idle "));
724 /* Nothing to start; just enable reselections and wait. */
725 bus_space_write_1(iot, ioh, SIMODE0, ENSELDI);
726 bus_space_write_1(iot, ioh, SIMODE1, ENSCSIRST);
727 bus_space_write_1(iot, ioh, SCSISEQ, ENRESELI);
728 }
729
730 void
aic_sense(struct aic_softc * sc,struct aic_acb * acb)731 aic_sense(struct aic_softc *sc, struct aic_acb *acb)
732 {
733 struct scsi_xfer *xs = acb->xs;
734 struct scsi_link *sc_link = xs->sc_link;
735 struct aic_tinfo *ti = &sc->sc_tinfo[sc_link->target];
736 struct scsi_sense *ss = (void *)&acb->scsi_cmd;
737
738 AIC_MISC(("requesting sense "));
739 /* Next, setup a request sense command block */
740 bzero(ss, sizeof(*ss));
741 ss->opcode = REQUEST_SENSE;
742 ss->byte2 = sc_link->lun << 5;
743 ss->length = sizeof(struct scsi_sense_data);
744 acb->scsi_cmd_length = sizeof(*ss);
745 acb->data_addr = (char *)&xs->sense;
746 acb->data_length = sizeof(struct scsi_sense_data);
747 acb->flags |= ACB_SENSE;
748 ti->senses++;
749 if (acb->flags & ACB_NEXUS)
750 ti->lubusy &= ~(1 << sc_link->lun);
751 if (acb == sc->sc_nexus) {
752 aic_select(sc, acb);
753 } else {
754 aic_dequeue(sc, acb);
755 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
756 if (sc->sc_state == AIC_IDLE)
757 aic_sched(sc);
758 }
759 }
760
761 /*
762 * POST PROCESSING OF SCSI_CMD (usually current)
763 */
764 void
aic_done(struct aic_softc * sc,struct aic_acb * acb)765 aic_done(struct aic_softc *sc, struct aic_acb *acb)
766 {
767 struct scsi_xfer *xs = acb->xs;
768 struct scsi_link *sc_link = xs->sc_link;
769 struct aic_tinfo *ti = &sc->sc_tinfo[sc_link->target];
770
771 AIC_TRACE(("aic_done "));
772
773 /*
774 * Now, if we've come here with no error code, i.e. we've kept the
775 * initial XS_NOERROR, and the status code signals that we should
776 * check sense, we'll need to set up a request sense cmd block and
777 * push the command back into the ready queue *before* any other
778 * commands for this target/lunit, else we lose the sense info.
779 * We don't support chk sense conditions for the request sense cmd.
780 */
781 if (xs->error == XS_NOERROR) {
782 if (acb->flags & ACB_ABORT) {
783 xs->error = XS_DRIVER_STUFFUP;
784 } else if (acb->flags & ACB_SENSE) {
785 xs->error = XS_SENSE;
786 } else if (acb->target_stat == SCSI_CHECK) {
787 /* First, save the return values */
788 xs->resid = acb->data_length;
789 xs->status = acb->target_stat;
790 aic_sense(sc, acb);
791 return;
792 } else {
793 xs->resid = acb->data_length;
794 }
795 }
796
797 #ifdef AIC_DEBUG
798 if ((aic_debug & AIC_SHOWMISC) != 0) {
799 if (xs->resid != 0)
800 printf("resid=%lu ", (u_long)xs->resid);
801 if (xs->error == XS_SENSE)
802 printf("sense=0x%02x\n", xs->sense.error_code);
803 else
804 printf("error=%d\n", xs->error);
805 }
806 #endif
807
808 /*
809 * Remove the ACB from whatever queue it happens to be on.
810 */
811 if (acb->flags & ACB_NEXUS)
812 ti->lubusy &= ~(1 << sc_link->lun);
813 if (acb == sc->sc_nexus) {
814 sc->sc_nexus = NULL;
815 sc->sc_state = AIC_IDLE;
816 aic_sched(sc);
817 } else
818 aic_dequeue(sc, acb);
819
820 ti->cmds++;
821 scsi_done(xs);
822 }
823
824 void
aic_dequeue(struct aic_softc * sc,struct aic_acb * acb)825 aic_dequeue(struct aic_softc *sc, struct aic_acb *acb)
826 {
827
828 if (acb->flags & ACB_NEXUS) {
829 TAILQ_REMOVE(&sc->nexus_list, acb, chain);
830 } else {
831 TAILQ_REMOVE(&sc->ready_list, acb, chain);
832 }
833 }
834
835 /*
836 * INTERRUPT/PROTOCOL ENGINE
837 */
838
839 /*
840 * Precondition:
841 * The SCSI bus is already in the MSGI phase and there is a message byte
842 * on the bus, along with an asserted REQ signal.
843 */
844 void
aic_msgin(struct aic_softc * sc)845 aic_msgin(struct aic_softc *sc)
846 {
847 bus_space_tag_t iot = sc->sc_iot;
848 bus_space_handle_t ioh = sc->sc_ioh;
849 u_char sstat1;
850 int n;
851
852 AIC_TRACE(("aic_msgin "));
853
854 if (sc->sc_prevphase == PH_MSGIN) {
855 /* This is a continuation of the previous message. */
856 n = sc->sc_imp - sc->sc_imess;
857 goto nextbyte;
858 }
859
860 /* This is a new MESSAGE IN phase. Clean up our state. */
861 sc->sc_flags &= ~AIC_DROP_MSGIN;
862
863 nextmsg:
864 n = 0;
865 sc->sc_imp = &sc->sc_imess[n];
866
867 nextbyte:
868 /*
869 * Read a whole message, but don't ack the last byte. If we reject the
870 * message, we have to assert ATN during the message transfer phase
871 * itself.
872 */
873 for (;;) {
874 for (;;) {
875 sstat1 = bus_space_read_1(iot, ioh, SSTAT1);
876 if ((sstat1 & (REQINIT | PHASECHG | BUSFREE)) != 0)
877 break;
878 /* Wait for REQINIT. XXX Need timeout. */
879 }
880 if ((sstat1 & (PHASECHG | BUSFREE)) != 0) {
881 /*
882 * Target left MESSAGE IN, probably because it
883 * a) noticed our ATN signal, or
884 * b) ran out of messages.
885 */
886 goto out;
887 }
888
889 /* If parity error, just dump everything on the floor. */
890 if ((sstat1 & SCSIPERR) != 0) {
891 sc->sc_flags |= AIC_DROP_MSGIN;
892 aic_sched_msgout(sc, SEND_PARITY_ERROR);
893 }
894
895 /* Gather incoming message bytes if needed. */
896 if ((sc->sc_flags & AIC_DROP_MSGIN) == 0) {
897 if (n >= AIC_MAX_MSG_LEN) {
898 (void) bus_space_read_1(iot, ioh, SCSIDAT);
899 sc->sc_flags |= AIC_DROP_MSGIN;
900 aic_sched_msgout(sc, SEND_REJECT);
901 } else {
902 *sc->sc_imp++ = bus_space_read_1(iot, ioh,
903 SCSIDAT);
904 n++;
905 /*
906 * This testing is suboptimal, but most
907 * messages will be of the one byte variety, so
908 * it should not affect performance
909 * significantly.
910 */
911 if (n == 1 && IS1BYTEMSG(sc->sc_imess[0]))
912 break;
913 if (n == 2 && IS2BYTEMSG(sc->sc_imess[0]))
914 break;
915 if (n >= 3 && ISEXTMSG(sc->sc_imess[0]) &&
916 n == sc->sc_imess[1] + 2)
917 break;
918 }
919 } else
920 (void) bus_space_read_1(iot, ioh, SCSIDAT);
921
922 /*
923 * If we reach this spot we're either:
924 * a) in the middle of a multi-byte message, or
925 * b) dropping bytes.
926 */
927 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | SPIOEN);
928 /* Ack the last byte read. */
929 (void) bus_space_read_1(iot, ioh, SCSIDAT);
930 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN);
931 while ((bus_space_read_1(iot, ioh, SCSISIG) & ACKI) != 0)
932 ;
933 }
934
935 AIC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0]));
936
937 /* We now have a complete message. Parse it. */
938 switch (sc->sc_state) {
939 struct aic_acb *acb;
940 struct scsi_link *sc_link;
941 struct aic_tinfo *ti;
942
943 case AIC_CONNECTED:
944 AIC_ASSERT(sc->sc_nexus != NULL);
945 acb = sc->sc_nexus;
946 ti = &sc->sc_tinfo[acb->xs->sc_link->target];
947
948 switch (sc->sc_imess[0]) {
949 case MSG_CMDCOMPLETE:
950 if ((long)sc->sc_dleft < 0) {
951 sc_link = acb->xs->sc_link;
952 printf("%s: %lu extra bytes from %d:%d\n",
953 sc->sc_dev.dv_xname, (u_long)-sc->sc_dleft,
954 sc_link->target, sc_link->lun);
955 acb->data_length = 0;
956 }
957 acb->xs->resid = acb->data_length = sc->sc_dleft;
958 sc->sc_state = AIC_CMDCOMPLETE;
959 break;
960
961 case MSG_PARITY_ERROR:
962 /* Resend the last message. */
963 aic_sched_msgout(sc, sc->sc_lastmsg);
964 break;
965
966 case MSG_MESSAGE_REJECT:
967 AIC_MISC(("message rejected %02x ", sc->sc_lastmsg));
968 switch (sc->sc_lastmsg) {
969 #if AIC_USE_SYNCHRONOUS + AIC_USE_WIDE
970 case SEND_IDENTIFY:
971 ti->flags &= ~(DO_SYNC | DO_WIDE);
972 ti->period = ti->offset = 0;
973 aic_setsync(sc, ti);
974 ti->width = 0;
975 break;
976 #endif
977 #if AIC_USE_SYNCHRONOUS
978 case SEND_SDTR:
979 ti->flags &= ~DO_SYNC;
980 ti->period = ti->offset = 0;
981 aic_setsync(sc, ti);
982 break;
983 #endif
984 #if AIC_USE_WIDE
985 case SEND_WDTR:
986 ti->flags &= ~DO_WIDE;
987 ti->width = 0;
988 break;
989 #endif
990 case SEND_INIT_DET_ERR:
991 aic_sched_msgout(sc, SEND_ABORT);
992 break;
993 }
994 break;
995
996 case MSG_NOOP:
997 break;
998
999 case MSG_DISCONNECT:
1000 ti->dconns++;
1001 sc->sc_state = AIC_DISCONNECT;
1002 break;
1003
1004 case MSG_SAVEDATAPOINTER:
1005 acb->data_addr = sc->sc_dp;
1006 acb->data_length = sc->sc_dleft;
1007 break;
1008
1009 case MSG_RESTOREPOINTERS:
1010 sc->sc_dp = acb->data_addr;
1011 sc->sc_dleft = acb->data_length;
1012 sc->sc_cp = (u_char *)&acb->scsi_cmd;
1013 sc->sc_cleft = acb->scsi_cmd_length;
1014 break;
1015
1016 case MSG_EXTENDED:
1017 switch (sc->sc_imess[2]) {
1018 #if AIC_USE_SYNCHRONOUS
1019 case MSG_EXT_SDTR:
1020 if (sc->sc_imess[1] != 3)
1021 goto reject;
1022 ti->period = sc->sc_imess[3];
1023 ti->offset = sc->sc_imess[4];
1024 ti->flags &= ~DO_SYNC;
1025 if (ti->offset == 0) {
1026 } else if (ti->period < sc->sc_minsync ||
1027 ti->period > sc->sc_maxsync ||
1028 ti->offset > 8) {
1029 ti->period = ti->offset = 0;
1030 aic_sched_msgout(sc, SEND_SDTR);
1031 } else {
1032 sc_print_addr(acb->xs->sc_link);
1033 printf("sync, offset %d, ",
1034 ti->offset);
1035 printf("period %dnsec\n",
1036 ti->period * 4);
1037 }
1038 aic_setsync(sc, ti);
1039 break;
1040 #endif
1041
1042 #if AIC_USE_WIDE
1043 case MSG_EXT_WDTR:
1044 if (sc->sc_imess[1] != 2)
1045 goto reject;
1046 ti->width = sc->sc_imess[3];
1047 ti->flags &= ~DO_WIDE;
1048 if (ti->width == 0) {
1049 } else if (ti->width > AIC_MAX_WIDTH) {
1050 ti->width = 0;
1051 aic_sched_msgout(sc, SEND_WDTR);
1052 } else {
1053 sc_print_addr(acb->xs->sc_link);
1054 printf("wide, width %d\n",
1055 1 << (3 + ti->width));
1056 }
1057 break;
1058 #endif
1059
1060 default:
1061 printf("%s: unrecognized MESSAGE EXTENDED; ",
1062 sc->sc_dev.dv_xname);
1063 printf("sending REJECT\n");
1064 AIC_BREAK();
1065 goto reject;
1066 }
1067 break;
1068
1069 default:
1070 printf("%s: unrecognized MESSAGE; sending REJECT\n",
1071 sc->sc_dev.dv_xname);
1072 AIC_BREAK();
1073 reject:
1074 aic_sched_msgout(sc, SEND_REJECT);
1075 break;
1076 }
1077 break;
1078
1079 case AIC_RESELECTED:
1080 if (!MSG_ISIDENTIFY(sc->sc_imess[0])) {
1081 printf("%s: reselect without IDENTIFY; ",
1082 sc->sc_dev.dv_xname);
1083 printf("sending DEVICE RESET\n");
1084 AIC_BREAK();
1085 goto reset;
1086 }
1087
1088 (void) aic_reselect(sc, sc->sc_imess[0]);
1089 break;
1090
1091 default:
1092 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
1093 sc->sc_dev.dv_xname);
1094 AIC_BREAK();
1095 reset:
1096 aic_sched_msgout(sc, SEND_DEV_RESET);
1097 break;
1098
1099 #ifdef notdef
1100 abort:
1101 aic_sched_msgout(sc, SEND_ABORT);
1102 break;
1103 #endif
1104 }
1105
1106 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | SPIOEN);
1107 /* Ack the last message byte. */
1108 (void) bus_space_read_1(iot, ioh, SCSIDAT);
1109 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN);
1110 while ((bus_space_read_1(iot, ioh, SCSISIG) & ACKI) != 0)
1111 ;
1112
1113 /* Go get the next message, if any. */
1114 goto nextmsg;
1115
1116 out:
1117 AIC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0]));
1118 }
1119
1120 /*
1121 * Send the highest priority, scheduled message.
1122 */
1123 void
aic_msgout(struct aic_softc * sc)1124 aic_msgout(struct aic_softc *sc)
1125 {
1126 bus_space_tag_t iot = sc->sc_iot;
1127 bus_space_handle_t ioh = sc->sc_ioh;
1128 #if AIC_USE_SYNCHRONOUS
1129 struct aic_tinfo *ti;
1130 #endif
1131 u_char sstat1;
1132 int n;
1133
1134 AIC_TRACE(("aic_msgout "));
1135
1136 /* Reset the FIFO. */
1137 bus_space_write_1(iot, ioh, DMACNTRL0, RSTFIFO);
1138 /* Enable REQ/ACK protocol. */
1139 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | SPIOEN);
1140
1141 if (sc->sc_prevphase == PH_MSGOUT) {
1142 if (sc->sc_omp == sc->sc_omess) {
1143 /*
1144 * This is a retransmission.
1145 *
1146 * We get here if the target stayed in MESSAGE OUT
1147 * phase. Section 5.1.9.2 of the SCSI 2 spec indicates
1148 * that all of the previously transmitted messages must
1149 * be sent again, in the same order. Therefore, we
1150 * requeue all the previously transmitted messages, and
1151 * start again from the top. Our simple priority
1152 * scheme keeps the messages in the right order.
1153 */
1154 AIC_MISC(("retransmitting "));
1155 sc->sc_msgpriq |= sc->sc_msgoutq;
1156 /*
1157 * Set ATN. If we're just sending a trivial 1-byte
1158 * message, we'll clear ATN later on anyway.
1159 */
1160 bus_space_write_1(iot, ioh, SCSISIG, PH_MSGOUT | ATNO);
1161 } else {
1162 /* This is a continuation of the previous message. */
1163 n = sc->sc_omp - sc->sc_omess;
1164 goto nextbyte;
1165 }
1166 }
1167
1168 /* No messages transmitted so far. */
1169 sc->sc_msgoutq = 0;
1170 sc->sc_lastmsg = 0;
1171
1172 nextmsg:
1173 /* Pick up highest priority message. */
1174 sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq;
1175 sc->sc_msgpriq &= ~sc->sc_currmsg;
1176 sc->sc_msgoutq |= sc->sc_currmsg;
1177
1178 /* Build the outgoing message data. */
1179 switch (sc->sc_currmsg) {
1180 case SEND_IDENTIFY:
1181 AIC_ASSERT(sc->sc_nexus != NULL);
1182 sc->sc_omess[0] =
1183 MSG_IDENTIFY(sc->sc_nexus->xs->sc_link->lun, 1);
1184 n = 1;
1185 break;
1186
1187 #if AIC_USE_SYNCHRONOUS
1188 case SEND_SDTR:
1189 AIC_ASSERT(sc->sc_nexus != NULL);
1190 ti = &sc->sc_tinfo[sc->sc_nexus->xs->sc_link->target];
1191 sc->sc_omess[4] = MSG_EXTENDED;
1192 sc->sc_omess[3] = 3;
1193 sc->sc_omess[2] = MSG_EXT_SDTR;
1194 sc->sc_omess[1] = ti->period >> 2;
1195 sc->sc_omess[0] = ti->offset;
1196 n = 5;
1197 break;
1198 #endif
1199
1200 #if AIC_USE_WIDE
1201 case SEND_WDTR:
1202 AIC_ASSERT(sc->sc_nexus != NULL);
1203 ti = &sc->sc_tinfo[sc->sc_nexus->xs->sc_link->target];
1204 sc->sc_omess[3] = MSG_EXTENDED;
1205 sc->sc_omess[2] = 2;
1206 sc->sc_omess[1] = MSG_EXT_WDTR;
1207 sc->sc_omess[0] = ti->width;
1208 n = 4;
1209 break;
1210 #endif
1211
1212 case SEND_DEV_RESET:
1213 sc->sc_flags |= AIC_ABORTING;
1214 sc->sc_omess[0] = MSG_BUS_DEV_RESET;
1215 n = 1;
1216 break;
1217
1218 case SEND_REJECT:
1219 sc->sc_omess[0] = MSG_MESSAGE_REJECT;
1220 n = 1;
1221 break;
1222
1223 case SEND_PARITY_ERROR:
1224 sc->sc_omess[0] = MSG_PARITY_ERROR;
1225 n = 1;
1226 break;
1227
1228 case SEND_INIT_DET_ERR:
1229 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
1230 n = 1;
1231 break;
1232
1233 case SEND_ABORT:
1234 sc->sc_flags |= AIC_ABORTING;
1235 sc->sc_omess[0] = MSG_ABORT;
1236 n = 1;
1237 break;
1238
1239 default:
1240 printf("%s: unexpected MESSAGE OUT; sending NOOP\n",
1241 sc->sc_dev.dv_xname);
1242 AIC_BREAK();
1243 sc->sc_omess[0] = MSG_NOOP;
1244 n = 1;
1245 break;
1246 }
1247 sc->sc_omp = &sc->sc_omess[n];
1248
1249 nextbyte:
1250 /* Send message bytes. */
1251 for (;;) {
1252 for (;;) {
1253 sstat1 = bus_space_read_1(iot, ioh, SSTAT1);
1254 if ((sstat1 & (REQINIT | PHASECHG | BUSFREE)) != 0)
1255 break;
1256 /* Wait for REQINIT. XXX Need timeout. */
1257 }
1258 if ((sstat1 & (PHASECHG | BUSFREE)) != 0) {
1259 /*
1260 * Target left MESSAGE OUT, possibly to reject
1261 * our message.
1262 *
1263 * If this is the last message being sent, then we
1264 * deassert ATN, since either the target is going to
1265 * ignore this message, or it's going to ask for a
1266 * retransmission via MESSAGE PARITY ERROR (in which
1267 * case we reassert ATN anyway).
1268 */
1269 if (sc->sc_msgpriq == 0)
1270 bus_space_write_1(iot, ioh, CLRSINT1, CLRATNO);
1271 goto out;
1272 }
1273
1274 /* Clear ATN before last byte if this is the last message. */
1275 if (n == 1 && sc->sc_msgpriq == 0)
1276 bus_space_write_1(iot, ioh, CLRSINT1, CLRATNO);
1277 /* Send message byte. */
1278 bus_space_write_1(iot, ioh, SCSIDAT, *--sc->sc_omp);
1279 --n;
1280 /* Keep track of the last message we've sent any bytes of. */
1281 sc->sc_lastmsg = sc->sc_currmsg;
1282 /* Wait for ACK to be negated. XXX Need timeout. */
1283 while ((bus_space_read_1(iot, ioh, SCSISIG) & ACKI) != 0)
1284 ;
1285
1286 if (n == 0)
1287 break;
1288 }
1289
1290 /* We get here only if the entire message has been transmitted. */
1291 if (sc->sc_msgpriq != 0) {
1292 /* There are more outgoing messages. */
1293 goto nextmsg;
1294 }
1295
1296 /*
1297 * The last message has been transmitted. We need to remember the last
1298 * message transmitted (in case the target switches to MESSAGE IN phase
1299 * and sends a MESSAGE REJECT), and the list of messages transmitted
1300 * this time around (in case the target stays in MESSAGE OUT phase to
1301 * request a retransmit).
1302 */
1303
1304 out:
1305 /* Disable REQ/ACK protocol. */
1306 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN);
1307 }
1308
1309 /* aic_dataout_pio: perform a data transfer using the FIFO datapath in the aic6360
1310 * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted
1311 * and ACK deasserted (i.e. waiting for a data byte).
1312 * This new revision has been optimized (I tried) to make the common case fast,
1313 * and the rarer cases (as a result) somewhat more complex.
1314 */
1315 int
aic_dataout_pio(struct aic_softc * sc,u_char * p,int n)1316 aic_dataout_pio(struct aic_softc *sc, u_char *p, int n)
1317 {
1318 bus_space_tag_t iot = sc->sc_iot;
1319 bus_space_handle_t ioh = sc->sc_ioh;
1320 u_char dmastat = 0;
1321 int out = 0;
1322 #define DOUTAMOUNT 128 /* Full FIFO */
1323
1324 AIC_MISC(("%02x%02x ", bus_space_read_1(iot, ioh, FIFOSTAT),
1325 bus_space_read_1(iot, ioh, SSTAT2)));
1326
1327 /* Clear host FIFO and counter. */
1328 bus_space_write_1(iot, ioh, DMACNTRL0, RSTFIFO | WRITE);
1329 /* Enable FIFOs. */
1330 bus_space_write_1(iot, ioh, DMACNTRL0, ENDMA | DWORDPIO | WRITE);
1331 bus_space_write_1(iot, ioh, SXFRCTL0, SCSIEN | DMAEN | CHEN);
1332
1333 /* Turn off ENREQINIT for now. */
1334 bus_space_write_1(iot, ioh, SIMODE1,
1335 ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENPHASECHG);
1336
1337 /* I have tried to make the main loop as tight as possible. This
1338 * means that some of the code following the loop is a bit more
1339 * complex than otherwise.
1340 */
1341 while (n > 0) {
1342 for (;;) {
1343 dmastat = bus_space_read_1(iot, ioh, DMASTAT);
1344 if ((dmastat & (DFIFOEMP | INTSTAT)) != 0)
1345 break;
1346 }
1347
1348 if ((dmastat & INTSTAT) != 0)
1349 goto phasechange;
1350
1351 if (n >= DOUTAMOUNT) {
1352 n -= DOUTAMOUNT;
1353 out += DOUTAMOUNT;
1354
1355 #if AIC_USE_DWORDS
1356 bus_space_write_multi_4(iot, ioh, DMADATALONG,
1357 (u_int32_t *)p, DOUTAMOUNT >> 2);
1358 #else
1359 bus_space_write_multi_2(iot, ioh, DMADATA,
1360 (u_int16_t *)p, DOUTAMOUNT >> 1);
1361 #endif
1362
1363 p += DOUTAMOUNT;
1364 } else {
1365 int xfer;
1366
1367 xfer = n;
1368 AIC_MISC(("%d> ", xfer));
1369
1370 n -= xfer;
1371 out += xfer;
1372
1373 #if AIC_USE_DWORDS
1374 if (xfer >= 12) {
1375 bus_space_write_multi_4(iot, ioh, DMADATALONG,
1376 (u_int32_t *)p, xfer >> 2);
1377 p += xfer & ~3;
1378 xfer &= 3;
1379 }
1380 #else
1381 if (xfer >= 8) {
1382 bus_space_write_multi_2(iot, ioh, DMADATA,
1383 (u_int16_t *)p, xfer >> 1);
1384 p += xfer & ~1;
1385 xfer &= 1;
1386 }
1387 #endif
1388
1389 if (xfer > 0) {
1390 bus_space_write_1(iot, ioh, DMACNTRL0,
1391 ENDMA | B8MODE | WRITE);
1392 bus_space_write_multi_1(iot, ioh, DMADATA, p,
1393 xfer);
1394 p += xfer;
1395 bus_space_write_1(iot, ioh, DMACNTRL0,
1396 ENDMA | DWORDPIO | WRITE);
1397 }
1398 }
1399 }
1400
1401 if (out == 0) {
1402 bus_space_write_1(iot, ioh, SXFRCTL1, BITBUCKET);
1403 for (;;) {
1404 if ((bus_space_read_1(iot, ioh, DMASTAT) & INTSTAT) !=
1405 0)
1406 break;
1407 }
1408 bus_space_write_1(iot, ioh, SXFRCTL1, 0);
1409 AIC_MISC(("extra data "));
1410 } else {
1411 /* See the bytes off chip */
1412 for (;;) {
1413 dmastat = bus_space_read_1(iot, ioh, DMASTAT);
1414 if ((dmastat & INTSTAT) != 0)
1415 goto phasechange;
1416 if ((dmastat & DFIFOEMP) != 0 &&
1417 (bus_space_read_1(iot, ioh, SSTAT2) & SEMPTY) != 0)
1418 break;
1419 }
1420 }
1421
1422 phasechange:
1423 if ((dmastat & INTSTAT) != 0) {
1424 /* Some sort of phase change. */
1425 int amount;
1426
1427 /* Stop transfers, do some accounting */
1428 amount = bus_space_read_1(iot, ioh, FIFOSTAT) +
1429 (bus_space_read_1(iot, ioh, SSTAT2) & 15);
1430 if (amount > 0) {
1431 out -= amount;
1432 bus_space_write_1(iot, ioh, DMACNTRL0,
1433 RSTFIFO | WRITE);
1434 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | CLRCH);
1435 AIC_MISC(("+%d ", amount));
1436 }
1437 }
1438
1439 /* Turn on ENREQINIT again. */
1440 bus_space_write_1(iot, ioh, SIMODE1,
1441 ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENREQINIT | ENPHASECHG);
1442
1443 /* Stop the FIFO data path. */
1444 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN);
1445 bus_space_write_1(iot, ioh, DMACNTRL0, 0);
1446
1447 return out;
1448 }
1449
1450 /* aic_datain_pio: perform data transfers using the FIFO datapath in the aic6360
1451 * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted
1452 * and ACK deasserted (i.e. at least one byte is ready).
1453 * For now, uses a pretty dumb algorithm, hangs around until all data has been
1454 * transferred. This, is OK for fast targets, but not so smart for slow
1455 * targets which don't disconnect or for huge transfers.
1456 */
1457 int
aic_datain_pio(struct aic_softc * sc,u_char * p,int n)1458 aic_datain_pio(struct aic_softc *sc, u_char *p, int n)
1459 {
1460 bus_space_tag_t iot = sc->sc_iot;
1461 bus_space_handle_t ioh = sc->sc_ioh;
1462 u_char dmastat;
1463 int in = 0;
1464 #define DINAMOUNT 128 /* Full FIFO */
1465
1466 AIC_MISC(("%02x%02x ", bus_space_read_1(iot, ioh, FIFOSTAT),
1467 bus_space_read_1(iot, ioh, SSTAT2)));
1468
1469 /* Clear host FIFO and counter. */
1470 bus_space_write_1(iot, ioh, DMACNTRL0, RSTFIFO);
1471 /* Enable FIFOs. */
1472 bus_space_write_1(iot, ioh, DMACNTRL0, ENDMA | DWORDPIO);
1473 bus_space_write_1(iot, ioh, SXFRCTL0, SCSIEN | DMAEN | CHEN);
1474
1475 /* Turn off ENREQINIT for now. */
1476 bus_space_write_1(iot, ioh, SIMODE1,
1477 ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENPHASECHG);
1478
1479 /* We leave this loop if one or more of the following is true:
1480 * a) phase != PH_DATAIN && FIFOs are empty
1481 * b) SCSIRSTI is set (a reset has occurred) or busfree is detected.
1482 */
1483 while (n > 0) {
1484 /* Wait for fifo half full or phase mismatch */
1485 for (;;) {
1486 dmastat = bus_space_read_1(iot, ioh, DMASTAT);
1487 if ((dmastat & (DFIFOFULL | INTSTAT)) != 0)
1488 break;
1489 }
1490
1491 if ((dmastat & DFIFOFULL) != 0) {
1492 n -= DINAMOUNT;
1493 in += DINAMOUNT;
1494
1495 #if AIC_USE_DWORDS
1496 bus_space_read_multi_4(iot, ioh, DMADATALONG,
1497 (u_int32_t *)p, DINAMOUNT >> 2);
1498 #else
1499 bus_space_read_multi_2(iot, ioh, DMADATA,
1500 (u_int16_t *)p, DINAMOUNT >> 1);
1501 #endif
1502
1503 p += DINAMOUNT;
1504 } else {
1505 int xfer;
1506
1507 xfer = min(bus_space_read_1(iot, ioh, FIFOSTAT), n);
1508 AIC_MISC((">%d ", xfer));
1509
1510 n -= xfer;
1511 in += xfer;
1512
1513 #if AIC_USE_DWORDS
1514 if (xfer >= 12) {
1515 bus_space_read_multi_4(iot, ioh, DMADATALONG,
1516 (u_int32_t *)p, xfer >> 2);
1517 p += xfer & ~3;
1518 xfer &= 3;
1519 }
1520 #else
1521 if (xfer >= 8) {
1522 bus_space_read_multi_2(iot, ioh, DMADATA,
1523 (u_int16_t *)p, xfer >> 1);
1524 p += xfer & ~1;
1525 xfer &= 1;
1526 }
1527 #endif
1528
1529 if (xfer > 0) {
1530 bus_space_write_1(iot, ioh, DMACNTRL0,
1531 ENDMA | B8MODE);
1532 bus_space_read_multi_1(iot, ioh, DMADATA, p,
1533 xfer);
1534 p += xfer;
1535 bus_space_write_1(iot, ioh, DMACNTRL0,
1536 ENDMA | DWORDPIO);
1537 }
1538 }
1539
1540 if ((dmastat & INTSTAT) != 0)
1541 goto phasechange;
1542 }
1543
1544 /* Some SCSI-devices are rude enough to transfer more data than what
1545 * was requested, e.g. 2048 bytes from a CD-ROM instead of the
1546 * requested 512. Test for progress, i.e. real transfers. If no real
1547 * transfers have been performed (n is probably already zero) and the
1548 * FIFO is not empty, waste some bytes....
1549 */
1550 if (in == 0) {
1551 bus_space_write_1(iot, ioh, SXFRCTL1, BITBUCKET);
1552 for (;;) {
1553 if ((bus_space_read_1(iot, ioh, DMASTAT) & INTSTAT) !=
1554 0)
1555 break;
1556 }
1557 bus_space_write_1(iot, ioh, SXFRCTL1, 0);
1558 AIC_MISC(("extra data "));
1559 }
1560
1561 phasechange:
1562 /* Turn on ENREQINIT again. */
1563 bus_space_write_1(iot, ioh, SIMODE1,
1564 ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENREQINIT | ENPHASECHG);
1565
1566 /* Stop the FIFO data path. */
1567 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN);
1568 bus_space_write_1(iot, ioh, DMACNTRL0, 0);
1569
1570 return in;
1571 }
1572
1573 /*
1574 * This is the workhorse routine of the driver.
1575 * Deficiencies (for now):
1576 * 1) always uses programmed I/O
1577 */
1578 int
aicintr(void * arg)1579 aicintr(void *arg)
1580 {
1581 struct aic_softc *sc = arg;
1582 bus_space_tag_t iot = sc->sc_iot;
1583 bus_space_handle_t ioh = sc->sc_ioh;
1584 u_char sstat0, sstat1;
1585 struct aic_acb *acb;
1586 struct scsi_link *sc_link;
1587 struct aic_tinfo *ti;
1588 int n;
1589
1590 /*
1591 * Clear INTEN. We enable it again before returning. This makes the
1592 * interrupt essentially level-triggered.
1593 */
1594 bus_space_write_1(iot, ioh, DMACNTRL0, 0);
1595
1596 AIC_TRACE(("aicintr "));
1597
1598 loop:
1599 /*
1600 * First check for abnormal conditions, such as reset.
1601 */
1602 sstat1 = bus_space_read_1(iot, ioh, SSTAT1);
1603 AIC_MISC(("sstat1:0x%02x ", sstat1));
1604
1605 if ((sstat1 & SCSIRSTI) != 0) {
1606 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname);
1607 goto reset;
1608 }
1609
1610 /*
1611 * Check for less serious errors.
1612 */
1613 if ((sstat1 & SCSIPERR) != 0) {
1614 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
1615 bus_space_write_1(iot, ioh, CLRSINT1, CLRSCSIPERR);
1616 if (sc->sc_prevphase == PH_MSGIN) {
1617 sc->sc_flags |= AIC_DROP_MSGIN;
1618 aic_sched_msgout(sc, SEND_PARITY_ERROR);
1619 } else
1620 aic_sched_msgout(sc, SEND_INIT_DET_ERR);
1621 }
1622
1623 /*
1624 * If we're not already busy doing something test for the following
1625 * conditions:
1626 * 1) We have been reselected by something
1627 * 2) We have selected something successfully
1628 * 3) Our selection process has timed out
1629 * 4) This is really a bus free interrupt just to get a new command
1630 * going?
1631 * 5) Spurious interrupt?
1632 */
1633 switch (sc->sc_state) {
1634 case AIC_IDLE:
1635 case AIC_SELECTING:
1636 sstat0 = bus_space_read_1(iot, ioh, SSTAT0);
1637 AIC_MISC(("sstat0:0x%02x ", sstat0));
1638
1639 if ((sstat0 & TARGET) != 0) {
1640 /*
1641 * We don't currently support target mode.
1642 */
1643 printf("%s: target mode selected; going to BUS FREE\n",
1644 sc->sc_dev.dv_xname);
1645 bus_space_write_1(iot, ioh, SCSISIG, 0);
1646
1647 goto sched;
1648 } else if ((sstat0 & SELDI) != 0) {
1649 AIC_MISC(("reselected "));
1650
1651 /*
1652 * If we're trying to select a target ourselves,
1653 * push our command back into the ready list.
1654 */
1655 if (sc->sc_state == AIC_SELECTING) {
1656 AIC_MISC(("backoff selector "));
1657 AIC_ASSERT(sc->sc_nexus != NULL);
1658 acb = sc->sc_nexus;
1659 sc->sc_nexus = NULL;
1660 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
1661 }
1662
1663 /* Save reselection ID. */
1664 sc->sc_selid = bus_space_read_1(iot, ioh, SELID);
1665
1666 sc->sc_state = AIC_RESELECTED;
1667 } else if ((sstat0 & SELDO) != 0) {
1668 AIC_MISC(("selected "));
1669
1670 /* We have selected a target. Things to do:
1671 * a) Determine what message(s) to send.
1672 * b) Verify that we're still selecting the target.
1673 * c) Mark device as busy.
1674 */
1675 if (sc->sc_state != AIC_SELECTING) {
1676 printf("%s: selection out while idle; ",
1677 sc->sc_dev.dv_xname);
1678 printf("resetting\n");
1679 AIC_BREAK();
1680 goto reset;
1681 }
1682 AIC_ASSERT(sc->sc_nexus != NULL);
1683 acb = sc->sc_nexus;
1684 sc_link = acb->xs->sc_link;
1685 ti = &sc->sc_tinfo[sc_link->target];
1686
1687 sc->sc_msgpriq = SEND_IDENTIFY;
1688 if (acb->flags & ACB_RESET)
1689 sc->sc_msgpriq |= SEND_DEV_RESET;
1690 else if (acb->flags & ACB_ABORT)
1691 sc->sc_msgpriq |= SEND_ABORT;
1692 else {
1693 #if AIC_USE_SYNCHRONOUS
1694 if ((ti->flags & DO_SYNC) != 0)
1695 sc->sc_msgpriq |= SEND_SDTR;
1696 #endif
1697 #if AIC_USE_WIDE
1698 if ((ti->flags & DO_WIDE) != 0)
1699 sc->sc_msgpriq |= SEND_WDTR;
1700 #endif
1701 }
1702
1703 acb->flags |= ACB_NEXUS;
1704 ti->lubusy |= (1 << sc_link->lun);
1705
1706 /* Do an implicit RESTORE POINTERS. */
1707 sc->sc_dp = acb->data_addr;
1708 sc->sc_dleft = acb->data_length;
1709 sc->sc_cp = (u_char *)&acb->scsi_cmd;
1710 sc->sc_cleft = acb->scsi_cmd_length;
1711
1712 /* On our first connection, schedule a timeout. */
1713 if ((acb->xs->flags & SCSI_POLL) == 0)
1714 timeout_add_msec(&acb->xs->stimeout, acb->timeout);
1715
1716 sc->sc_state = AIC_CONNECTED;
1717 } else if ((sstat1 & SELTO) != 0) {
1718 AIC_MISC(("selection timeout "));
1719
1720 if (sc->sc_state != AIC_SELECTING) {
1721 printf("%s: selection timeout while idle; ",
1722 sc->sc_dev.dv_xname);
1723 printf("resetting\n");
1724 AIC_BREAK();
1725 goto reset;
1726 }
1727 AIC_ASSERT(sc->sc_nexus != NULL);
1728 acb = sc->sc_nexus;
1729
1730 bus_space_write_1(iot, ioh, SXFRCTL1, 0);
1731 bus_space_write_1(iot, ioh, SCSISEQ, ENRESELI);
1732 bus_space_write_1(iot, ioh, CLRSINT1, CLRSELTIMO);
1733 delay(250);
1734
1735 acb->xs->error = XS_SELTIMEOUT;
1736 goto finish;
1737 } else {
1738 if (sc->sc_state != AIC_IDLE) {
1739 printf("%s: BUS FREE while not idle; ",
1740 sc->sc_dev.dv_xname);
1741 printf("state=%d\n", sc->sc_state);
1742 AIC_BREAK();
1743 goto out;
1744 }
1745
1746 goto sched;
1747 }
1748
1749 /*
1750 * Turn off selection stuff, and prepare to catch bus free
1751 * interrupts, parity errors, and phase changes.
1752 */
1753 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | CLRSTCNT | CLRCH);
1754 bus_space_write_1(iot, ioh, SXFRCTL1, 0);
1755 bus_space_write_1(iot, ioh, SCSISEQ, ENAUTOATNP);
1756 bus_space_write_1(iot, ioh, CLRSINT0, CLRSELDI | CLRSELDO);
1757 bus_space_write_1(iot, ioh, CLRSINT1,
1758 CLRBUSFREE | CLRPHASECHG);
1759 bus_space_write_1(iot, ioh, SIMODE0, 0);
1760 bus_space_write_1(iot, ioh, SIMODE1,
1761 ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENREQINIT |
1762 ENPHASECHG);
1763
1764 sc->sc_flags = 0;
1765 sc->sc_prevphase = PH_INVALID;
1766 goto dophase;
1767 }
1768
1769 if ((sstat1 & BUSFREE) != 0) {
1770 /* We've gone to BUS FREE phase. */
1771 bus_space_write_1(iot, ioh, CLRSINT1,
1772 CLRBUSFREE | CLRPHASECHG);
1773
1774 switch (sc->sc_state) {
1775 case AIC_RESELECTED:
1776 goto sched;
1777
1778 case AIC_CONNECTED:
1779 AIC_ASSERT(sc->sc_nexus != NULL);
1780 acb = sc->sc_nexus;
1781
1782 #if AIC_USE_SYNCHRONOUS + AIC_USE_WIDE
1783 if (sc->sc_prevphase == PH_MSGOUT) {
1784 /*
1785 * If the target went to BUS FREE phase during
1786 * or immediately after sending a SDTR or WDTR
1787 * message, disable negotiation.
1788 */
1789 sc_link = acb->xs->sc_link;
1790 ti = &sc->sc_tinfo[sc_link->target];
1791 switch (sc->sc_lastmsg) {
1792 #if AIC_USE_SYNCHRONOUS
1793 case SEND_SDTR:
1794 ti->flags &= ~DO_SYNC;
1795 ti->period = ti->offset = 0;
1796 break;
1797 #endif
1798 #if AIC_USE_WIDE
1799 case SEND_WDTR:
1800 ti->flags &= ~DO_WIDE;
1801 ti->width = 0;
1802 break;
1803 #endif
1804 }
1805 }
1806 #endif
1807
1808 if ((sc->sc_flags & AIC_ABORTING) == 0) {
1809 /*
1810 * Section 5.1.1 of the SCSI 2 spec suggests
1811 * issuing a REQUEST SENSE following an
1812 * unexpected disconnect. Some devices go into
1813 * a contingent allegiance condition when
1814 * disconnecting, and this is necessary to
1815 * clean up their state.
1816 */
1817 printf("%s: unexpected disconnect; ",
1818 sc->sc_dev.dv_xname);
1819 printf("sending REQUEST SENSE\n");
1820 AIC_BREAK();
1821 aic_sense(sc, acb);
1822 goto out;
1823 }
1824
1825 acb->xs->error = XS_DRIVER_STUFFUP;
1826 goto finish;
1827
1828 case AIC_DISCONNECT:
1829 AIC_ASSERT(sc->sc_nexus != NULL);
1830 acb = sc->sc_nexus;
1831 #if 1 /* XXXX */
1832 acb->data_addr = sc->sc_dp;
1833 acb->data_length = sc->sc_dleft;
1834 #endif
1835 TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain);
1836 sc->sc_nexus = NULL;
1837 goto sched;
1838
1839 case AIC_CMDCOMPLETE:
1840 AIC_ASSERT(sc->sc_nexus != NULL);
1841 acb = sc->sc_nexus;
1842 goto finish;
1843 }
1844 }
1845
1846 bus_space_write_1(iot, ioh, CLRSINT1, CLRPHASECHG);
1847
1848 dophase:
1849 if ((sstat1 & REQINIT) == 0) {
1850 /* Wait for REQINIT. */
1851 goto out;
1852 }
1853
1854 sc->sc_phase = bus_space_read_1(iot, ioh, SCSISIG) & PH_MASK;
1855 bus_space_write_1(iot, ioh, SCSISIG, sc->sc_phase);
1856
1857 switch (sc->sc_phase) {
1858 case PH_MSGOUT:
1859 if (sc->sc_state != AIC_CONNECTED &&
1860 sc->sc_state != AIC_RESELECTED)
1861 break;
1862 aic_msgout(sc);
1863 sc->sc_prevphase = PH_MSGOUT;
1864 goto loop;
1865
1866 case PH_MSGIN:
1867 if (sc->sc_state != AIC_CONNECTED &&
1868 sc->sc_state != AIC_RESELECTED)
1869 break;
1870 aic_msgin(sc);
1871 sc->sc_prevphase = PH_MSGIN;
1872 goto loop;
1873
1874 case PH_CMD:
1875 if (sc->sc_state != AIC_CONNECTED)
1876 break;
1877 #ifdef AIC_DEBUG
1878 if ((aic_debug & AIC_SHOWMISC) != 0) {
1879 AIC_ASSERT(sc->sc_nexus != NULL);
1880 acb = sc->sc_nexus;
1881 printf("cmd=0x%02x+%d ",
1882 acb->scsi_cmd.opcode, acb->scsi_cmd_length-1);
1883 }
1884 #endif
1885 n = aic_dataout_pio(sc, sc->sc_cp, sc->sc_cleft);
1886 sc->sc_cp += n;
1887 sc->sc_cleft -= n;
1888 sc->sc_prevphase = PH_CMD;
1889 goto loop;
1890
1891 case PH_DATAOUT:
1892 if (sc->sc_state != AIC_CONNECTED)
1893 break;
1894 AIC_MISC(("dataout dleft=%lu ", (u_long)sc->sc_dleft));
1895 n = aic_dataout_pio(sc, sc->sc_dp, sc->sc_dleft);
1896 sc->sc_dp += n;
1897 sc->sc_dleft -= n;
1898 sc->sc_prevphase = PH_DATAOUT;
1899 goto loop;
1900
1901 case PH_DATAIN:
1902 if (sc->sc_state != AIC_CONNECTED)
1903 break;
1904 AIC_MISC(("datain %lu ", (u_long)sc->sc_dleft));
1905 n = aic_datain_pio(sc, sc->sc_dp, sc->sc_dleft);
1906 sc->sc_dp += n;
1907 sc->sc_dleft -= n;
1908 sc->sc_prevphase = PH_DATAIN;
1909 goto loop;
1910
1911 case PH_STAT:
1912 if (sc->sc_state != AIC_CONNECTED)
1913 break;
1914 AIC_ASSERT(sc->sc_nexus != NULL);
1915 acb = sc->sc_nexus;
1916 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | SPIOEN);
1917 acb->target_stat = bus_space_read_1(iot, ioh, SCSIDAT);
1918 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN);
1919 AIC_MISC(("target_stat=0x%02x ", acb->target_stat));
1920 sc->sc_prevphase = PH_STAT;
1921 goto loop;
1922 }
1923
1924 printf("%s: unexpected bus phase; resetting\n", sc->sc_dev.dv_xname);
1925 AIC_BREAK();
1926 reset:
1927 aic_init(sc);
1928 return 1;
1929
1930 finish:
1931 timeout_del(&acb->xs->stimeout);
1932 aic_done(sc, acb);
1933 goto out;
1934
1935 sched:
1936 sc->sc_state = AIC_IDLE;
1937 aic_sched(sc);
1938 goto out;
1939
1940 out:
1941 bus_space_write_1(iot, ioh, DMACNTRL0, INTEN);
1942 return 1;
1943 }
1944
1945 void
aic_abort(struct aic_softc * sc,struct aic_acb * acb)1946 aic_abort(struct aic_softc *sc, struct aic_acb *acb)
1947 {
1948
1949 /* 2 secs for the abort */
1950 acb->timeout = AIC_ABORT_TIMEOUT;
1951 acb->flags |= ACB_ABORT;
1952
1953 if (acb == sc->sc_nexus) {
1954 /*
1955 * If we're still selecting, the message will be scheduled
1956 * after selection is complete.
1957 */
1958 if (sc->sc_state == AIC_CONNECTED)
1959 aic_sched_msgout(sc, SEND_ABORT);
1960 } else {
1961 aic_dequeue(sc, acb);
1962 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
1963 if (sc->sc_state == AIC_IDLE)
1964 aic_sched(sc);
1965 }
1966 }
1967
1968 void
aic_timeout(void * arg)1969 aic_timeout(void *arg)
1970 {
1971 struct aic_acb *acb = arg;
1972 struct scsi_xfer *xs = acb->xs;
1973 struct scsi_link *sc_link = xs->sc_link;
1974 struct aic_softc *sc = sc_link->bus->sb_adapter_softc;
1975 int s;
1976
1977 sc_print_addr(sc_link);
1978 printf("timed out");
1979
1980 s = splbio();
1981
1982 if (acb->flags & ACB_ABORT) {
1983 /* abort timed out */
1984 printf(" AGAIN\n");
1985 /* XXX Must reset! */
1986 } else {
1987 /* abort the operation that has timed out */
1988 printf("\n");
1989 acb->xs->error = XS_TIMEOUT;
1990 aic_abort(sc, acb);
1991 }
1992
1993 splx(s);
1994 }
1995
1996 #ifdef AIC_DEBUG
1997 /*
1998 * The following functions are mostly used for debugging purposes, either
1999 * directly called from the driver or from the kernel debugger.
2000 */
2001
2002 void
aic_show_scsi_cmd(struct aic_acb * acb)2003 aic_show_scsi_cmd(struct aic_acb *acb)
2004 {
2005 u_char *b = (u_char *)&acb->scsi_cmd;
2006 struct scsi_link *sc_link = acb->xs->sc_link;
2007 int i;
2008
2009 sc_print_addr(sc_link);
2010 if ((acb->xs->flags & SCSI_RESET) == 0) {
2011 for (i = 0; i < acb->scsi_cmd_length; i++) {
2012 if (i)
2013 printf(",");
2014 printf("%x", b[i]);
2015 }
2016 printf("\n");
2017 } else
2018 printf("RESET\n");
2019 }
2020
2021 void
aic_print_acb(struct aic_acb * acb)2022 aic_print_acb(struct aic_acb *acb)
2023 {
2024
2025 printf("acb@%p xs=%p flags=%x", acb, acb->xs, acb->flags);
2026 printf(" dp=%p dleft=%d target_stat=%x\n",
2027 acb->data_addr, acb->data_length, acb->target_stat);
2028 aic_show_scsi_cmd(acb);
2029 }
2030
2031 void
aic_print_active_acb(void)2032 aic_print_active_acb(void)
2033 {
2034 struct aic_acb *acb;
2035 struct aic_softc *sc = aic_cd.cd_devs[0];
2036
2037 printf("ready list:\n");
2038 TAILQ_FOREACH(acb, &sc->ready_list, chain)
2039 aic_print_acb(acb);
2040 printf("nexus:\n");
2041 if (sc->sc_nexus != NULL)
2042 aic_print_acb(sc->sc_nexus);
2043 printf("nexus list:\n");
2044 TAILQ_FOREACH(acb, &sc->nexus_list, chain)
2045 aic_print_acb(acb);
2046 }
2047
2048 void
aic_dump6360(struct aic_softc * sc)2049 aic_dump6360(struct aic_softc *sc)
2050 {
2051 bus_space_tag_t iot = sc->sc_iot;
2052 bus_space_handle_t ioh = sc->sc_ioh;
2053
2054 printf("aic6360: SCSISEQ=%x SXFRCTL0=%x SXFRCTL1=%x SCSISIG=%x\n",
2055 bus_space_read_1(iot, ioh, SCSISEQ),
2056 bus_space_read_1(iot, ioh, SXFRCTL0),
2057 bus_space_read_1(iot, ioh, SXFRCTL1),
2058 bus_space_read_1(iot, ioh, SCSISIG));
2059 printf(" SSTAT0=%x SSTAT1=%x SSTAT2=%x SSTAT3=%x SSTAT4=%x\n",
2060 bus_space_read_1(iot, ioh, SSTAT0),
2061 bus_space_read_1(iot, ioh, SSTAT1),
2062 bus_space_read_1(iot, ioh, SSTAT2),
2063 bus_space_read_1(iot, ioh, SSTAT3),
2064 bus_space_read_1(iot, ioh, SSTAT4));
2065 printf(" SIMODE0=%x SIMODE1=%x ",
2066 bus_space_read_1(iot, ioh, SIMODE0),
2067 bus_space_read_1(iot, ioh, SIMODE1));
2068 printf("DMACNTRL0=%x DMACNTRL1=%x DMASTAT=%x\n",
2069 bus_space_read_1(iot, ioh, DMACNTRL0),
2070 bus_space_read_1(iot, ioh, DMACNTRL1),
2071 bus_space_read_1(iot, ioh, DMASTAT));
2072 printf(" FIFOSTAT=%d SCSIBUS=0x%x\n",
2073 bus_space_read_1(iot, ioh, FIFOSTAT),
2074 bus_space_read_1(iot, ioh, SCSIBUS));
2075 }
2076
2077 void
aic_dump_driver(struct aic_softc * sc)2078 aic_dump_driver(struct aic_softc *sc)
2079 {
2080 struct aic_tinfo *ti;
2081 int i;
2082
2083 printf("nexus=%p prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase);
2084 printf("state=%x msgin=%x ", sc->sc_state, sc->sc_imess[0]);
2085 printf("msgpriq=%x msgoutq=%x lastmsg=%x currmsg=%x\n", sc->sc_msgpriq,
2086 sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg);
2087 for (i = 0; i < 7; i++) {
2088 ti = &sc->sc_tinfo[i];
2089 printf("tinfo%d: %d cmds %d disconnects %d timeouts",
2090 i, ti->cmds, ti->dconns, ti->touts);
2091 printf(" %d senses flags=%x\n", ti->senses, ti->flags);
2092 }
2093 }
2094 #endif
2095