1 /*
2 * Copyright 2018 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23 #ifndef __AMDGPU_BO_LIST_H__
24 #define __AMDGPU_BO_LIST_H__
25
26 #include <drm/amdgpu_drm.h>
27
28 struct hmm_range;
29
30 struct drm_file;
31
32 struct amdgpu_device;
33 struct amdgpu_bo;
34 struct amdgpu_bo_va;
35 struct amdgpu_fpriv;
36
37 struct amdgpu_bo_list_entry {
38 struct amdgpu_bo *bo;
39 struct amdgpu_bo_va *bo_va;
40 uint32_t priority;
41 struct vm_page **user_pages;
42 struct hmm_range *range;
43 bool user_invalidated;
44 };
45
46 struct amdgpu_bo_list {
47 struct rcu_head rhead;
48 struct kref refcount;
49 struct amdgpu_bo *gds_obj;
50 struct amdgpu_bo *gws_obj;
51 struct amdgpu_bo *oa_obj;
52 unsigned first_userptr;
53 unsigned num_entries;
54
55 /* Protect access during command submission.
56 */
57 struct rwlock bo_list_mutex;
58 };
59
60 int amdgpu_bo_list_get(struct amdgpu_fpriv *fpriv, int id,
61 struct amdgpu_bo_list **result);
62 void amdgpu_bo_list_put(struct amdgpu_bo_list *list);
63 int amdgpu_bo_create_list_entry_array(struct drm_amdgpu_bo_list_in *in,
64 struct drm_amdgpu_bo_list_entry **info_param);
65
66 int amdgpu_bo_list_create(struct amdgpu_device *adev,
67 struct drm_file *filp,
68 struct drm_amdgpu_bo_list_entry *info,
69 size_t num_entries,
70 struct amdgpu_bo_list **list);
71
72 static inline struct amdgpu_bo_list_entry *
amdgpu_bo_list_array_entry(struct amdgpu_bo_list * list,unsigned index)73 amdgpu_bo_list_array_entry(struct amdgpu_bo_list *list, unsigned index)
74 {
75 struct amdgpu_bo_list_entry *array = (void *)&list[1];
76
77 return &array[index];
78 }
79
80 #define amdgpu_bo_list_for_each_entry(e, list) \
81 for (e = amdgpu_bo_list_array_entry(list, 0); \
82 e != amdgpu_bo_list_array_entry(list, (list)->num_entries); \
83 ++e)
84
85 #define amdgpu_bo_list_for_each_userptr_entry(e, list) \
86 for (e = amdgpu_bo_list_array_entry(list, (list)->first_userptr); \
87 e != amdgpu_bo_list_array_entry(list, (list)->num_entries); \
88 ++e)
89
90 #endif
91