1 /*
2 * Copyright © 2014 Intel Corporation
3 * Copyright © 2015 Advanced Micro Devices, Inc.
4 *
5 * Permission to use, copy, modify, distribute, and sell this software and its
6 * documentation for any purpose is hereby granted without fee, provided that
7 * the above copyright notice appear in all copies and that both that copyright
8 * notice and this permission notice appear in supporting documentation, and
9 * that the name of the copyright holders not be used in advertising or
10 * publicity pertaining to distribution of the software without specific,
11 * written prior permission. The copyright holders make no representations
12 * about the suitability of this software for any purpose. It is provided "as
13 * is" without express or implied warranty.
14 *
15 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
16 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
17 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
18 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
19 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
20 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
21 * OF THIS SOFTWARE.
22 */
23
24 #ifdef HAVE_CONFIG_H
25 #include "config.h"
26 #endif
27
28 #include "amdgpu_drv.h"
29
30 #ifdef HAVE_PRESENT_H
31
32 #include <stdio.h>
33 #include <string.h>
34 #include <assert.h>
35 #include <sys/types.h>
36 #include <sys/stat.h>
37 #include <sys/ioctl.h>
38 #include <unistd.h>
39 #include <fcntl.h>
40 #include <poll.h>
41 #include <sys/time.h>
42 #include <time.h>
43 #include <errno.h>
44
45 #include "amdgpu_glamor.h"
46 #include "amdgpu_pixmap.h"
47 #include "amdgpu_video.h"
48
49 #include "present.h"
50
51 static present_screen_info_rec amdgpu_present_screen_info;
52
53 struct amdgpu_present_vblank_event {
54 uint64_t event_id;
55 Bool unflip;
56 };
57
58 static RRCrtcPtr
amdgpu_present_get_crtc(WindowPtr window)59 amdgpu_present_get_crtc(WindowPtr window)
60 {
61 ScreenPtr screen = window->drawable.pScreen;
62 ScrnInfoPtr pScrn = xf86ScreenToScrn(screen);
63 xf86CrtcPtr crtc;
64 RRCrtcPtr randr_crtc = NULL;
65
66 crtc = amdgpu_pick_best_crtc(pScrn, FALSE,
67 window->drawable.x,
68 window->drawable.x + window->drawable.width,
69 window->drawable.y,
70 window->drawable.y + window->drawable.height);
71
72 if (crtc)
73 randr_crtc = crtc->randr_crtc;
74
75 return randr_crtc;
76 }
77
78 static int
amdgpu_present_get_ust_msc(RRCrtcPtr crtc,CARD64 * ust,CARD64 * msc)79 amdgpu_present_get_ust_msc(RRCrtcPtr crtc, CARD64 *ust, CARD64 *msc)
80 {
81 xf86CrtcPtr xf86_crtc = crtc->devPrivate;
82 drmmode_crtc_private_ptr drmmode_crtc = xf86_crtc->driver_private;
83
84 if (drmmode_crtc->dpms_mode != DPMSModeOn)
85 return BadAlloc;
86
87 return drmmode_crtc_get_ust_msc(xf86_crtc, ust, msc);
88 }
89
90 /*
91 * Changes the variable refresh state for every CRTC on the screen.
92 */
93 void
amdgpu_present_set_screen_vrr(ScrnInfoPtr scrn,Bool vrr_enabled)94 amdgpu_present_set_screen_vrr(ScrnInfoPtr scrn, Bool vrr_enabled)
95 {
96 xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(scrn);
97 xf86CrtcPtr crtc;
98 int i;
99
100 for (i = 0; i < config->num_crtc; i++) {
101 crtc = config->crtc[i];
102 drmmode_crtc_set_vrr(crtc, vrr_enabled);
103 }
104 }
105
106 /*
107 * Flush the DRM event queue when full; this
108 * makes space for new requests
109 */
110 static Bool
amdgpu_present_flush_drm_events(ScreenPtr screen)111 amdgpu_present_flush_drm_events(ScreenPtr screen)
112 {
113 ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
114 AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(scrn);
115 xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn);
116 drmmode_crtc_private_ptr drmmode_crtc = xf86_config->crtc[0]->driver_private;
117 drmmode_ptr drmmode = drmmode_crtc->drmmode;
118 struct pollfd p = { .fd = pAMDGPUEnt->fd, .events = POLLIN };
119 int r;
120
121 do {
122 r = poll(&p, 1, 0);
123 } while (r == -1 && (errno == EINTR || errno == EAGAIN));
124
125 if (r <= 0)
126 return 0;
127
128 return amdgpu_drm_handle_event(pAMDGPUEnt->fd, &drmmode->event_context) >= 0;
129 }
130
131 /*
132 * Called when the queued vblank event has occurred
133 */
134 static void
amdgpu_present_vblank_handler(xf86CrtcPtr crtc,unsigned int msc,uint64_t usec,void * data)135 amdgpu_present_vblank_handler(xf86CrtcPtr crtc, unsigned int msc,
136 uint64_t usec, void *data)
137 {
138 struct amdgpu_present_vblank_event *event = data;
139
140 present_event_notify(event->event_id, usec, msc);
141 free(event);
142 }
143
144 /*
145 * Called when the queued vblank is aborted
146 */
147 static void
amdgpu_present_vblank_abort(xf86CrtcPtr crtc,void * data)148 amdgpu_present_vblank_abort(xf86CrtcPtr crtc, void *data)
149 {
150 struct amdgpu_present_vblank_event *event = data;
151
152 free(event);
153 }
154
155 /*
156 * Queue an event to report back to the Present extension when the specified
157 * MSC has past
158 */
159 static int
amdgpu_present_queue_vblank(RRCrtcPtr crtc,uint64_t event_id,uint64_t msc)160 amdgpu_present_queue_vblank(RRCrtcPtr crtc, uint64_t event_id, uint64_t msc)
161 {
162 xf86CrtcPtr xf86_crtc = crtc->devPrivate;
163 ScreenPtr screen = crtc->pScreen;
164 struct amdgpu_present_vblank_event *event;
165 uintptr_t drm_queue_seq;
166
167 event = calloc(sizeof(struct amdgpu_present_vblank_event), 1);
168 if (!event)
169 return BadAlloc;
170 event->event_id = event_id;
171
172 drm_queue_seq = amdgpu_drm_queue_alloc(xf86_crtc,
173 AMDGPU_DRM_QUEUE_CLIENT_DEFAULT,
174 event_id, event,
175 amdgpu_present_vblank_handler,
176 amdgpu_present_vblank_abort,
177 FALSE);
178 if (drm_queue_seq == AMDGPU_DRM_QUEUE_ERROR) {
179 free(event);
180 return BadAlloc;
181 }
182
183 for (;;) {
184 if (drmmode_wait_vblank(xf86_crtc,
185 DRM_VBLANK_ABSOLUTE | DRM_VBLANK_EVENT, msc,
186 drm_queue_seq, NULL, NULL))
187 break;
188 if (errno != EBUSY || !amdgpu_present_flush_drm_events(screen)) {
189 amdgpu_drm_abort_entry(drm_queue_seq);
190 return BadAlloc;
191 }
192 }
193
194 return Success;
195 }
196
197 /*
198 * Remove a pending vblank event from the DRM queue so that it is not reported
199 * to the extension
200 */
201 static void
amdgpu_present_abort_vblank(RRCrtcPtr crtc,uint64_t event_id,uint64_t msc)202 amdgpu_present_abort_vblank(RRCrtcPtr crtc, uint64_t event_id, uint64_t msc)
203 {
204 amdgpu_drm_abort_id(event_id);
205 }
206
207 /*
208 * Flush our batch buffer when requested by the Present extension.
209 */
210 static void
amdgpu_present_flush(WindowPtr window)211 amdgpu_present_flush(WindowPtr window)
212 {
213 amdgpu_glamor_flush(xf86ScreenToScrn(window->drawable.pScreen));
214 }
215
216 /*
217 * Test to see if unflipping is possible
218 *
219 * These tests have to pass for flips as well
220 */
221 static Bool
amdgpu_present_check_unflip(ScrnInfoPtr scrn)222 amdgpu_present_check_unflip(ScrnInfoPtr scrn)
223 {
224 xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(scrn);
225 int num_crtcs_on;
226 int i;
227
228 if (!scrn->vtSema)
229 return FALSE;
230
231 for (i = 0, num_crtcs_on = 0; i < config->num_crtc; i++) {
232 xf86CrtcPtr crtc = config->crtc[i];
233
234 if (drmmode_crtc_can_flip(crtc)) {
235 drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
236
237 if (drmmode_crtc->flip_pending)
238 return FALSE;
239
240 if (!drmmode_crtc->tear_free)
241 num_crtcs_on++;
242 }
243 }
244
245 return num_crtcs_on > 0;
246 }
247
248 /*
249 * Test to see if page flipping is possible on the target crtc
250 */
251 static Bool
amdgpu_present_check_flip(RRCrtcPtr crtc,WindowPtr window,PixmapPtr pixmap,Bool sync_flip)252 amdgpu_present_check_flip(RRCrtcPtr crtc, WindowPtr window, PixmapPtr pixmap,
253 Bool sync_flip)
254 {
255 xf86CrtcPtr xf86_crtc = crtc->devPrivate;
256 ScreenPtr screen = window->drawable.pScreen;
257 ScrnInfoPtr scrn = xf86_crtc->scrn;
258 struct amdgpu_pixmap *priv = amdgpu_get_pixmap_private(pixmap);
259 PixmapPtr screen_pixmap = screen->GetScreenPixmap(screen);
260 xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(scrn);
261 AMDGPUInfoPtr info = AMDGPUPTR(scrn);
262 int num_crtcs_on;
263 Bool dc_enabled;
264 int i;
265
266 if (!scrn->vtSema)
267 return FALSE;
268
269 if (!info->allowPageFlip)
270 return FALSE;
271
272 if (info->sprites_visible > 0)
273 return FALSE;
274
275 if (info->drmmode.dri2_flipping)
276 return FALSE;
277
278 if (priv && priv->fb_failed)
279 return FALSE;
280
281 if (!amdgpu_pixmap_get_fb(pixmap)) {
282 if (!priv)
283 priv = amdgpu_get_pixmap_private(pixmap);
284
285 if (priv && !priv->fb_failed) {
286 xf86DrvMsg(scrn->scrnIndex, X_WARNING,
287 "Cannot get FB for Present flip (may be "
288 "normal if using PRIME render offloading)\n");
289 priv->fb_failed = TRUE;
290 }
291
292 return FALSE;
293 }
294
295 /* Only DC supports advanced color management features, so we can use
296 * drmmode_cm_enabled as a proxy for "Is DC enabled?"
297 */
298 dc_enabled = drmmode_cm_enabled(&info->drmmode);
299
300 if (info->dri2.pKernelDRMVersion->version_minor < (dc_enabled ? 31 : 34)) {
301 /* The kernel driver doesn't handle flipping between BOs with
302 * different pitch correctly
303 */
304 if (pixmap->devKind != screen_pixmap->devKind)
305 return FALSE;
306 }
307
308 if (!dc_enabled || info->dri2.pKernelDRMVersion->version_minor < 31) {
309 /* The kernel driver doesn't handle flipping between BOs with
310 * different tiling parameters correctly
311 */
312 if (amdgpu_pixmap_get_tiling_info(pixmap) !=
313 amdgpu_pixmap_get_tiling_info(screen_pixmap))
314 return FALSE;
315 }
316
317 for (i = 0, num_crtcs_on = 0; i < config->num_crtc; i++) {
318 if (drmmode_crtc_can_flip(config->crtc[i]))
319 num_crtcs_on++;
320 else if (config->crtc[i] == crtc->devPrivate)
321 return FALSE;
322 }
323
324 if (num_crtcs_on == 0)
325 return FALSE;
326
327 info->flip_window = window;
328
329 return TRUE;
330 }
331
332 /*
333 * Once the flip has been completed on all CRTCs, notify the
334 * extension code telling it when that happened
335 */
336 static void
amdgpu_present_flip_event(xf86CrtcPtr crtc,uint32_t msc,uint64_t ust,void * pageflip_data)337 amdgpu_present_flip_event(xf86CrtcPtr crtc, uint32_t msc, uint64_t ust, void *pageflip_data)
338 {
339 AMDGPUInfoPtr info = AMDGPUPTR(crtc->scrn);
340 struct amdgpu_present_vblank_event *event = pageflip_data;
341
342 if (event->unflip)
343 info->drmmode.present_flipping = FALSE;
344
345 present_event_notify(event->event_id, ust, msc);
346 free(event);
347 }
348
349 /*
350 * The flip has been aborted, free the structure
351 */
352 static void
amdgpu_present_flip_abort(xf86CrtcPtr crtc,void * pageflip_data)353 amdgpu_present_flip_abort(xf86CrtcPtr crtc, void *pageflip_data)
354 {
355 struct amdgpu_present_vblank_event *event = pageflip_data;
356
357 free(event);
358 }
359
360 /*
361 * Queue a flip on 'crtc' to 'pixmap' at 'target_msc'. If 'sync_flip' is true,
362 * then wait for vblank. Otherwise, flip immediately
363 */
364 static Bool
amdgpu_present_flip(RRCrtcPtr crtc,uint64_t event_id,uint64_t target_msc,PixmapPtr pixmap,Bool sync_flip)365 amdgpu_present_flip(RRCrtcPtr crtc, uint64_t event_id, uint64_t target_msc,
366 PixmapPtr pixmap, Bool sync_flip)
367 {
368 xf86CrtcPtr xf86_crtc = crtc->devPrivate;
369 ScrnInfoPtr scrn = xf86_crtc->scrn;
370 AMDGPUInfoPtr info = AMDGPUPTR(scrn);
371 struct amdgpu_present_vblank_event *event;
372 Bool ret = FALSE;
373
374 if (!amdgpu_present_check_flip(crtc, info->flip_window, pixmap, sync_flip))
375 return ret;
376
377 event = calloc(1, sizeof(struct amdgpu_present_vblank_event));
378 if (!event)
379 return ret;
380
381 event->event_id = event_id;
382
383 /* A window can only flip if it covers the entire X screen.
384 * Only one window can flip at a time.
385 *
386 * If the window also has the variable refresh property then
387 * variable refresh supported can be enabled on every CRTC.
388 */
389 if (info->vrr_support &&
390 amdgpu_window_has_variable_refresh(info->flip_window))
391 amdgpu_present_set_screen_vrr(scrn, TRUE);
392
393 amdgpu_glamor_flush(scrn);
394
395 ret = amdgpu_do_pageflip(scrn, AMDGPU_DRM_QUEUE_CLIENT_DEFAULT,
396 pixmap, event_id, event, crtc->devPrivate,
397 amdgpu_present_flip_event,
398 amdgpu_present_flip_abort,
399 sync_flip ? FLIP_VSYNC : FLIP_ASYNC,
400 target_msc);
401 if (!ret)
402 xf86DrvMsg(scrn->scrnIndex, X_ERROR, "present flip failed\n");
403 else
404 info->drmmode.present_flipping = TRUE;
405
406 return ret;
407 }
408
409 /*
410 * Queue a flip back to the normal frame buffer
411 */
412 static void
amdgpu_present_unflip(ScreenPtr screen,uint64_t event_id)413 amdgpu_present_unflip(ScreenPtr screen, uint64_t event_id)
414 {
415 ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
416 AMDGPUInfoPtr info = AMDGPUPTR(scrn);
417 xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(scrn);
418 struct amdgpu_present_vblank_event *event;
419 PixmapPtr pixmap = screen->GetScreenPixmap(screen);
420 enum drmmode_flip_sync flip_sync =
421 (amdgpu_present_screen_info.capabilities & PresentCapabilityAsync) ?
422 FLIP_ASYNC : FLIP_VSYNC;
423 int i;
424
425 amdgpu_present_set_screen_vrr(scrn, FALSE);
426
427 if (!amdgpu_present_check_unflip(scrn))
428 goto modeset;
429
430 event = calloc(1, sizeof(struct amdgpu_present_vblank_event));
431 if (!event) {
432 ErrorF("%s: calloc failed, display might freeze\n", __func__);
433 goto modeset;
434 }
435
436 event->event_id = event_id;
437 event->unflip = TRUE;
438
439 amdgpu_glamor_flush(scrn);
440 if (amdgpu_do_pageflip(scrn, AMDGPU_DRM_QUEUE_CLIENT_DEFAULT, pixmap,
441 event_id, event, NULL, amdgpu_present_flip_event,
442 amdgpu_present_flip_abort, flip_sync, 0))
443 return;
444
445 modeset:
446 amdgpu_glamor_finish(scrn);
447 for (i = 0; i < config->num_crtc; i++) {
448 xf86CrtcPtr crtc = config->crtc[i];
449 drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
450
451 if (!crtc->enabled || drmmode_crtc->tear_free)
452 continue;
453
454 if (drmmode_crtc->dpms_mode == DPMSModeOn)
455 crtc->funcs->set_mode_major(crtc, &crtc->mode, crtc->rotation,
456 crtc->x, crtc->y);
457 else
458 drmmode_crtc->need_modeset = TRUE;
459 }
460
461 present_event_notify(event_id, 0, 0);
462 info->drmmode.present_flipping = FALSE;
463 }
464
465 static present_screen_info_rec amdgpu_present_screen_info = {
466 .version = 0,
467
468 .get_crtc = amdgpu_present_get_crtc,
469 .get_ust_msc = amdgpu_present_get_ust_msc,
470 .queue_vblank = amdgpu_present_queue_vblank,
471 .abort_vblank = amdgpu_present_abort_vblank,
472 .flush = amdgpu_present_flush,
473
474 .capabilities = PresentCapabilityNone,
475 .check_flip = amdgpu_present_check_flip,
476 .flip = amdgpu_present_flip,
477 .unflip = amdgpu_present_unflip,
478 };
479
480 static Bool
amdgpu_present_has_async_flip(ScreenPtr screen)481 amdgpu_present_has_async_flip(ScreenPtr screen)
482 {
483 #ifdef DRM_CAP_ASYNC_PAGE_FLIP
484 ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
485 AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(scrn);
486 int ret;
487 uint64_t value;
488
489 ret = drmGetCap(pAMDGPUEnt->fd, DRM_CAP_ASYNC_PAGE_FLIP, &value);
490 if (ret == 0)
491 return value == 1;
492 #endif
493 return FALSE;
494 }
495
496 Bool
amdgpu_present_screen_init(ScreenPtr screen)497 amdgpu_present_screen_init(ScreenPtr screen)
498 {
499 if (amdgpu_present_has_async_flip(screen))
500 amdgpu_present_screen_info.capabilities |= PresentCapabilityAsync;
501
502 if (!present_screen_init(screen, &amdgpu_present_screen_info)) {
503 xf86DrvMsg(xf86ScreenToScrn(screen)->scrnIndex, X_WARNING,
504 "Present extension disabled because present_screen_init failed\n");
505 return FALSE;
506 }
507
508 xf86DrvMsg(xf86ScreenToScrn(screen)->scrnIndex, X_INFO,
509 "Present extension enabled\n");
510
511 return TRUE;
512 }
513
514 #else /* !HAVE_PRESENT_H */
515
516 Bool
amdgpu_present_screen_init(ScreenPtr screen)517 amdgpu_present_screen_init(ScreenPtr screen)
518 {
519 xf86DrvMsg(xf86ScreenToScrn(screen)->scrnIndex, X_INFO,
520 "Present extension disabled because present.h not available at "
521 "build time\n");
522
523 return FALSE;
524 }
525
526 #endif
527