xref: /openbsd/sys/arch/alpha/pci/apecs_dma.c (revision 2fce6f75)
1 /* $OpenBSD: apecs_dma.c,v 1.7 2009/02/01 14:34:00 miod Exp $ */
2 /* $NetBSD: apecs_dma.c,v 1.13 2000/06/29 08:58:45 mrg Exp $ */
3 
4 /*-
5  * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
6  * All rights reserved.
7  *
8  * This code is derived from software contributed to The NetBSD Foundation
9  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10  * NASA Ames Research Center.
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions
14  * are met:
15  * 1. Redistributions of source code must retain the above copyright
16  *    notice, this list of conditions and the following disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31  * POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 /*
35  * XXX - We should define this before including bus.h, but since other stuff
36  *       pulls in bus.h we must do this here.
37  */
38 #define _ALPHA_BUS_DMA_PRIVATE
39 
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/kernel.h>
43 #include <sys/device.h>
44 #include <sys/malloc.h>
45 
46 #include <uvm/uvm_extern.h>
47 
48 #include <machine/bus.h>
49 
50 #include <dev/pci/pcireg.h>
51 #include <dev/pci/pcivar.h>
52 #include <alpha/pci/apecsreg.h>
53 #include <alpha/pci/apecsvar.h>
54 
55 bus_dma_tag_t apecs_dma_get_tag(bus_dma_tag_t, alpha_bus_t);
56 
57 int	apecs_bus_dmamap_load_sgmap(bus_dma_tag_t, bus_dmamap_t, void *,
58 	    bus_size_t, struct proc *, int);
59 
60 int	apecs_bus_dmamap_load_mbuf_sgmap(bus_dma_tag_t, bus_dmamap_t,
61 	    struct mbuf *, int);
62 
63 int	apecs_bus_dmamap_load_uio_sgmap(bus_dma_tag_t, bus_dmamap_t,
64 	    struct uio *, int);
65 
66 int	apecs_bus_dmamap_load_raw_sgmap(bus_dma_tag_t, bus_dmamap_t,
67 	    bus_dma_segment_t *, int, bus_size_t, int);
68 
69 void	apecs_bus_dmamap_unload_sgmap(bus_dma_tag_t, bus_dmamap_t);
70 
71 /*
72  * Direct-mapped window: 1G at 1G
73  */
74 #define	APECS_DIRECT_MAPPED_BASE (1*1024*1024*1024)
75 #define	APECS_DIRECT_MAPPED_SIZE (1*1024*1024*1024)
76 
77 /*
78  * SGMAP window: 8M at 8M
79  */
80 #define	APECS_SGMAP_MAPPED_BASE	(8*1024*1024)
81 #define	APECS_SGMAP_MAPPED_SIZE	(8*1024*1024)
82 
83 /*
84  * Macro to flush APECS scatter/gather TLB.
85  */
86 #define	APECS_TLB_INVALIDATE() \
87 do { \
88 	alpha_mb(); \
89 	REGVAL(EPIC_TBIA) = 0; \
90 	alpha_mb(); \
91 } while (0)
92 
93 void
apecs_dma_init(acp)94 apecs_dma_init(acp)
95 	struct apecs_config *acp;
96 {
97 	bus_addr_t tbase;
98 	bus_dma_tag_t t;
99 
100 	/*
101 	 * Initialize the DMA tag used for direct-mapped DMA.
102 	 */
103 	t = &acp->ac_dmat_direct;
104 	t->_cookie = acp;
105 	t->_wbase = APECS_DIRECT_MAPPED_BASE;
106 	t->_wsize = APECS_DIRECT_MAPPED_SIZE;
107 	t->_next_window = NULL;
108 	t->_boundary = 0;
109 	t->_sgmap = NULL;
110 	t->_get_tag = apecs_dma_get_tag;
111 	t->_dmamap_create = _bus_dmamap_create;
112 	t->_dmamap_destroy = _bus_dmamap_destroy;
113 	t->_dmamap_load = _bus_dmamap_load_direct;
114 	t->_dmamap_load_mbuf = _bus_dmamap_load_mbuf_direct;
115 	t->_dmamap_load_uio = _bus_dmamap_load_uio_direct;
116 	t->_dmamap_load_raw = _bus_dmamap_load_raw_direct;
117 	t->_dmamap_unload = _bus_dmamap_unload;
118 	t->_dmamap_sync = _bus_dmamap_sync;
119 
120 	t->_dmamem_alloc = _bus_dmamem_alloc;
121 	t->_dmamem_free = _bus_dmamem_free;
122 	t->_dmamem_map = _bus_dmamem_map;
123 	t->_dmamem_unmap = _bus_dmamem_unmap;
124 	t->_dmamem_mmap = _bus_dmamem_mmap;
125 
126 	/*
127 	 * Initialize the DMA tag used for sgmap-mapped DMA.
128 	 */
129 	t = &acp->ac_dmat_sgmap;
130 	t->_cookie = acp;
131 	t->_wbase = APECS_SGMAP_MAPPED_BASE;
132 	t->_wsize = APECS_SGMAP_MAPPED_SIZE;
133 	t->_next_window = NULL;
134 	t->_boundary = 0;
135 	t->_sgmap = &acp->ac_sgmap;
136 	t->_get_tag = apecs_dma_get_tag;
137 	t->_dmamap_create = alpha_sgmap_dmamap_create;
138 	t->_dmamap_destroy = alpha_sgmap_dmamap_destroy;
139 	t->_dmamap_load = apecs_bus_dmamap_load_sgmap;
140 	t->_dmamap_load_mbuf = apecs_bus_dmamap_load_mbuf_sgmap;
141 	t->_dmamap_load_uio = apecs_bus_dmamap_load_uio_sgmap;
142 	t->_dmamap_load_raw = apecs_bus_dmamap_load_raw_sgmap;
143 	t->_dmamap_unload = apecs_bus_dmamap_unload_sgmap;
144 	t->_dmamap_sync = _bus_dmamap_sync;
145 
146 	t->_dmamem_alloc = _bus_dmamem_alloc;
147 	t->_dmamem_free = _bus_dmamem_free;
148 	t->_dmamem_map = _bus_dmamem_map;
149 	t->_dmamem_unmap = _bus_dmamem_unmap;
150 	t->_dmamem_mmap = _bus_dmamem_mmap;
151 
152 	/*
153 	 * The firmware has set up window 2 as a 1G direct-mapped DMA
154 	 * window beginning at 1G.  We leave it alone.  Disable
155 	 * window 1.
156 	 */
157 	REGVAL(EPIC_PCI_BASE_1) = 0;
158 	alpha_mb();
159 
160 	/*
161 	 * Initialize the SGMAP.
162 	 */
163 	alpha_sgmap_init(t, &acp->ac_sgmap, "apecs_sgmap",
164 	    APECS_SGMAP_MAPPED_BASE, 0, APECS_SGMAP_MAPPED_SIZE,
165 	    sizeof(u_int64_t), NULL, 0);
166 
167 	/*
168 	 * Set up window 1 as an 8MB SGMAP-mapped window
169 	 * starting at 8MB.
170 	 */
171 	REGVAL(EPIC_PCI_BASE_1) = APECS_SGMAP_MAPPED_BASE |
172 	    EPIC_PCI_BASE_SGEN | EPIC_PCI_BASE_WENB;
173 	alpha_mb();
174 
175 	REGVAL(EPIC_PCI_MASK_1) = EPIC_PCI_MASK_8M;
176 	alpha_mb();
177 
178 	tbase = acp->ac_sgmap.aps_ptpa >> EPIC_TBASE_SHIFT;
179 	if ((tbase & EPIC_TBASE_T_BASE) != tbase)
180 		panic("apecs_dma_init: bad page table address");
181 	REGVAL(EPIC_TBASE_1) = tbase;
182 	alpha_mb();
183 
184 	APECS_TLB_INVALIDATE();
185 
186 	/* XXX XXX BEGIN XXX XXX */
187 	{							/* XXX */
188 		extern paddr_t alpha_XXX_dmamap_or;		/* XXX */
189 		alpha_XXX_dmamap_or = APECS_DIRECT_MAPPED_BASE;	/* XXX */
190 	}							/* XXX */
191 	/* XXX XXX END XXX XXX */
192 }
193 
194 /*
195  * Return the bus dma tag to be used for the specified bus type.
196  * INTERNAL USE ONLY!
197  */
198 bus_dma_tag_t
apecs_dma_get_tag(t,bustype)199 apecs_dma_get_tag(t, bustype)
200 	bus_dma_tag_t t;
201 	alpha_bus_t bustype;
202 {
203 	struct apecs_config *acp = t->_cookie;
204 
205 	switch (bustype) {
206 	case ALPHA_BUS_PCI:
207 	case ALPHA_BUS_EISA:
208 		/*
209 		 * Systems with an APECS can only support 1G
210 		 * of memory, so we use the direct-mapped window
211 		 * on busses that have 32-bit DMA.
212 		 */
213 		return (&acp->ac_dmat_direct);
214 
215 	case ALPHA_BUS_ISA:
216 		/*
217 		 * ISA doesn't have enough address bits to use
218 		 * the direct-mapped DMA window, so we must use
219 		 * SGMAPs.
220 		 */
221 		return (&acp->ac_dmat_sgmap);
222 
223 	default:
224 		panic("apecs_dma_get_tag: shouldn't be here, really...");
225 	}
226 }
227 
228 /*
229  * Load an APECS SGMAP-mapped DMA map with a linear buffer.
230  */
231 int
apecs_bus_dmamap_load_sgmap(t,map,buf,buflen,p,flags)232 apecs_bus_dmamap_load_sgmap(t, map, buf, buflen, p, flags)
233 	bus_dma_tag_t t;
234 	bus_dmamap_t map;
235 	void *buf;
236 	bus_size_t buflen;
237 	struct proc *p;
238 	int flags;
239 {
240 	int error;
241 
242 	error = pci_sgmap_pte64_load(t, map, buf, buflen, p, flags,
243 	    t->_sgmap);
244 	if (error == 0)
245 		APECS_TLB_INVALIDATE();
246 
247 	return (error);
248 }
249 
250 /*
251  * Load an APECS SGMAP-mapped DMA map with an mbuf chain.
252  */
253 int
apecs_bus_dmamap_load_mbuf_sgmap(t,map,m,flags)254 apecs_bus_dmamap_load_mbuf_sgmap(t, map, m, flags)
255 	bus_dma_tag_t t;
256 	bus_dmamap_t map;
257 	struct mbuf *m;
258 	int flags;
259 {
260 	int error;
261 
262 	error = pci_sgmap_pte64_load_mbuf(t, map, m, flags, t->_sgmap);
263 	if (error == 0)
264 		APECS_TLB_INVALIDATE();
265 
266 	return (error);
267 }
268 
269 /*
270  * Load an APECS SGMAP-mapped DMA map with a uio.
271  */
272 int
apecs_bus_dmamap_load_uio_sgmap(t,map,uio,flags)273 apecs_bus_dmamap_load_uio_sgmap(t, map, uio, flags)
274 	bus_dma_tag_t t;
275 	bus_dmamap_t map;
276 	struct uio *uio;
277 	int flags;
278 {
279 	int error;
280 
281 	error = pci_sgmap_pte64_load_uio(t, map, uio, flags, t->_sgmap);
282 	if (error == 0)
283 		APECS_TLB_INVALIDATE();
284 
285 	return (error);
286 }
287 
288 /*
289  * Load an APECS SGMAP-mapped DMA map with raw memory.
290  */
291 int
apecs_bus_dmamap_load_raw_sgmap(t,map,segs,nsegs,size,flags)292 apecs_bus_dmamap_load_raw_sgmap(t, map, segs, nsegs, size, flags)
293 	bus_dma_tag_t t;
294 	bus_dmamap_t map;
295 	bus_dma_segment_t *segs;
296 	int nsegs;
297 	bus_size_t size;
298 	int flags;
299 {
300 	int error;
301 
302 	error = pci_sgmap_pte64_load_raw(t, map, segs, nsegs, size, flags,
303 	    t->_sgmap);
304 	if (error == 0)
305 		APECS_TLB_INVALIDATE();
306 
307 	return (error);
308 }
309 
310 /*
311  * Unload an APECS DMA map.
312  */
313 void
apecs_bus_dmamap_unload_sgmap(t,map)314 apecs_bus_dmamap_unload_sgmap(t, map)
315 	bus_dma_tag_t t;
316 	bus_dmamap_t map;
317 {
318 
319 	/*
320 	 * Invalidate any SGMAP page table entries used by this
321 	 * mapping.
322 	 */
323 	pci_sgmap_pte64_unload(t, map, t->_sgmap);
324 	APECS_TLB_INVALIDATE();
325 
326 	/*
327 	 * Do the generic bits of the unload.
328 	 */
329 	_bus_dmamap_unload(t, map);
330 }
331