1 /*-
2 * Copyright (c) 1998 - 2008 Søren Schmidt <sos@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27 /* local prototypes */
28 static int ata_acard_chipinit(device_t dev);
29 static int ata_acard_allocate(device_t dev);
30 static int ata_acard_status(device_t dev);
31 static void ata_acard_850_setmode(device_t dev, int mode);
32 static void ata_acard_86X_setmode(device_t dev, int mode);
33
34 static int ata_serialize(device_t dev, int flags);
35
36 /* misc defines */
37 #define ATP_OLD 1
38
39 /*
40 * Acard chipset support functions
41 */
42 int
ata_acard_ident(device_t dev)43 ata_acard_ident(device_t dev)
44 {
45 struct ata_pci_controller *ctlr = device_get_softc(dev);
46 static const struct ata_chip_id ids[] =
47 {{ ATA_ATP850R, 0, ATP_OLD, 0x00, ATA_UDMA2, "ATP850" },
48 { ATA_ATP860A, 0, 0, 0x00, ATA_UDMA4, "ATP860A" },
49 { ATA_ATP860R, 0, 0, 0x00, ATA_UDMA4, "ATP860R" },
50 { ATA_ATP865A, 0, 0, 0x00, ATA_UDMA6, "ATP865A" },
51 { ATA_ATP865R, 0, 0, 0x00, ATA_UDMA6, "ATP865R" },
52 { 0, 0, 0, 0, 0, 0}};
53
54 if (pci_get_vendor(dev) != ATA_ACARD_ID)
55 return ENXIO;
56
57 if (!(ctlr->chip = ata_match_chip(dev, ids)))
58 return ENXIO;
59
60 ata_set_desc(dev);
61 ctlr->chipinit = ata_acard_chipinit;
62 return 0;
63 }
64
65 static int
ata_acard_chipinit(device_t dev)66 ata_acard_chipinit(device_t dev)
67 {
68 struct ata_pci_controller *ctlr = device_get_softc(dev);
69
70 if (ata_setup_interrupt(dev, ata_generic_intr))
71 return ENXIO;
72
73 ctlr->allocate = ata_acard_allocate;
74 if (ctlr->chip->cfg1 == ATP_OLD) {
75 ctlr->setmode = ata_acard_850_setmode;
76 ctlr->locking = ata_serialize;
77 }
78 else
79 ctlr->setmode = ata_acard_86X_setmode;
80 return 0;
81 }
82
83 static int
ata_acard_allocate(device_t dev)84 ata_acard_allocate(device_t dev)
85 {
86 struct ata_channel *ch = device_get_softc(dev);
87
88 /* setup the usual register normal pci style */
89 if (ata_pci_allocate(dev))
90 return ENXIO;
91
92 ch->hw.status = ata_acard_status;
93 return 0;
94 }
95
96 static int
ata_acard_status(device_t dev)97 ata_acard_status(device_t dev)
98 {
99 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
100 struct ata_channel *ch = device_get_softc(dev);
101
102 if (ctlr->chip->cfg1 == ATP_OLD &&
103 ATA_LOCKING(ch->dev, ATA_LF_WHICH) != ch->unit)
104 return 0;
105 if (ch->dma && (ch->dma->flags & ATA_DMA_ACTIVE)) {
106 int bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
107
108 if ((bmstat & (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) !=
109 ATA_BMSTAT_INTERRUPT)
110 return 0;
111 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, bmstat & ~ATA_BMSTAT_ERROR);
112 DELAY(1);
113 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
114 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
115 DELAY(1);
116 }
117 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) {
118 DELAY(100);
119 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY)
120 return 0;
121 }
122 return 1;
123 }
124
125 static void
ata_acard_850_setmode(device_t dev,int mode)126 ata_acard_850_setmode(device_t dev, int mode)
127 {
128 device_t gparent = GRANDPARENT(dev);
129 struct ata_pci_controller *ctlr = device_get_softc(gparent);
130 struct ata_channel *ch = device_get_softc(device_get_parent(dev));
131 struct ata_device *atadev = device_get_softc(dev);
132 int devno = (ch->unit << 1) + atadev->unit;
133 int error;
134
135 mode = ata_limit_mode(dev, mode,
136 ata_atapi(dev) ? ATA_PIO_MAX : ctlr->chip->max_dma);
137
138 /* XXX SOS missing WDMA0+1 + PIO modes */
139 if (mode >= ATA_WDMA2) {
140 error = ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode);
141 if (bootverbose)
142 device_printf(dev, "%ssetting %s on %s chip\n",
143 (error) ? "FAILURE " : "",
144 ata_mode2str(mode), ctlr->chip->text);
145 if (!error) {
146 u_int8_t reg54 = pci_read_config(gparent, 0x54, 1);
147
148 reg54 &= ~(0x03 << (devno << 1));
149 if (mode >= ATA_UDMA0)
150 reg54 |= (((mode & ATA_MODE_MASK) + 1) << (devno << 1));
151 pci_write_config(gparent, 0x54, reg54, 1);
152 pci_write_config(gparent, 0x4a, 0xa6, 1);
153 pci_write_config(gparent, 0x40 + (devno << 1), 0x0301, 2);
154 atadev->mode = mode;
155 return;
156 }
157 }
158 /* we could set PIO mode timings, but we assume the BIOS did that */
159 }
160
161 static void
ata_acard_86X_setmode(device_t dev,int mode)162 ata_acard_86X_setmode(device_t dev, int mode)
163 {
164 device_t gparent = GRANDPARENT(dev);
165 struct ata_pci_controller *ctlr = device_get_softc(gparent);
166 struct ata_channel *ch = device_get_softc(device_get_parent(dev));
167 struct ata_device *atadev = device_get_softc(dev);
168 int devno = (ch->unit << 1) + atadev->unit;
169 int error;
170
171
172 mode = ata_limit_mode(dev, mode,
173 ata_atapi(dev) ? ATA_PIO_MAX : ctlr->chip->max_dma);
174
175 mode = ata_check_80pin(dev, mode);
176
177 /* XXX SOS missing WDMA0+1 + PIO modes */
178 if (mode >= ATA_WDMA2) {
179 error = ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode);
180 if (bootverbose)
181 device_printf(dev, "%ssetting %s on %s chip\n",
182 (error) ? "FAILURE " : "",
183 ata_mode2str(mode), ctlr->chip->text);
184 if (!error) {
185 u_int16_t reg44 = pci_read_config(gparent, 0x44, 2);
186
187 reg44 &= ~(0x000f << (devno << 2));
188 if (mode >= ATA_UDMA0)
189 reg44 |= (((mode & ATA_MODE_MASK) + 1) << (devno << 2));
190 pci_write_config(gparent, 0x44, reg44, 2);
191 pci_write_config(gparent, 0x4a, 0xa6, 1);
192 pci_write_config(gparent, 0x40 + devno, 0x31, 1);
193 atadev->mode = mode;
194 return;
195 }
196 }
197 /* we could set PIO mode timings, but we assume the BIOS did that */
198 }
199
200 struct ata_serialize {
201 struct lock locked_mtx;
202 int locked_ch;
203 int restart_ch;
204 };
205
206 static int
ata_serialize(device_t dev,int flags)207 ata_serialize(device_t dev, int flags)
208 {
209 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
210 struct ata_channel *ch = device_get_softc(dev);
211 struct ata_serialize *serial;
212 static int inited = 0;
213 int res;
214
215 if (!inited) {
216 serial = kmalloc(sizeof(struct ata_serialize),
217 M_TEMP, M_INTWAIT | M_ZERO);
218 lockinit(&serial->locked_mtx, "ataserialize", 0, 0);
219 serial->locked_ch = -1;
220 serial->restart_ch = -1;
221 device_set_ivars(ctlr->dev, serial);
222 inited = 1;
223 }
224 else
225 serial = device_get_ivars(ctlr->dev);
226
227 lockmgr(&serial->locked_mtx, LK_EXCLUSIVE);
228 switch (flags) {
229 case ATA_LF_LOCK:
230 if (serial->locked_ch == -1)
231 serial->locked_ch = ch->unit;
232 if (serial->locked_ch != ch->unit)
233 serial->restart_ch = ch->unit;
234 break;
235
236 case ATA_LF_UNLOCK:
237 if (serial->locked_ch == ch->unit) {
238 serial->locked_ch = -1;
239 if (serial->restart_ch != -1) {
240 if ((ch = ctlr->interrupt[serial->restart_ch].argument)) {
241 serial->restart_ch = -1;
242 lockmgr(&serial->locked_mtx, LK_RELEASE);
243 ata_start(ch->dev);
244 return -1;
245 }
246 }
247 }
248 break;
249
250 case ATA_LF_WHICH:
251 break;
252 }
253 res = serial->locked_ch;
254 lockmgr(&serial->locked_mtx, LK_RELEASE);
255 return res;
256 }
257