1 /*-
2 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 #ifdef HAVE_KERNEL_OPTION_HEADERS
28 #include "opt_snd.h"
29 #endif
30
31 #include <dev/sound/pcm/sound.h>
32 #include <dev/sound/pcm/ac97.h>
33 #include <dev/sound/pci/aureal.h>
34
35 #include <bus/pci/pcireg.h>
36 #include <bus/pci/pcivar.h>
37
38 SND_DECLARE_FILE("$FreeBSD: head/sys/dev/sound/pci/aureal.c 254263 2013-08-12 23:30:01Z scottl $");
39
40 /* PCI IDs of supported chips */
41 #define AU8820_PCI_ID 0x000112eb
42
43 /* channel interface */
44 static u_int32_t au_playfmt[] = {
45 SND_FORMAT(AFMT_U8, 1, 0),
46 SND_FORMAT(AFMT_U8, 2, 0),
47 SND_FORMAT(AFMT_S16_LE, 1, 0),
48 SND_FORMAT(AFMT_S16_LE, 2, 0),
49 0
50 };
51 static struct pcmchan_caps au_playcaps = {4000, 48000, au_playfmt, 0};
52
53 static u_int32_t au_recfmt[] = {
54 SND_FORMAT(AFMT_U8, 1, 0),
55 SND_FORMAT(AFMT_U8, 2, 0),
56 SND_FORMAT(AFMT_S16_LE, 1, 0),
57 SND_FORMAT(AFMT_S16_LE, 2, 0),
58 0
59 };
60 static struct pcmchan_caps au_reccaps = {4000, 48000, au_recfmt, 0};
61
62 /* -------------------------------------------------------------------- */
63
64 struct au_info;
65
66 struct au_chinfo {
67 struct au_info *parent;
68 struct pcm_channel *channel;
69 struct snd_dbuf *buffer;
70 int dir;
71 };
72
73 struct au_info {
74 int unit;
75
76 bus_space_tag_t st[3];
77 bus_space_handle_t sh[3];
78
79 bus_dma_tag_t parent_dmat;
80 struct lock *lock;
81
82 u_int32_t x[32], y[128];
83 char z[128];
84 u_int32_t routes[4], interrupts;
85 struct au_chinfo pch;
86 };
87
88 static int au_init(device_t dev, struct au_info *au);
89 static void au_intr(void *);
90
91 /* -------------------------------------------------------------------- */
92
93 static u_int32_t
au_rd(struct au_info * au,int mapno,int regno,int size)94 au_rd(struct au_info *au, int mapno, int regno, int size)
95 {
96 switch(size) {
97 case 1:
98 return bus_space_read_1(au->st[mapno], au->sh[mapno], regno);
99 case 2:
100 return bus_space_read_2(au->st[mapno], au->sh[mapno], regno);
101 case 4:
102 return bus_space_read_4(au->st[mapno], au->sh[mapno], regno);
103 default:
104 return 0xffffffff;
105 }
106 }
107
108 static void
au_wr(struct au_info * au,int mapno,int regno,u_int32_t data,int size)109 au_wr(struct au_info *au, int mapno, int regno, u_int32_t data, int size)
110 {
111 switch(size) {
112 case 1:
113 bus_space_write_1(au->st[mapno], au->sh[mapno], regno, data);
114 break;
115 case 2:
116 bus_space_write_2(au->st[mapno], au->sh[mapno], regno, data);
117 break;
118 case 4:
119 bus_space_write_4(au->st[mapno], au->sh[mapno], regno, data);
120 break;
121 }
122 }
123
124 /* -------------------------------------------------------------------- */
125
126 static int
au_rdcd(kobj_t obj,void * arg,int regno)127 au_rdcd(kobj_t obj, void *arg, int regno)
128 {
129 struct au_info *au = (struct au_info *)arg;
130 int i=0, j=0;
131
132 regno<<=16;
133 au_wr(au, 0, AU_REG_CODECIO, regno, 4);
134 while (j<50) {
135 i=au_rd(au, 0, AU_REG_CODECIO, 4);
136 if ((i & 0x00ff0000) == (regno | 0x00800000)) break;
137 DELAY(j * 200 + 2000);
138 j++;
139 }
140 if (j==50) printf("pcm%d: codec timeout reading register %x (%x)\n",
141 au->unit, (regno & AU_CDC_REGMASK)>>16, i);
142 return i & AU_CDC_DATAMASK;
143 }
144
145 static int
au_wrcd(kobj_t obj,void * arg,int regno,u_int32_t data)146 au_wrcd(kobj_t obj, void *arg, int regno, u_int32_t data)
147 {
148 struct au_info *au = (struct au_info *)arg;
149 int i, j, tries;
150 i=j=tries=0;
151 do {
152 while (j<50 && (i & AU_CDC_WROK) == 0) {
153 i=au_rd(au, 0, AU_REG_CODECST, 4);
154 DELAY(2000);
155 j++;
156 }
157 if (j==50) printf("codec timeout during write of register %x, data %x\n",
158 regno, data);
159 au_wr(au, 0, AU_REG_CODECIO, (regno<<16) | AU_CDC_REGSET | data, 4);
160 /* DELAY(20000);
161 i=au_rdcd(au, regno);
162 */ tries++;
163 } while (0); /* (i != data && tries < 3); */
164 /*
165 if (tries == 3) printf("giving up writing 0x%4x to codec reg %2x\n", data, regno);
166 */
167
168 return 0;
169 }
170
171 static kobj_method_t au_ac97_methods[] = {
172 KOBJMETHOD(ac97_read, au_rdcd),
173 KOBJMETHOD(ac97_write, au_wrcd),
174 KOBJMETHOD_END
175 };
176 AC97_DECLARE(au_ac97);
177
178 /* -------------------------------------------------------------------- */
179
180 static void
au_setbit(u_int32_t * p,char bit,u_int32_t value)181 au_setbit(u_int32_t *p, char bit, u_int32_t value)
182 {
183 p += bit >> 5;
184 bit &= 0x1f;
185 *p &= ~ (1 << bit);
186 *p |= (value << bit);
187 }
188
189 static void
au_addroute(struct au_info * au,int a,int b,int route)190 au_addroute(struct au_info *au, int a, int b, int route)
191 {
192 int j = 0x1099c+(a<<2);
193 if (au->x[a] != a+0x67) j = AU_REG_RTBASE+(au->x[a]<<2);
194
195 au_wr(au, 0, AU_REG_RTBASE+(route<<2), 0xffffffff, 4);
196 au_wr(au, 0, j, route | (b<<7), 4);
197 au->y[route]=au->x[a];
198 au->x[a]=route;
199 au->z[route]=a & 0x000000ff;
200 au_setbit(au->routes, route, 1);
201 }
202
203 static void
au_delroute(struct au_info * au,int route)204 au_delroute(struct au_info *au, int route)
205 {
206 int i;
207 int j=au->z[route];
208
209 au_setbit(au->routes, route, 0);
210 au->z[route]=0x1f;
211 i=au_rd(au, 0, AU_REG_RTBASE+(route<<2), 4);
212 au_wr(au, 0, AU_REG_RTBASE+(au->y[route]<<2), i, 4);
213 au->y[i & 0x7f]=au->y[route];
214 au_wr(au, 0, AU_REG_RTBASE+(route<<2), 0xfffffffe, 4);
215 if (au->x[j] == route) au->x[j]=au->y[route];
216 au->y[route]=0x7f;
217 }
218
219 static void
au_encodec(struct au_info * au,char channel)220 au_encodec(struct au_info *au, char channel)
221 {
222 au_wr(au, 0, AU_REG_CODECEN,
223 au_rd(au, 0, AU_REG_CODECEN, 4) | (1 << (channel + 8)), 4);
224 }
225
226 static void
au_clrfifo(struct au_info * au,u_int32_t c)227 au_clrfifo(struct au_info *au, u_int32_t c)
228 {
229 u_int32_t i;
230
231 for (i=0; i<32; i++) au_wr(au, 0, AU_REG_FIFOBASE+(c<<7)+(i<<2), 0, 4);
232 }
233
234 static void
au_setadb(struct au_info * au,u_int32_t c,u_int32_t enable)235 au_setadb(struct au_info *au, u_int32_t c, u_int32_t enable)
236 {
237 int x;
238
239 x = au_rd(au, 0, AU_REG_ADB, 4);
240 x &= ~(1 << c);
241 x |= (enable << c);
242 au_wr(au, 0, AU_REG_ADB, x, 4);
243 }
244
245 static void
au_prepareoutput(struct au_chinfo * ch,u_int32_t format)246 au_prepareoutput(struct au_chinfo *ch, u_int32_t format)
247 {
248 struct au_info *au = ch->parent;
249 int i, stereo = (AFMT_CHANNEL(format) > 1)? 1 : 0;
250 u_int32_t baseaddr = sndbuf_getbufaddr(ch->buffer);
251
252 au_wr(au, 0, 0x1061c, 0, 4);
253 au_wr(au, 0, 0x10620, 0, 4);
254 au_wr(au, 0, 0x10624, 0, 4);
255 switch(AFMT_ENCODING(format)) {
256 case 1:
257 i=0xb000;
258 break;
259 case 2:
260 i=0xf000;
261 break;
262 case 8:
263 i=0x7000;
264 break;
265 case 16:
266 i=0x23000;
267 break;
268 default:
269 i=0x3000;
270 }
271 au_wr(au, 0, 0x10200, baseaddr, 4);
272 au_wr(au, 0, 0x10204, baseaddr+0x1000, 4);
273 au_wr(au, 0, 0x10208, baseaddr+0x2000, 4);
274 au_wr(au, 0, 0x1020c, baseaddr+0x3000, 4);
275
276 au_wr(au, 0, 0x10400, 0xdeffffff, 4);
277 au_wr(au, 0, 0x10404, 0xfcffffff, 4);
278
279 au_wr(au, 0, 0x10580, i, 4);
280
281 au_wr(au, 0, 0x10210, baseaddr, 4);
282 au_wr(au, 0, 0x10214, baseaddr+0x1000, 4);
283 au_wr(au, 0, 0x10218, baseaddr+0x2000, 4);
284 au_wr(au, 0, 0x1021c, baseaddr+0x3000, 4);
285
286 au_wr(au, 0, 0x10408, 0x00fff000 | 0x56000000 | 0x00000fff, 4);
287 au_wr(au, 0, 0x1040c, 0x00fff000 | 0x74000000 | 0x00000fff, 4);
288
289 au_wr(au, 0, 0x10584, i, 4);
290
291 au_wr(au, 0, 0x0f800, stereo? 0x00030032 : 0x00030030, 4);
292 au_wr(au, 0, 0x0f804, stereo? 0x00030032 : 0x00030030, 4);
293
294 au_addroute(au, 0x11, 0, 0x58);
295 au_addroute(au, 0x11, stereo? 0 : 1, 0x59);
296 }
297
298 /* -------------------------------------------------------------------- */
299 /* channel interface */
300 static void *
auchan_init(kobj_t obj,void * devinfo,struct snd_dbuf * b,struct pcm_channel * c,int dir)301 auchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir)
302 {
303 struct au_info *au = devinfo;
304 struct au_chinfo *ch = (dir == PCMDIR_PLAY)? &au->pch : NULL;
305
306 ch->parent = au;
307 ch->channel = c;
308 ch->buffer = b;
309 ch->dir = dir;
310 if (sndbuf_alloc(ch->buffer, au->parent_dmat, 0, AU_BUFFSIZE) != 0)
311 return NULL;
312 return ch;
313 }
314
315 static int
auchan_setformat(kobj_t obj,void * data,u_int32_t format)316 auchan_setformat(kobj_t obj, void *data, u_int32_t format)
317 {
318 struct au_chinfo *ch = data;
319
320 if (ch->dir == PCMDIR_PLAY) au_prepareoutput(ch, format);
321 return 0;
322 }
323
324 static int
auchan_setspeed(kobj_t obj,void * data,u_int32_t speed)325 auchan_setspeed(kobj_t obj, void *data, u_int32_t speed)
326 {
327 struct au_chinfo *ch = data;
328 if (ch->dir == PCMDIR_PLAY) {
329 } else {
330 }
331 return speed;
332 }
333
334 static int
auchan_setblocksize(kobj_t obj,void * data,u_int32_t blocksize)335 auchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize)
336 {
337 return blocksize;
338 }
339
340 static int
auchan_trigger(kobj_t obj,void * data,int go)341 auchan_trigger(kobj_t obj, void *data, int go)
342 {
343 struct au_chinfo *ch = data;
344 struct au_info *au = ch->parent;
345
346 if (!PCMTRIG_COMMON(go))
347 return 0;
348
349 if (ch->dir == PCMDIR_PLAY) {
350 au_setadb(au, 0x11, (go)? 1 : 0);
351 if (go != PCMTRIG_START) {
352 au_wr(au, 0, 0xf800, 0, 4);
353 au_wr(au, 0, 0xf804, 0, 4);
354 au_delroute(au, 0x58);
355 au_delroute(au, 0x59);
356 }
357 } else {
358 }
359 return 0;
360 }
361
362 static int
auchan_getptr(kobj_t obj,void * data)363 auchan_getptr(kobj_t obj, void *data)
364 {
365 struct au_chinfo *ch = data;
366 struct au_info *au = ch->parent;
367 if (ch->dir == PCMDIR_PLAY) {
368 return au_rd(au, 0, AU_REG_UNK2, 4) & (AU_BUFFSIZE-1);
369 } else {
370 return 0;
371 }
372 }
373
374 static struct pcmchan_caps *
auchan_getcaps(kobj_t obj,void * data)375 auchan_getcaps(kobj_t obj, void *data)
376 {
377 struct au_chinfo *ch = data;
378 return (ch->dir == PCMDIR_PLAY)? &au_playcaps : &au_reccaps;
379 }
380
381 static kobj_method_t auchan_methods[] = {
382 KOBJMETHOD(channel_init, auchan_init),
383 KOBJMETHOD(channel_setformat, auchan_setformat),
384 KOBJMETHOD(channel_setspeed, auchan_setspeed),
385 KOBJMETHOD(channel_setblocksize, auchan_setblocksize),
386 KOBJMETHOD(channel_trigger, auchan_trigger),
387 KOBJMETHOD(channel_getptr, auchan_getptr),
388 KOBJMETHOD(channel_getcaps, auchan_getcaps),
389 KOBJMETHOD_END
390 };
391 CHANNEL_DECLARE(auchan);
392
393 /* -------------------------------------------------------------------- */
394 /* The interrupt handler */
395 static void
au_intr(void * p)396 au_intr (void *p)
397 {
398 struct au_info *au = p;
399 u_int32_t intsrc, i;
400
401 au->interrupts++;
402 intsrc=au_rd(au, 0, AU_REG_IRQSRC, 4);
403 printf("pcm%d: interrupt with src %x\n", au->unit, intsrc);
404 if (intsrc & AU_IRQ_FATAL) printf("pcm%d: fatal error irq\n", au->unit);
405 if (intsrc & AU_IRQ_PARITY) printf("pcm%d: parity error irq\n", au->unit);
406 if (intsrc & AU_IRQ_UNKNOWN) {
407 (void)au_rd(au, 0, AU_REG_UNK1, 4);
408 au_wr(au, 0, AU_REG_UNK1, 0, 4);
409 au_wr(au, 0, AU_REG_UNK1, 0x10000, 4);
410 }
411 if (intsrc & AU_IRQ_PCMOUT) {
412 i=au_rd(au, 0, AU_REG_UNK2, 4) & (AU_BUFFSIZE-1);
413 chn_intr(au->pch.channel);
414 (void)au_rd(au, 0, AU_REG_UNK3, 4);
415 (void)au_rd(au, 0, AU_REG_UNK4, 4);
416 (void)au_rd(au, 0, AU_REG_UNK5, 4);
417 }
418 /* don't support midi
419 if (intsrc & AU_IRQ_MIDI) {
420 i=au_rd(au, 0, 0x11004, 4);
421 j=10;
422 while (i & 0xff) {
423 if (j-- <= 0) break;
424 i=au_rd(au, 0, 0x11000, 4);
425 if ((au->midi_stat & 1) && (au->midi_out))
426 au->midi_out(au->midi_devno, i);
427 i=au_rd(au, 0, 0x11004);
428 }
429 }
430 */
431 au_wr(au, 0, AU_REG_IRQSRC, intsrc & 0x7ff, 4);
432 au_rd(au, 0, AU_REG_IRQSRC, 4);
433 }
434
435
436 /* -------------------------------------------------------------------- */
437
438 /* Probe and attach the card */
439
440 static int
au_init(device_t dev,struct au_info * au)441 au_init(device_t dev, struct au_info *au)
442 {
443 u_int32_t i, j;
444
445 au_wr(au, 0, AU_REG_IRQGLOB, 0xffffffff, 4);
446 DELAY(100000);
447
448 /* init codec */
449 /* cold reset */
450 for (i=0; i<32; i++) {
451 au_wr(au, 0, AU_REG_CODECCHN+(i<<2), 0, 4);
452 DELAY(10000);
453 }
454 if (1) {
455 au_wr(au, 0, AU_REG_CODECST, 0x8068, 4);
456 DELAY(10000);
457 au_wr(au, 0, AU_REG_CODECST, 0x00e8, 4);
458 DELAY(10000);
459 } else {
460 au_wr(au, 0, AU_REG_CODECST, 0x00a8, 4);
461 DELAY(100000);
462 au_wr(au, 0, AU_REG_CODECST, 0x80a8, 4);
463 DELAY(100000);
464 au_wr(au, 0, AU_REG_CODECST, 0x80e8, 4);
465 DELAY(100000);
466 au_wr(au, 0, AU_REG_CODECST, 0x80a8, 4);
467 DELAY(100000);
468 au_wr(au, 0, AU_REG_CODECST, 0x00a8, 4);
469 DELAY(100000);
470 au_wr(au, 0, AU_REG_CODECST, 0x00e8, 4);
471 DELAY(100000);
472 }
473
474 /* init */
475 for (i=0; i<32; i++) {
476 au_wr(au, 0, AU_REG_CODECCHN+(i<<2), 0, 4);
477 DELAY(10000);
478 }
479 au_wr(au, 0, AU_REG_CODECST, 0xe8, 4);
480 DELAY(10000);
481 au_wr(au, 0, AU_REG_CODECEN, 0, 4);
482
483 /* setup codec */
484 i=j=0;
485 while (j<100 && (i & AU_CDC_READY)==0) {
486 i=au_rd(au, 0, AU_REG_CODECST, 4);
487 DELAY(1000);
488 j++;
489 }
490 if (j==100) device_printf(dev, "codec not ready, status 0x%x\n", i);
491
492 /* init adb */
493 /*au->x5c=0;*/
494 for (i=0; i<32; i++) au->x[i]=i+0x67;
495 for (i=0; i<128; i++) au->y[i]=0x7f;
496 for (i=0; i<128; i++) au->z[i]=0x1f;
497 au_wr(au, 0, AU_REG_ADB, 0, 4);
498 for (i=0; i<124; i++) au_wr(au, 0, AU_REG_RTBASE+(i<<2), 0xffffffff, 4);
499
500 /* test */
501 i=au_rd(au, 0, 0x107c0, 4);
502 if (i!=0xdeadbeef) device_printf(dev, "dma check failed: 0x%x\n", i);
503
504 /* install mixer */
505 au_wr(au, 0, AU_REG_IRQGLOB,
506 au_rd(au, 0, AU_REG_IRQGLOB, 4) | AU_IRQ_ENABLE, 4);
507 /* braindead but it's what the oss/linux driver does
508 * for (i=0; i<0x80000000; i++) au_wr(au, 0, i<<2, 0, 4);
509 */
510 au->routes[0]=au->routes[1]=au->routes[2]=au->routes[3]=0;
511 /*au->x1e4=0;*/
512
513 /* attach channel */
514 au_addroute(au, 0x11, 0x48, 0x02);
515 au_addroute(au, 0x11, 0x49, 0x03);
516 au_encodec(au, 0);
517 au_encodec(au, 1);
518
519 for (i=0; i<48; i++) au_wr(au, 0, 0xf800+(i<<2), 0x20, 4);
520 for (i=2; i<6; i++) au_wr(au, 0, 0xf800+(i<<2), 0, 4);
521 au_wr(au, 0, 0xf8c0, 0x0843, 4);
522 for (i=0; i<4; i++) au_clrfifo(au, i);
523
524 return (0);
525 }
526
527 static int
au_testirq(struct au_info * au)528 au_testirq(struct au_info *au)
529 {
530 au_wr(au, 0, AU_REG_UNK1, 0x80001000, 4);
531 au_wr(au, 0, AU_REG_IRQEN, 0x00001030, 4);
532 au_wr(au, 0, AU_REG_IRQSRC, 0x000007ff, 4);
533 DELAY(1000000);
534 if (au->interrupts==0) printf("pcm%d: irq test failed\n", au->unit);
535 /* this apparently generates an irq */
536 return 0;
537 }
538
539 static int
au_pci_probe(device_t dev)540 au_pci_probe(device_t dev)
541 {
542 if (pci_get_devid(dev) == AU8820_PCI_ID) {
543 device_set_desc(dev, "Aureal Vortex 8820");
544 return BUS_PROBE_DEFAULT;
545 }
546
547 return ENXIO;
548 }
549
550 static int
au_pci_attach(device_t dev)551 au_pci_attach(device_t dev)
552 {
553 struct au_info *au;
554 int type[10];
555 int regid[10];
556 struct resource *reg[10];
557 int i, j, mapped = 0;
558 int irqid;
559 struct resource *irq = 0;
560 void *ih = 0;
561 struct ac97_info *codec;
562 char status[SND_STATUSLEN];
563
564 au = malloc(sizeof(*au), M_DEVBUF, M_WAITOK | M_ZERO);
565 au->unit = device_get_unit(dev);
566
567 pci_enable_busmaster(dev);
568
569 j=0;
570 /* XXX dfr: is this strictly necessary? */
571 for (i=0; i<PCI_MAXMAPS_0; i++) {
572 #if 0
573 /* Slapped wrist: config_id and map are private structures */
574 if (bootverbose) {
575 printf("pcm%d: map %d - allocating ", unit, i+1);
576 printf("0x%x bytes of ", 1<<config_id->map[i].ln2size);
577 printf("%s space ", (config_id->map[i].type & PCI_MAPPORT)?
578 "io" : "memory");
579 printf("at 0x%x...", config_id->map[i].base);
580 }
581 #endif
582 regid[j] = PCIR_BAR(i);
583 type[j] = SYS_RES_MEMORY;
584 reg[j] = bus_alloc_resource_any(dev, type[j], ®id[j],
585 RF_ACTIVE);
586 if (!reg[j]) {
587 type[j] = SYS_RES_IOPORT;
588 reg[j] = bus_alloc_resource_any(dev, type[j],
589 ®id[j], RF_ACTIVE);
590 }
591 if (reg[j]) {
592 au->st[i] = rman_get_bustag(reg[j]);
593 au->sh[i] = rman_get_bushandle(reg[j]);
594 mapped++;
595 }
596 #if 0
597 if (bootverbose) printf("%s\n", mapped? "ok" : "failed");
598 #endif
599 if (mapped) j++;
600 if (j == 10) {
601 /* XXX */
602 device_printf(dev, "too many resources");
603 goto bad;
604 }
605 }
606
607 #if 0
608 if (j < config_id->nummaps) {
609 printf("pcm%d: unable to map a required resource\n", unit);
610 free(au, M_DEVBUF);
611 return;
612 }
613 #endif
614
615 au_wr(au, 0, AU_REG_IRQEN, 0, 4);
616
617 irqid = 0;
618 irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &irqid,
619 RF_ACTIVE | RF_SHAREABLE);
620 if (!irq || snd_setup_intr(dev, irq, 0, au_intr, au, &ih)) {
621 device_printf(dev, "unable to map interrupt\n");
622 goto bad;
623 }
624
625 if (au_testirq(au)) device_printf(dev, "irq test failed\n");
626
627 if (au_init(dev, au) == -1) {
628 device_printf(dev, "unable to initialize the card\n");
629 goto bad;
630 }
631
632 codec = AC97_CREATE(dev, au, au_ac97);
633 if (codec == NULL) goto bad;
634 if (mixer_init(dev, ac97_getmixerclass(), codec) == -1) goto bad;
635
636 if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), /*alignment*/2,
637 /*boundary*/0,
638 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
639 /*highaddr*/BUS_SPACE_MAXADDR,
640 /*maxsize*/AU_BUFFSIZE, /*nsegments*/1, /*maxsegz*/0x3ffff,
641 /*flags*/0, /*lockfunc*/busdma_lock_mutex,
642 /*lockarg*/&Giant, &au->parent_dmat) != 0) {
643 device_printf(dev, "unable to create dma tag\n");
644 goto bad;
645 }
646
647 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld %s",
648 (type[0] == SYS_RES_IOPORT)? "io" : "memory",
649 rman_get_start(reg[0]), rman_get_start(irq),PCM_KLDSTRING(snd_aureal));
650
651 if (pcm_register(dev, au, 1, 1)) goto bad;
652 /* pcm_addchan(dev, PCMDIR_REC, &au_chantemplate, au); */
653 pcm_addchan(dev, PCMDIR_PLAY, &auchan_class, au);
654 pcm_setstatus(dev, status);
655
656 return 0;
657
658 bad:
659 if (au) free(au, M_DEVBUF);
660 for (i = 0; i < j; i++)
661 bus_release_resource(dev, type[i], regid[i], reg[i]);
662 if (ih) bus_teardown_intr(dev, irq, ih);
663 if (irq) bus_release_resource(dev, SYS_RES_IRQ, irqid, irq);
664 return ENXIO;
665 }
666
667 static device_method_t au_methods[] = {
668 /* Device interface */
669 DEVMETHOD(device_probe, au_pci_probe),
670 DEVMETHOD(device_attach, au_pci_attach),
671
672 { 0, 0 }
673 };
674
675 static driver_t au_driver = {
676 "pcm",
677 au_methods,
678 PCM_SOFTC_SIZE,
679 };
680
681 DRIVER_MODULE(snd_aureal, pci, au_driver, pcm_devclass, NULL, NULL);
682 MODULE_DEPEND(snd_aureal, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
683 MODULE_VERSION(snd_aureal, 1);
684