1 /* 2 * SPDX-FileCopyrightText: Copyright (c) 2005-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. 3 * SPDX-License-Identifier: MIT 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 */ 23 24 #pragma once 25 26 #include <nvtypes.h> 27 28 // 29 // This file was generated with FINN, an NVIDIA coding tool. 30 // Source file: ctrl/ctrl0073/ctrl0073dp.finn 31 // 32 33 #include "ctrl/ctrl0073/ctrl0073base.h" 34 #include "ctrl/ctrl0073/ctrl0073common.h" 35 36 #include "nvcfg_sdk.h" 37 38 /* NV04_DISPLAY_COMMON dfp-display-specific control commands and parameters */ 39 40 /* 41 * NV0073_CTRL_CMD_DP_AUXCH_CTRL 42 * 43 * This command can be used to perform an aux channel transaction to the 44 * displayPort receiver. 45 * 46 * subDeviceInstance 47 * This parameter specifies the subdevice instance within the 48 * NV04_DISPLAY_COMMON parent device to which the operation should be 49 * directed. This parameter must specify a value between zero and the 50 * total number of subdevices within the parent device. This parameter 51 * should be set to zero for default behavior. 52 * displayId 53 * This parameter specifies the ID of the display for which the dfp 54 * caps should be returned. The display ID must a dfp display. 55 * If more than one displayId bit is set or the displayId is not a dfp, 56 * this call will return NV_ERR_INVALID_ARGUMENT. 57 * bAddrOnly 58 * If set to NV_TRUE, this parameter prompts an address-only 59 * i2c-over-AUX transaction to be issued, if supported. Else the 60 * call fails with NVOS_STATUS_ERR_NOT_SUPPORTED. The size parameter is 61 * expected to be 0 for address-only transactions. 62 * cmd 63 * This parameter is an input to this command. The cmd parameter follows 64 * Section 2.4 AUX channel syntax in the DisplayPort spec. 65 * Here are the current defined fields: 66 * NV0073_CTRL_DP_AUXCH_CMD_TYPE 67 * This specifies the request command transaction 68 * NV0073_CTRL_DP_AUXCH_CMD_TYPE_I2C 69 * Set this value to indicate a I2C transaction. 70 * NV0073_CTRL_DP_AUXCH_CMD_TYPE_AUX 71 * Set this value to indicate a DisplayPort transaction. 72 * NV0073_CTRL_DP_AUXCH_CMD_I2C_MOT 73 * This field is dependent on NV0073_CTRL_DP_AUXCH_CMD_TYPE. 74 * It is only valid if NV0073_CTRL_DP_AUXCH_CMD_TYPE_I2C 75 * is specified above and indicates a middle of transaction. 76 * In the case of AUX, this field should be set to zero. The valid 77 * values are: 78 * NV0073_CTRL_DP_AUXCH_CMD_I2C_MOT_FALSE 79 * The I2C transaction is not in the middle of a transaction. 80 * NV0073_CTRL_DP_AUXCH_CMD_I2C_MOT_TRUE 81 * The I2C transaction is in the middle of a transaction. 82 * NV0073_CTRL_DP_AUXCH_CMD_REQ_TYPE 83 * The request type specifies if we are doing a read/write or write 84 * status request: 85 * NV0073_CTRL_DP_AUXCH_CMD_REQ_TYPE_READ 86 * An I2C or AUX channel read is requested. 87 * NV0073_CTRL_DP_AUXCH_CMD_REQ_TYPE_WRITE 88 * An I2C or AUX channel write is requested. 89 * NV0073_CTRL_DP_AUXCH_CMD_REQ_TYPE_WRITE_STATUS 90 * An I2C write status request desired. This value should 91 * not be set in the case of an AUX CH request and only applies 92 * to I2C write transaction command. 93 * addr 94 * This parameter is an input to this command. The addr parameter follows 95 * Section 2.4 in DisplayPort spec and the client should refer to the valid 96 * address in DisplayPort spec. Only the first 20 bits are valid. 97 * data[] 98 * In the case of a read transaction, this parameter returns the data from 99 * transaction request. In the case of a write transaction, the client 100 * should write to this buffer for the data to send. The max # of bytes 101 * allowed is NV0073_CTRL_DP_AUXCH_MAX_DATA_SIZE. 102 * size 103 * Specifies how many data bytes to read/write depending on the transaction type. 104 * The input size value should be indexed from 0. That means if you want to read 105 * 1 byte -> size = 0, 2 bytes -> size = 1, 3 bytes -> size = 2, up to 16 bytes 106 * where size = 15. On return, this parameter returns total number of data bytes 107 * successfully read/written from/to the transaction (indexed from 1). That is, 108 * if you successfully requested 1 byte, you would send down size = 0. On return, 109 * you should expect size = 1 if all 1 byte were successfully read. (Note that 110 * it is valid for a display to reply with fewer than the requested number of 111 * bytes; in that case, it is up to the client to make a new request for the 112 * remaining bytes.) 113 * replyType 114 * This parameter is an output to this command. It returns the auxChannel 115 * status after the end of the aux Ch transaction. The valid values are 116 * based on the DisplayPort spec: 117 * NV0073_CTRL_DP_AUXCH_REPLYTYPE_ACK 118 * In the case of a write, 119 * AUX: write transaction completed and all data bytes written. 120 * I2C: return size bytes has been written to i2c slave. 121 * In the case of a read, return of ACK indicates ready to reply 122 * another read request. 123 * NV0073_CTRL_DP_AUXCH_REPLYTYPE_NACK 124 * In the case of a write, first return size bytes have been written. 125 * In the case of a read, implies that does not have requested data 126 * for the read request transaction. 127 * NV0073_CTRL_DP_AUXCH_REPLYTYPE_DEFER 128 * Not ready for the write/read request and client should retry later. 129 * NV0073_CTRL_DP_DISPLAYPORT_AUXCH_REPLYTYPE_I2CNACK 130 * Applies to I2C transactions only. For I2C write transaction: 131 * has written the first return size bytes to I2C slave before getting 132 * NACK. For a read I2C transaction, the I2C slave has NACKED the I2C 133 * address. 134 * NV0073_CTRL_DP_AUXCH_REPLYTYPE_I2CDEFER 135 * Applicable to I2C transactions. For I2C write and read 136 * transactions, I2C slave has yet to ACK or NACK the I2C transaction. 137 * NV0073_CTRL_DP_AUXCH_REPLYTYPE_TIMEOUT 138 * The receiver did not respond within the timeout period defined in 139 * the DisplayPort 1.1a specification. 140 * retryTimeMs 141 * This parameter is an output to this command. In case of 142 * NVOS_STATUS_ERROR_RETRY return status, this parameter returns the time 143 * duration in milli-seconds after which client should retry this command. 144 * 145 * Possible status values returned are: 146 * NV_OK 147 * NV_ERR_INVALID_PARAM_STRUCT 148 * NV_ERR_INVALID_ARGUMENT 149 * NVOS_STATUS_ERROR_RETRY 150 */ 151 #define NV0073_CTRL_CMD_DP_AUXCH_CTRL (0x731341U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_AUXCH_CTRL_PARAMS_MESSAGE_ID" */ 152 153 #define NV0073_CTRL_DP_AUXCH_MAX_DATA_SIZE 16U 154 #define NV0073_CTRL_DP_AUXCH_CTRL_PARAMS_MESSAGE_ID (0x41U) 155 156 typedef struct NV0073_CTRL_DP_AUXCH_CTRL_PARAMS { 157 NvU32 subDeviceInstance; 158 NvU32 displayId; 159 NvBool bAddrOnly; 160 NvU32 cmd; 161 NvU32 addr; 162 NvU8 data[NV0073_CTRL_DP_AUXCH_MAX_DATA_SIZE]; 163 NvU32 size; 164 NvU32 replyType; 165 NvU32 retryTimeMs; 166 } NV0073_CTRL_DP_AUXCH_CTRL_PARAMS; 167 168 #define NV0073_CTRL_DP_AUXCH_CMD_TYPE 3:3 169 #define NV0073_CTRL_DP_AUXCH_CMD_TYPE_I2C (0x00000000U) 170 #define NV0073_CTRL_DP_AUXCH_CMD_TYPE_AUX (0x00000001U) 171 #define NV0073_CTRL_DP_AUXCH_CMD_I2C_MOT 2:2 172 #define NV0073_CTRL_DP_AUXCH_CMD_I2C_MOT_FALSE (0x00000000U) 173 #define NV0073_CTRL_DP_AUXCH_CMD_I2C_MOT_TRUE (0x00000001U) 174 #define NV0073_CTRL_DP_AUXCH_CMD_REQ_TYPE 1:0 175 #define NV0073_CTRL_DP_AUXCH_CMD_REQ_TYPE_WRITE (0x00000000U) 176 #define NV0073_CTRL_DP_AUXCH_CMD_REQ_TYPE_READ (0x00000001U) 177 #define NV0073_CTRL_DP_AUXCH_CMD_REQ_TYPE_WRITE_STATUS (0x00000002U) 178 179 #define NV0073_CTRL_DP_AUXCH_ADDR 20:0 180 181 #define NV0073_CTRL_DP_AUXCH_REPLYTYPE 3:0 182 #define NV0073_CTRL_DP_AUXCH_REPLYTYPE_ACK (0x00000000U) 183 #define NV0073_CTRL_DP_AUXCH_REPLYTYPE_NACK (0x00000001U) 184 #define NV0073_CTRL_DP_AUXCH_REPLYTYPE_DEFER (0x00000002U) 185 #define NV0073_CTRL_DP_AUXCH_REPLYTYPE_TIMEOUT (0x00000003U) 186 #define NV0073_CTRL_DP_AUXCH_REPLYTYPE_I2CNACK (0x00000004U) 187 #define NV0073_CTRL_DP_AUXCH_REPLYTYPE_I2CDEFER (0x00000008U) 188 189 //This is not the register field, this is software failure case when we 190 //have invalid argument 191 #define NV0073_CTRL_DP_AUXCH_REPLYTYPE_INVALID_ARGUMENT (0xffffffffU) 192 193 /* 194 * NV0073_CTRL_CMD_DP_AUXCH_SET_SEMA 195 * 196 * This command can be used to set the semaphore in order to gain control of 197 * the aux channel. This control is only used in HW verification. 198 * 199 * subDeviceInstance 200 * This parameter specifies the subdevice instance within the 201 * NV04_DISPLAY_COMMON parent device to which the operation should be 202 * directed. This parameter must specify a value between zero and the 203 * total number of subdevices within the parent device. This parameter 204 * should be set to zero for default behavior. 205 * displayId 206 * This parameter specifies the ID of the display for which the dfp 207 * caps should be returned. The display ID must a dfp display 208 * as determined with the NV0073_CTRL_CMD_SPECIFIC_GET_TYPE command. 209 * If more than one displayId bit is set or the displayId is not a dfp, 210 * this call will return NV_ERR_INVALID_ARGUMENT. 211 * owner 212 * This parameter is an input to this command. 213 * Here are the current defined fields: 214 * NV0073_CTRL_DP_AUXCH_SET_SEMA_OWNER_RM 215 * Write the aux channel semaphore for resource manager to own the 216 * the aux channel. 217 * NV0073_CTRL_DP_AUXCH_SET_SEMA_OWNER_VBIOS 218 * Write the aux channel semaphore for vbios/efi to own the 219 * the aux channel. This value is used only for HW verification 220 * and should not be used in normal driver operation. 221 * NV0073_CTRL_DP_AUXCH_SET_SEMA_OWNER_PMU 222 * Write the aux channel semaphore for pmu to own the 223 * the aux channel. This value is used only by pmu 224 * and should not be used in normal driver operation. 225 * NV0073_CTRL_DP_AUXCH_SET_SEMA_OWNER_DPU 226 * Write the aux channel semaphore for dpu to own the 227 * the aux channel and should not be used in normal 228 * driver operation. 229 * NV0073_CTRL_DP_AUXCH_SET_SEMA_OWNER_SEC2 230 * Write the aux channel semaphore for sec2 to own the 231 * the aux channel and should not be used in normal 232 * driver operation. 233 * NV0073_CTRL_DP_AUXCH_SET_SEMA_OWNER_RELEASE 234 * Write the aux channel semaphore for hardware to own the 235 * the aux channel. This value is used only for HW verification 236 * and should not be used in normal driver operation. 237 * Possible status values returned are: 238 * NV_OK 239 * NV_ERR_INVALID_PARAM_STRUCT 240 * NV_ERR_INVALID_ARGUMENT 241 */ 242 243 #define NV0073_CTRL_CMD_DP_AUXCH_SET_SEMA (0x731342U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_AUXCH_SET_SEMA_PARAMS_MESSAGE_ID" */ 244 245 #define NV0073_CTRL_DP_AUXCH_SET_SEMA_PARAMS_MESSAGE_ID (0x42U) 246 247 typedef struct NV0073_CTRL_DP_AUXCH_SET_SEMA_PARAMS { 248 NvU32 subDeviceInstance; 249 NvU32 displayId; 250 NvU32 owner; 251 } NV0073_CTRL_DP_AUXCH_SET_SEMA_PARAMS; 252 253 #define NV0073_CTRL_DP_AUXCH_SET_SEMA_OWNER 2:0 254 #define NV0073_CTRL_DP_AUXCH_SET_SEMA_OWNER_RELEASE (0x00000000U) 255 #define NV0073_CTRL_DP_AUXCH_SET_SEMA_OWNER_RM (0x00000001U) 256 #define NV0073_CTRL_DP_AUXCH_SET_SEMA_OWNER_VBIOS (0x00000002U) 257 #define NV0073_CTRL_DP_AUXCH_SET_SEMA_OWNER_PMU (0x00000003U) 258 #define NV0073_CTRL_DP_AUXCH_SET_SEMA_OWNER_DPU (0x00000004U) 259 #define NV0073_CTRL_DP_AUXCH_SET_SEMA_OWNER_SEC2 (0x00000005U) 260 261 /* 262 * NV0073_CTRL_CMD_DP_CTRL 263 * 264 * This command is used to set various displayPort configurations for 265 * the specified displayId such a lane count and link bandwidth. It 266 * is assumed that link training has already occurred. 267 * 268 * subDeviceInstance 269 * This parameter specifies the subdevice instance within the 270 * NV04_DISPLAY_COMMON parent device to which the operation should be 271 * directed. This parameter must specify a value between zero and the 272 * total number of subdevices within the parent device. This parameter 273 * should be set to zero for default behavior. 274 * displayId 275 * This parameter specifies the ID of the display for which the dfp 276 * caps should be returned. The display ID must a dfp display. 277 * If more than one displayId bit is set or the displayId is not a dfp, 278 * this call will return NV_ERR_INVALID_ARGUMENT. 279 * cmd 280 * This parameter is an input to this command. 281 * Here are the current defined fields: 282 * NV0073_CTRL_DP_CMD_SET_LANE_COUNT 283 * Set to specify the number of displayPort lanes to configure. 284 * NV0073_CTRL_DP_CMD_SET_LANE_COUNT_FALSE 285 * No request to set the displayport lane count. 286 * NV0073_CTRL_DP_CMD_SET_LANE_COUNT_TRUE 287 * Set this value to indicate displayport lane count change. 288 * NV0073_CTRL_DP_CMD_SET_LINK_BANDWIDTH 289 * Set to specify a request to change the link bandwidth. 290 * NV0073_CTRL_DP_CMD_SET_LINK_BANDWIDTH_FALSE 291 * No request to set the displayport link bandwidth. 292 * NV0073_CTRL_DP_CMD_SET_LINK_BANDWIDTH_TRUE 293 * Set this value to indicate displayport link bandwidth change. 294 * NV0073_CTRL_DP_CMD_SET_LINK_BANDWIDTH 295 * Set to specify a request to change the link bandwidth. 296 * NV0073_CTRL_DP_CMD_SET_LINK_BANDWIDTH_FALSE 297 * No request to set the displayport link bandwidth. 298 * NV0073_CTRL_DP_CMD_SET_LINK_BANDWIDTH_TRUE 299 * Set this value to indicate displayport link bandwidth change. 300 * NV0073_CTRL_DP_CMD_DISABLE_DOWNSPREAD 301 * Set to disable downspread during link training. 302 * NV0073_CTRL_DP_CMD_DISABLE_DOWNSPREAD_FALSE 303 * Downspread will be enabled. 304 * NV0073_CTRL_DP_CMD_DISABLE_DOWNSPREAD_TRUE 305 * Downspread will be disabled (e.g. for compliance testing). 306 * NV0073_CTRL_DP_CMD_SET_FORMAT_MODE 307 * This field specifies the DP stream mode. 308 * NV0073_CTRL_DP_CMD_SET_FORMAT_MODE_SINGLE_STREAM 309 * This value indicates that single stream mode is specified. 310 * NV0073_CTRL_DP_CMD_SET_FORMAT_MODE_MULTI_STREAM 311 * This value indicates that multi stream mode is specified. 312 * NV0073_CTRL_DP_CMD_FAST_LINK_TRAINING 313 * Set to do Fast link training (avoid AUX transactions for link 314 * training). We need to restore all the previous trained link settings 315 * (e.g. the drive current/preemphasis settings) before doing FLT. 316 * During FLT, we send training pattern 1 followed by training pattern 2 317 * each for a period of 500us. 318 * NV0073_CTRL_DP_CMD_FAST_LINK_TRAINING_NO 319 * Not a fast link training scenario. 320 * NV0073_CTRL_DP_CMD_FAST_LINK_TRAINING_YES 321 * Do fast link training. 322 * NV0073_CTRL_DP_CMD_NO_LINK_TRAINING 323 * Set to do No link training. We need to restore all the previous 324 * trained link settings (e.g. the drive current/preemphasis settings) 325 * before doing NLT, but we don't need to do the Clock Recovery and 326 * Channel Equalization. (Please refer to NVIDIA PANEL SELFREFRESH 327 * CONTROLLER SPECIFICATION 3.1.6 for detail flow) 328 * NV0073_CTRL_DP_CMD_NO_LINK_TRAINING_NO 329 * Not a no link training scenario. 330 * NV0073_CTRL_DP_CMD_NO_LINK_TRAINING_YES 331 * Do no link training. 332 * NV0073_CTRL_DP_CMD_USE_DOWNSPREAD_SETTING 333 * Specifies whether RM should use the DP Downspread setting specified by 334 * NV0073_CTRL_DP_CMD_DISABLE_DOWNSPREAD command regardless of what the Display 335 * is capable of. This is used along with the Fake link training option so that 336 * we can configure the GPU to enable/disable spread when a real display is 337 * not connected. 338 * NV0073_CTRL_DP_CMD_USE_DOWNSPREAD_SETTING_FORCE 339 * RM Always use the DP Downspread setting specified. 340 * NV0073_CTRL_DP_CMD_USE_DOWNSPREAD_SETTING_DEFAULT 341 * RM will enable Downspread only if the display supports it. (default) 342 * NV0073_CTRL_DP_CMD_SKIP_HW_PROGRAMMING 343 * Specifies whether RM should skip HW training of the link. 344 * If this is the case then RM only updates its SW state without actually 345 * touching any HW registers. Clients should use this ONLY if it has determined - 346 * a. link is trained and not lost 347 * b. desired link config is same as current trained link config 348 * c. link is not in D3 (should be in D0) 349 * NV0073_CTRL_DP_CMD_SKIP_HW_PROGRAMMING_NO 350 * RM doesn't skip HW LT as the current Link Config is not the same as the 351 * requested Link Config. 352 * NV0073_CTRL_DP_CMD_SKIP_HW_PROGRAMMING_YES 353 * RM skips HW LT and only updates its SW state as client has determined that 354 * the current state of the link and the requested Link Config is the same. 355 * NV0073_CTRL_DP_CMD_DISABLE_LINK_CONFIG 356 * Set if the client does not want link training to happen. 357 * This should ONLY be used for HW verification. 358 * NV0073_CTRL_DP_CMD_DISABLE_LINK_CONFIG_FALSE 359 * This is normal production behaviour which shall perform 360 * link training or follow the normal procedure for lane count 361 * reduction. 362 * NV0073_CTRL_DP_CMD_DISABLE_LINK_CONFIG_TRUE 363 * Set this value to not perform link config steps, this should 364 * only be turned on for HW verif testing. If _LINK_BANDWIDTH 365 * or _LANE_COUNT is set, RM will only write to the TX DP registers 366 * and perform no link training. 367 * NV0073_CTRL_DP_CMD_POST_LT_ADJ_REQ_GRANTED 368 * This field specifies if source grants Post Link training Adjustment request or not. 369 * NV0073_CTRL_DP_CMD_POST_LT_ADJ_REQ_GRANTED_NO 370 * Source does not grant Post Link training Adjustment request 371 * NV0073_CTRL_DP_CMD_POST_LT_ADJ_REQ_GRANTED_YES 372 * Source grants Post Link training Adjustment request 373 * Source wants to link train LT Tunable Repeaters 374 * NV0073_CTRL_DP_CMD_FAKE_LINK_TRAINING 375 * This field specifies if fake link training is to be done. This will 376 * program enough of the hardware to avoid any hardware hangs and 377 * depending upon option chosen by the client, OR will be enabled for 378 * transmisssion. 379 * NV0073_CTRL_DP_CMD_FAKE_LINK_TRAINING_NO 380 * No Fake LT will be performed 381 * NV0073_CTRL_DP_CMD_FAKE_LINK_TRAINING_DONOT_TOGGLE_TRANSMISSION 382 * SOR will be not powered up during Fake LT 383 * NV0073_CTRL_DP_CMD_FAKE_LINK_TRAINING_TOGGLE_TRANSMISSION_ON 384 * SOR will be powered up during Fake LT 385 * NV0073_CTRL_DP_CMD_TRAIN_PHY_REPEATER 386 * This field specifies if source wants to link train LT Tunable Repeaters or not. 387 * NV0073_CTRL_DP_CMD_TRAIN_PHY_REPEATER_NO 388 * Source does not want to link train LT Tunable Repeaters 389 * NV0073_CTRL_DP_CMD_TRAIN_PHY_REPEATER_YES 390 * NV0073_CTRL_DP_CMD_BANDWIDTH_TEST 391 * Set if the client wants to reset the link after the link 392 * training is done. As a part of uncommtting a DP display. 393 * NV0073_CTRL_DP_CMD_BANDWIDTH_TEST_NO 394 * This is for normal operation, if DD decided not to reset the link. 395 * NV0073_CTRL_DP_CMD_BANDWIDTH_TEST_YES 396 * This is to reset the link, if DD decided to uncommit the display because 397 * the link is no more required to be enabled, as in a DP compliance test. 398 * NV0073_CTRL_DP_CMD_LINK_CONFIG_CHECK_DISABLE 399 * Set if the client does not want link training to happen. 400 * This should ONLY be used for HW verification if necessary. 401 * NV0073_CTRL_DP_CMD_LINK_CONFIG_CHECK_DISABLE_FALSE 402 * This is normal production behaviour which shall perform 403 * pre link training checks such as if both rx and tx are capable 404 * of the requested config for lane and link bw. 405 * NV0073_CTRL_DP_CMD_LINK_CONFIG_CHECK_DISABLE_TRUE 406 * Set this value to bypass link config check, this should 407 * only be turned on for HW verif testing. If _LINK_BANDWIDTH 408 * or _LANE_COUNT is set, RM will not check TX and DX caps. 409 * NV0073_CTRL_DP_CMD_FALLBACK_CONFIG 410 * Set if requested config by client fails and if link if being 411 * trained for the fallback config. 412 * NV0073_CTRL_DP_CMD_FALLBACK_CONFIG_FALSE 413 * This is the normal case when the link is being trained for a requested config. 414 * NV0073_CTRL_DP_CMD_LINK_CONFIG_CHECK_DISABLE_TRUE 415 * Set this value in case the link configuration for requested config fails 416 * and the link is being trained for a fallback config. 417 * NV0073_CTRL_DP_CMD_ENABLE_FEC 418 * Specifies whether RM should set NV_DPCD14_FEC_CONFIGURATION_FEC_READY 419 * before link training if client has determined that FEC is required(for DSC). 420 * If required to be enabled RM sets FEC enable bit in panel, start link training. 421 * Enabling/disabling FEC on GPU side is not done during Link training 422 * and RM Ctrl call NV0073_CTRL_CMD_DP_CONFIGURE_FEC has to be called 423 * explicitly to enable/disable FEC after LT(including PostLT LQA). 424 * If enabled, FEC would be disabled while powering down the link. 425 * Client has to make sure to account for 3% overhead of transmitting 426 * FEC symbols while calculating DP bandwidth. 427 * NV0073_CTRL_DP_CMD_ENABLE_FEC_FALSE 428 * This is the normal case when FEC is not required 429 * NV0073_CTRL_DP_CMD_ENABLE_FEC_TRUE 430 * Set this value in case FEC needs to be enabled 431 * data 432 * This parameter is an input and output to this command. 433 * Here are the current defined fields: 434 * NV0073_CTRL_DP_DATA_SET_LANE_COUNT 435 * This field specifies the desired setting for lane count. A client 436 * may choose any lane count as long as it does not exceed the 437 * capability of DisplayPort receiver as indicated in the 438 * receiver capability field. The valid values for this field are: 439 * NV0073_CTRL_DP_DATA_SET_LANE_COUNT_0 440 * For zero-lane configurations, link training is shut down. 441 * NV0073_CTRL_DP_DATA_SET_LANE_COUNT_1 442 * For one-lane configurations, lane0 is used. 443 * NV0073_CTRL_DP_DATA_SET_LANE_COUNT_2 444 * For two-lane configurations, lane0 and lane1 is used. 445 * NV0073_CTRL_DP_DATA_SET_LANE_COUNT_4 446 * For four-lane configurations, all lanes are used. 447 * NV0073_CTRL_DP_DATA_SET_LANE_COUNT_8 448 * For devices that supports 8-lane DP. 449 * On return, the lane count setting is returned which may be 450 * different from the requested input setting. 451 * NV0073_CTRL_DP_DATA_SET_LINK_BW 452 * This field specifies the desired setting for link bandwidth. There 453 * are only four supported main link bandwidth settings. The 454 * valid values for this field are: 455 * NV0073_CTRL_DP_DATA_SET_LINK_BW_1_62GBPS 456 * NV0073_CTRL_DP_DATA_SET_LINK_BW_2_70GBPS 457 * NV0073_CTRL_DP_DATA_SET_LINK_BW_5_40GBPS 458 * NV0073_CTRL_DP_DATA_SET_LINK_BW_8_10GBPS 459 * On return, the link bandwidth setting is returned which may be 460 * different from the requested input setting. 461 * NV0073_CTRL_DP_DATA_TARGET 462 * This field specifies which physical repeater or sink to be trained. 463 * Client should make sure 464 * 1. Physical repeater should be targeted in order, start from the one closest to GPU. 465 * 2. All physical repeater is properly trained before targets sink. 466 * The valid values for this field are: 467 * NV0073_CTRL_DP_DATA_TARGET_PHY_REPEATER_X 468 * 'X' denotes physical repeater index. It's a 1-based index to 469 * reserve 0 for _SINK. 470 * 'X' can't be more than 8. 471 * NV0073_CTRL_DP_DATA_TARGET_SINK 472 * err 473 * This parameter specifies provides info regarding the outcome 474 * of this calling control call. If zero, no errors were found. 475 * Otherwise, this parameter will specify the error detected. 476 * The valid parameter is broken down as follows: 477 * NV0073_CTRL_DP_ERR_SET_LANE_COUNT 478 * If set to _ERR, set lane count failed. 479 * NV0073_CTRL_DP_ERR_SET_LINK_BANDWIDTH 480 * If set to _ERR, set link bandwidth failed. 481 * NV0073_CTRL_DP_ERR_DISABLE_DOWNSPREAD 482 * If set to _ERR, disable downspread failed. 483 * NV0073_CTRL_DP_ERR_INVALID_PARAMETER 484 * If set to _ERR, at least one of the calling functions 485 * failed due to an invalid parameter. 486 * NV0073_CTRL_DP_ERR_SET_LINK_TRAINING 487 * If set to _ERR, link training failed. 488 * NV0073_CTRL_DP_ERR_TRAIN_PHY_REPEATER 489 * If set to _ERR, the operation to Link Train repeater is failed. 490 * NV0073_CTRL_DP_ERR_ENABLE_FEC 491 * If set to _ERR, the operation to enable FEC is failed. 492 * retryTimeMs 493 * This parameter is an output to this command. In case of 494 * NVOS_STATUS_ERROR_RETRY return status, this parameter returns the time 495 * duration in milli-seconds after which client should retry this command. 496 * 497 * Possible status values returned are: 498 * NV_OK 499 * NV_ERR_INVALID_PARAM_STRUCT 500 * NV_ERR_INVALID_ARGUMENT 501 * NVOS_STATUS_ERROR_RETRY 502 */ 503 504 #define NV0073_CTRL_CMD_DP_CTRL (0x731343U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_CTRL_PARAMS_MESSAGE_ID" */ 505 506 #define NV0073_CTRL_DP_CTRL_PARAMS_MESSAGE_ID (0x43U) 507 508 typedef struct NV0073_CTRL_DP_CTRL_PARAMS { 509 NvU32 subDeviceInstance; 510 NvU32 displayId; 511 NvU32 cmd; 512 NvU32 data; 513 NvU32 err; 514 NvU32 retryTimeMs; 515 NvU32 eightLaneDpcdBaseAddr; 516 } NV0073_CTRL_DP_CTRL_PARAMS; 517 518 #define NV0073_CTRL_DP_CMD_SET_LANE_COUNT 0:0 519 #define NV0073_CTRL_DP_CMD_SET_LANE_COUNT_FALSE (0x00000000U) 520 #define NV0073_CTRL_DP_CMD_SET_LANE_COUNT_TRUE (0x00000001U) 521 #define NV0073_CTRL_DP_CMD_SET_LINK_BW 1:1 522 #define NV0073_CTRL_DP_CMD_SET_LINK_BW_FALSE (0x00000000U) 523 #define NV0073_CTRL_DP_CMD_SET_LINK_BW_TRUE (0x00000001U) 524 #define NV0073_CTRL_DP_CMD_DISABLE_DOWNSPREAD 2:2 525 #define NV0073_CTRL_DP_CMD_DISABLE_DOWNSPREAD_FALSE (0x00000000U) 526 #define NV0073_CTRL_DP_CMD_DISABLE_DOWNSPREAD_TRUE (0x00000001U) 527 #define NV0073_CTRL_DP_CMD_UNUSED 3:3 528 #define NV0073_CTRL_DP_CMD_SET_FORMAT_MODE 4:4 529 #define NV0073_CTRL_DP_CMD_SET_FORMAT_MODE_SINGLE_STREAM (0x00000000U) 530 #define NV0073_CTRL_DP_CMD_SET_FORMAT_MODE_MULTI_STREAM (0x00000001U) 531 #define NV0073_CTRL_DP_CMD_FAST_LINK_TRAINING 5:5 532 #define NV0073_CTRL_DP_CMD_FAST_LINK_TRAINING_NO (0x00000000U) 533 #define NV0073_CTRL_DP_CMD_FAST_LINK_TRAINING_YES (0x00000001U) 534 #define NV0073_CTRL_DP_CMD_NO_LINK_TRAINING 6:6 535 #define NV0073_CTRL_DP_CMD_NO_LINK_TRAINING_NO (0x00000000U) 536 #define NV0073_CTRL_DP_CMD_NO_LINK_TRAINING_YES (0x00000001U) 537 #define NV0073_CTRL_DP_CMD_SET_ENHANCED_FRAMING 7:7 538 #define NV0073_CTRL_DP_CMD_SET_ENHANCED_FRAMING_FALSE (0x00000000U) 539 #define NV0073_CTRL_DP_CMD_SET_ENHANCED_FRAMING_TRUE (0x00000001U) 540 #define NV0073_CTRL_DP_CMD_USE_DOWNSPREAD_SETTING 8:8 541 #define NV0073_CTRL_DP_CMD_USE_DOWNSPREAD_SETTING_DEFAULT (0x00000000U) 542 #define NV0073_CTRL_DP_CMD_USE_DOWNSPREAD_SETTING_FORCE (0x00000001U) 543 #define NV0073_CTRL_DP_CMD_SKIP_HW_PROGRAMMING 9:9 544 #define NV0073_CTRL_DP_CMD_SKIP_HW_PROGRAMMING_NO (0x00000000U) 545 #define NV0073_CTRL_DP_CMD_SKIP_HW_PROGRAMMING_YES (0x00000001U) 546 #define NV0073_CTRL_DP_CMD_POST_LT_ADJ_REQ_GRANTED 10:10 547 #define NV0073_CTRL_DP_CMD_POST_LT_ADJ_REQ_GRANTED_NO (0x00000000U) 548 #define NV0073_CTRL_DP_CMD_POST_LT_ADJ_REQ_GRANTED_YES (0x00000001U) 549 #define NV0073_CTRL_DP_CMD_FAKE_LINK_TRAINING 12:11 550 #define NV0073_CTRL_DP_CMD_FAKE_LINK_TRAINING_NO (0x00000000U) 551 #define NV0073_CTRL_DP_CMD_FAKE_LINK_TRAINING_DONOT_TOGGLE_TRANSMISSION (0x00000001U) 552 #define NV0073_CTRL_DP_CMD_FAKE_LINK_TRAINING_TOGGLE_TRANSMISSION_ON (0x00000002U) 553 #define NV0073_CTRL_DP_CMD_TRAIN_PHY_REPEATER 13:13 554 #define NV0073_CTRL_DP_CMD_TRAIN_PHY_REPEATER_NO (0x00000000U) 555 #define NV0073_CTRL_DP_CMD_TRAIN_PHY_REPEATER_YES (0x00000001U) 556 #define NV0073_CTRL_DP_CMD_FALLBACK_CONFIG 14:14 557 #define NV0073_CTRL_DP_CMD_FALLBACK_CONFIG_FALSE (0x00000000U) 558 #define NV0073_CTRL_DP_CMD_FALLBACK_CONFIG_TRUE (0x00000001U) 559 #define NV0073_CTRL_DP_CMD_ENABLE_FEC 15:15 560 #define NV0073_CTRL_DP_CMD_ENABLE_FEC_FALSE (0x00000000U) 561 #define NV0073_CTRL_DP_CMD_ENABLE_FEC_TRUE (0x00000001U) 562 563 #define NV0073_CTRL_DP_CMD_BANDWIDTH_TEST 29:29 564 #define NV0073_CTRL_DP_CMD_BANDWIDTH_TEST_NO (0x00000000U) 565 #define NV0073_CTRL_DP_CMD_BANDWIDTH_TEST_YES (0x00000001U) 566 #define NV0073_CTRL_DP_CMD_LINK_CONFIG_CHECK_DISABLE 30:30 567 #define NV0073_CTRL_DP_CMD_LINK_CONFIG_CHECK_DISABLE_FALSE (0x00000000U) 568 #define NV0073_CTRL_DP_CMD_LINK_CONFIG_CHECK_DISABLE_TRUE (0x00000001U) 569 #define NV0073_CTRL_DP_CMD_DISABLE_LINK_CONFIG 31:31 570 #define NV0073_CTRL_DP_CMD_DISABLE_LINK_CONFIG_FALSE (0x00000000U) 571 #define NV0073_CTRL_DP_CMD_DISABLE_LINK_CONFIG_TRUE (0x00000001U) 572 573 #define NV0073_CTRL_DP_DATA_SET_LANE_COUNT 4:0 574 #define NV0073_CTRL_DP_DATA_SET_LANE_COUNT_0 (0x00000000U) 575 #define NV0073_CTRL_DP_DATA_SET_LANE_COUNT_1 (0x00000001U) 576 #define NV0073_CTRL_DP_DATA_SET_LANE_COUNT_2 (0x00000002U) 577 #define NV0073_CTRL_DP_DATA_SET_LANE_COUNT_4 (0x00000004U) 578 #define NV0073_CTRL_DP_DATA_SET_LANE_COUNT_8 (0x00000008U) 579 #define NV0073_CTRL_DP_DATA_SET_LINK_BW 15:8 580 #define NV0073_CTRL_DP_DATA_SET_LINK_BW_1_62GBPS (0x00000006U) 581 #define NV0073_CTRL_DP_DATA_SET_LINK_BW_2_16GBPS (0x00000008U) 582 #define NV0073_CTRL_DP_DATA_SET_LINK_BW_2_43GBPS (0x00000009U) 583 #define NV0073_CTRL_DP_DATA_SET_LINK_BW_2_70GBPS (0x0000000AU) 584 #define NV0073_CTRL_DP_DATA_SET_LINK_BW_3_24GBPS (0x0000000CU) 585 #define NV0073_CTRL_DP_DATA_SET_LINK_BW_4_32GBPS (0x00000010U) 586 #define NV0073_CTRL_DP_DATA_SET_LINK_BW_5_40GBPS (0x00000014U) 587 #define NV0073_CTRL_DP_DATA_SET_LINK_BW_8_10GBPS (0x0000001EU) 588 #define NV0073_CTRL_DP_DATA_SET_ENHANCED_FRAMING 18:18 589 #define NV0073_CTRL_DP_DATA_SET_ENHANCED_FRAMING_NO (0x00000000U) 590 #define NV0073_CTRL_DP_DATA_SET_ENHANCED_FRAMING_YES (0x00000001U) 591 #define NV0073_CTRL_DP_DATA_TARGET 22:19 592 #define NV0073_CTRL_DP_DATA_TARGET_SINK (0x00000000U) 593 #define NV0073_CTRL_DP_DATA_TARGET_PHY_REPEATER_0 (0x00000001U) 594 #define NV0073_CTRL_DP_DATA_TARGET_PHY_REPEATER_1 (0x00000002U) 595 #define NV0073_CTRL_DP_DATA_TARGET_PHY_REPEATER_2 (0x00000003U) 596 #define NV0073_CTRL_DP_DATA_TARGET_PHY_REPEATER_3 (0x00000004U) 597 #define NV0073_CTRL_DP_DATA_TARGET_PHY_REPEATER_4 (0x00000005U) 598 #define NV0073_CTRL_DP_DATA_TARGET_PHY_REPEATER_5 (0x00000006U) 599 #define NV0073_CTRL_DP_DATA_TARGET_PHY_REPEATER_6 (0x00000007U) 600 #define NV0073_CTRL_DP_DATA_TARGET_PHY_REPEATER_7 (0x00000008U) 601 602 #define NV0073_CTRL_DP_ERR_SET_LANE_COUNT 0:0 603 #define NV0073_CTRL_DP_ERR_SET_LANE_COUNT_NOERR (0x00000000U) 604 #define NV0073_CTRL_DP_ERR_SET_LANE_COUNT_ERR (0x00000001U) 605 #define NV0073_CTRL_DP_ERR_SET_LINK_BW 1:1 606 #define NV0073_CTRL_DP_ERR_SET_LINK_BW_NOERR (0x00000000U) 607 #define NV0073_CTRL_DP_ERR_SET_LINK_BW_ERR (0x00000001U) 608 #define NV0073_CTRL_DP_ERR_DISABLE_DOWNSPREAD 2:2 609 #define NV0073_CTRL_DP_ERR_DISABLE_DOWNSPREAD_NOERR (0x00000000U) 610 #define NV0073_CTRL_DP_ERR_DISABLE_DOWNSPREAD_ERR (0x00000001U) 611 #define NV0073_CTRL_DP_ERR_UNUSED 3:3 612 #define NV0073_CTRL_DP_ERR_CLOCK_RECOVERY 4:4 613 #define NV0073_CTRL_DP_ERR_CLOCK_RECOVERY_NOERR (0x00000000U) 614 #define NV0073_CTRL_DP_ERR_CLOCK_RECOVERY_ERR (0x00000001U) 615 #define NV0073_CTRL_DP_ERR_CHANNEL_EQUALIZATION 5:5 616 #define NV0073_CTRL_DP_ERR_CHANNEL_EQUALIZATION_NOERR (0x00000000U) 617 #define NV0073_CTRL_DP_ERR_CHANNEL_EQUALIZATION_ERR (0x00000001U) 618 #define NV0073_CTRL_DP_ERR_TRAIN_PHY_REPEATER 6:6 619 #define NV0073_CTRL_DP_ERR_TRAIN_PHY_REPEATER_NOERR (0x00000000U) 620 #define NV0073_CTRL_DP_ERR_TRAIN_PHY_REPEATER_ERR (0x00000001U) 621 #define NV0073_CTRL_DP_ERR_ENABLE_FEC 7:7 622 #define NV0073_CTRL_DP_ERR_ENABLE_FEC_NOERR (0x00000000U) 623 #define NV0073_CTRL_DP_ERR_ENABLE_FEC_ERR (0x00000001U) 624 #define NV0073_CTRL_DP_ERR_CR_DONE_LANE 11:8 625 #define NV0073_CTRL_DP_ERR_CR_DONE_LANE_0_LANE (0x00000000U) 626 #define NV0073_CTRL_DP_ERR_CR_DONE_LANE_1_LANE (0x00000001U) 627 #define NV0073_CTRL_DP_ERR_CR_DONE_LANE_2_LANE (0x00000002U) 628 #define NV0073_CTRL_DP_ERR_CR_DONE_LANE_4_LANE (0x00000004U) 629 #define NV0073_CTRL_DP_ERR_CR_DONE_LANE_8_LANE (0x00000008U) 630 #define NV0073_CTRL_DP_ERR_EQ_DONE_LANE 15:12 631 #define NV0073_CTRL_DP_ERR_EQ_DONE_LANE_0_LANE (0x00000000U) 632 #define NV0073_CTRL_DP_ERR_EQ_DONE_LANE_1_LANE (0x00000001U) 633 #define NV0073_CTRL_DP_ERR_EQ_DONE_LANE_2_LANE (0x00000002U) 634 #define NV0073_CTRL_DP_ERR_EQ_DONE_LANE_4_LANE (0x00000004U) 635 #define NV0073_CTRL_DP_ERR_EQ_DONE_LANE_8_LANE (0x00000008U) 636 #define NV0073_CTRL_DP_ERR_INVALID_PARAMETER 30:30 637 #define NV0073_CTRL_DP_ERR_INVALID_PARAMETER_NOERR (0x00000000U) 638 #define NV0073_CTRL_DP_ERR_INVALID_PARAMETER_ERR (0x00000001U) 639 #define NV0073_CTRL_DP_ERR_LINK_TRAINING 31:31 640 #define NV0073_CTRL_DP_ERR_LINK_TRAINING_NOERR (0x00000000U) 641 #define NV0073_CTRL_DP_ERR_LINK_TRAINING_ERR (0x00000001U) 642 643 /* 644 * NV0073_CTRL_DP_LANE_DATA_PARAMS 645 * 646 * This structure provides lane characteristics. 647 * 648 * subDeviceInstance 649 * This parameter specifies the subdevice instance within the 650 * NV04_DISPLAY_COMMON parent device to which the operation should be 651 * directed. This parameter must specify a value between zero and the 652 * total number of subdevices within the parent device. This parameter 653 * should be set to zero for default behavior. 654 * displayId 655 * This parameter specifies the ID of the display for which the dfp 656 * caps should be returned. The display ID must a dfp display. 657 * If more than one displayId bit is set or the displayId is not a dfp, 658 * this call will return NV_ERR_INVALID_ARGUMENT. 659 * numLanes 660 * Indicates number of lanes for which the data is valid 661 * data 662 * This parameter is an input to this command. 663 * Here are the current defined fields: 664 * NV0073_CTRL_DP_LANE_DATA_PREEMPHASIS 665 * This field specifies the preemphasis level set in the lane. 666 * The valid values for this field are: 667 * NV0073_CTRL_DP_LANE_DATA_PREEMPHASIS_NONE 668 * No-preemphais for this lane. 669 * NV0073_CTRL_DP_LANE_DATA_PREEMPHASIS_LEVEL1 670 * Preemphasis set to 3.5 dB. 671 * NV0073_CTRL_DP_LANE_DATA_PREEMPHASIS_LEVEL2 672 * Preemphasis set to 6.0 dB. 673 * NV0073_CTRL_DP_LANE_DATA_PREEMPHASIS_LEVEL3 674 * Preemphasis set to 9.5 dB. 675 * NV0073_CTRL_DP_LANE_DATA_DRIVECURRENT 676 * This field specifies the drive current set in the lane. 677 * The valid values for this field are: 678 * NV0073_CTRL_DP_LANE_DATA_DRIVECURRENT_LEVEL0 679 * Drive current level is set to 8 mA 680 * NV0073_CTRL_DP_LANE_DATA_DRIVECURRENT_LEVEL1 681 * Drive current level is set to 12 mA 682 * NV0073_CTRL_DP_LANE_DATA_DRIVECURRENT_LEVEL2 683 * Drive current level is set to 16 mA 684 * NV0073_CTRL_DP_LANE_DATA_DRIVECURRENT_LEVEL3 685 * Drive current level is set to 24 mA 686 * Possible status values returned are: 687 * NV_OK 688 * NV_ERR_INVALID_PARAM_STRUCT 689 * NV_ERR_INVALID_ARGUMENT 690 */ 691 #define NV0073_CTRL_MAX_LANES 8U 692 693 typedef struct NV0073_CTRL_DP_LANE_DATA_PARAMS { 694 NvU32 subDeviceInstance; 695 NvU32 displayId; 696 NvU32 numLanes; 697 NvU32 data[NV0073_CTRL_MAX_LANES]; 698 } NV0073_CTRL_DP_LANE_DATA_PARAMS; 699 700 #define NV0073_CTRL_DP_LANE_DATA_PREEMPHASIS 1:0 701 #define NV0073_CTRL_DP_LANE_DATA_PREEMPHASIS_NONE (0x00000000U) 702 #define NV0073_CTRL_DP_LANE_DATA_PREEMPHASIS_LEVEL1 (0x00000001U) 703 #define NV0073_CTRL_DP_LANE_DATA_PREEMPHASIS_LEVEL2 (0x00000002U) 704 #define NV0073_CTRL_DP_LANE_DATA_PREEMPHASIS_LEVEL3 (0x00000003U) 705 #define NV0073_CTRL_DP_LANE_DATA_DRIVECURRENT 3:2 706 #define NV0073_CTRL_DP_LANE_DATA_DRIVECURRENT_LEVEL0 (0x00000000U) 707 #define NV0073_CTRL_DP_LANE_DATA_DRIVECURRENT_LEVEL1 (0x00000001U) 708 #define NV0073_CTRL_DP_LANE_DATA_DRIVECURRENT_LEVEL2 (0x00000002U) 709 #define NV0073_CTRL_DP_LANE_DATA_DRIVECURRENT_LEVEL3 (0x00000003U) 710 711 /* 712 * NV0073_CTRL_CMD_GET_DP_LANE_DATA 713 * 714 * This command is used to get the current pre-emphasis and drive current 715 * level values for the specified number of lanes. 716 * 717 * The command takes a NV0073_CTRL_DP_LANE_DATA_PARAMS structure as the 718 * argument with the appropriate subDeviceInstance and displayId filled. 719 * The arguments of this structure and the format of preemphasis and drive- 720 * current levels are described above. 721 * 722 * Possible status values returned are: 723 * NV_OK 724 * NV_ERR_INVALID_PARAM_STRUCT 725 * NV_ERR_INVALID_ARGUMENT 726 * 727 * NOTE: This control call is only for testing purposes and 728 * should not be used in normal DP operations. Preemphais 729 * and drive current level will be set during Link training 730 * in normal DP operations 731 * 732 */ 733 734 #define NV0073_CTRL_CMD_DP_GET_LANE_DATA (0x731345U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_GET_LANE_DATA_PARAMS_MESSAGE_ID" */ 735 736 #define NV0073_CTRL_DP_GET_LANE_DATA_PARAMS_MESSAGE_ID (0x45U) 737 738 typedef NV0073_CTRL_DP_LANE_DATA_PARAMS NV0073_CTRL_DP_GET_LANE_DATA_PARAMS; 739 740 741 /* 742 * NV0073_CTRL_CMD_SET_DP_LANE_DATA 743 * 744 * This command is used to set the pre-emphasis and drive current 745 * level values for the specified number of lanes. 746 * 747 * The command takes a NV0073_CTRL_DP_LANE_DATA_PARAMS structure as the 748 * argument with the appropriate subDeviceInstance, displayId, number of 749 * lanes, preemphasis and drive current values filled in. 750 * The arguments of this structure and the format of preemphasis and drive- 751 * current levels are described above. 752 * 753 * Possible status values returned are: 754 * NV_OK 755 * NV_ERR_INVALID_PARAM_STRUCT 756 * NV_ERR_INVALID_ARGUMENT 757 * 758 * NOTE: This control call is only for testing purposes and 759 * should not be used in normal DP operations. Preemphais 760 * and drivecurrent will be set during Link training in 761 * normal DP operations 762 * 763 */ 764 765 #define NV0073_CTRL_CMD_DP_SET_LANE_DATA (0x731346U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_SET_LANE_DATA_PARAMS_MESSAGE_ID" */ 766 767 #define NV0073_CTRL_DP_SET_LANE_DATA_PARAMS_MESSAGE_ID (0x46U) 768 769 typedef NV0073_CTRL_DP_LANE_DATA_PARAMS NV0073_CTRL_DP_SET_LANE_DATA_PARAMS; 770 771 /* 772 * NV0073_CTRL_DP_CSTM 773 * 774 * This structure specifies - 775 * A) 80 bit DP CSTM Test Pattern data for DP1.x (HBR2 + 8b/10b channel coding) 776 * The fields of this structure are to be specified as follows: 777 * field_31_0 takes bits 31:0 778 * field_63_32 takes bits 63:32 779 * field_95_64 takes bits 79:64 780 * B) 264 bit DP CSTM Test Pattern data for DP2.x (128b/132b channel coding) 781 * The fields of this structure are to be specified as follows: 782 * field_31_0 contains bits 31:0 783 * field_63_32 contains bits 63:32 784 * field_95_64 contains bits 95:64 785 * field_127_95 contains bits 127:95 786 * field_159_128 contains bits 159:128 787 * field_191_160 contains bits 191:160 788 * field_223_192 contains bits 223:192 789 * field_255_224 contains bits 255:224 790 * field_263_256 contains bits 263:256 791 */ 792 typedef struct NV0073_CTRL_DP_CSTM { 793 NvU32 field_31_0; 794 NvU32 field_63_32; 795 NvU32 field_95_64; 796 NvU32 field_127_95; 797 NvU32 field_159_128; 798 NvU32 field_191_160; 799 NvU32 field_223_192; 800 NvU32 field_255_224; 801 NvU32 field_263_256; 802 } NV0073_CTRL_DP_CSTM; 803 804 #define NV0073_CTRL_DP_SET_TESTPATTERN_PARAMS_CSTM2 15:0 805 #define NV0073_CTRL_DP_SET_TESTPATTERN_PARAMS_CSTM8 7:0 806 807 808 /* 809 * NV0073_CTRL_DP_TESTPATTERN 810 * 811 * This structure specifies the possible test patterns available in display port. 812 */ 813 814 typedef struct NV0073_CTRL_DP_TESTPATTERN { 815 NvU32 testPattern; 816 } NV0073_CTRL_DP_TESTPATTERN; 817 818 #define NV0073_CTRL_DP_TESTPATTERN_DATA 4:0 819 #define NV0073_CTRL_DP_TESTPATTERN_DATA_NONE (0x00000000U) 820 #define NV0073_CTRL_DP_TESTPATTERN_DATA_D10_2 (0x00000001U) 821 #define NV0073_CTRL_DP_TESTPATTERN_DATA_SERMP (0x00000002U) 822 #define NV0073_CTRL_DP_TESTPATTERN_DATA_PRBS_7 (0x00000003U) 823 #define NV0073_CTRL_DP_TESTPATTERN_DATA_CSTM (0x00000004U) 824 #define NV0073_CTRL_DP_TESTPATTERN_DATA_HBR2COMPLIANCE (0x00000005U) 825 #define NV0073_CTRL_DP_TESTPATTERN_DATA_CP2520PAT3 (0x00000006U) 826 #define NV0073_CTRL_DP_TESTPATTERN_DATA_TRAINING1 (0x00000007U) 827 #define NV0073_CTRL_DP_TESTPATTERN_DATA_TRAINING2 (0x00000008U) 828 #define NV0073_CTRL_DP_TESTPATTERN_DATA_TRAINING3 (0x00000009U) 829 #define NV0073_CTRL_DP_TESTPATTERN_DATA_TRAINING4 (0x0000000AU) 830 #define NV0073_CTRL_DP_TESTPATTERN_DATA_CP2520PAT1 (0x0000000BU) 831 #define NV0073_CTRL_DP_TESTPATTERN_DATA_128B132B_TPS1 (0x0000000CU) 832 #define NV0073_CTRL_DP_TESTPATTERN_DATA_128B132B_TPS2 (0x0000000DU) 833 #define NV0073_CTRL_DP_TESTPATTERN_DATA_PRBS_9 (0x0000000EU) 834 #define NV0073_CTRL_DP_TESTPATTERN_DATA_PRBS_11 (0x0000000FU) 835 #define NV0073_CTRL_DP_TESTPATTERN_DATA_PRBS_15 (0x00000010U) 836 #define NV0073_CTRL_DP_TESTPATTERN_DATA_PRBS_23 (0x00000011U) 837 #define NV0073_CTRL_DP_TESTPATTERN_DATA_PRBS_31 (0x00000012U) 838 #define NV0073_CTRL_DP_TESTPATTERN_DATA_SQNUM (0x00000013U) 839 #define NV0073_CTRL_DP_TESTPATTERN_DATA_CSTM_264 (0x00000014U) 840 841 /* 842 * NV0073_CTRL_CMD_DP_SET_TESTPATTERN 843 * 844 * This command forces the main link to output the selected test patterns 845 * supported in DP specs. 846 * 847 * The command takes a NV0073_CTRL_DP_SET_TESTPATTERN_PARAMS structure as the 848 * argument with the appropriate subDeviceInstance, displayId and test pattern 849 * to be set as inputs. 850 * The arguments of this structure and the format of test patterns are 851 * described above. 852 * 853 * subDeviceInstance 854 * This parameter specifies the subdevice instance within the 855 * NV04_DISPLAY_COMMON parent device to which the operation should be 856 * directed. This parameter must specify a value between zero and the 857 * total number of subdevices within the parent device. This parameter 858 * should be set to zero for default behavior. 859 * displayId 860 * This parameter specifies the ID of the display for which the dfp 861 * caps should be returned. The display ID must a dfp display. 862 * If more than one displayId bit is set or the displayId is not a dfp, 863 * this call will return NV_ERR_INVALID_ARGUMENT. 864 * testPattern 865 * This parameter is of type NV0073_CTRL_DP_TESTPATTERN and specifies 866 * the testpattern to set on displayport. The format of this structure 867 * is described above. 868 * laneMask 869 * This parameter specifies the bit mask of DP lanes on which test 870 * pattern is to be applied. 871 * lower 872 * This parameter specifies the lower 64 bits of the CSTM test pattern 873 * upper 874 * This parameter specifies the upper 16 bits of the CSTM test pattern 875 * bIsHBR2 876 * This Boolean parameter is set to TRUE if HBR2 compliance test is 877 * being performed. 878 * bSkipLaneDataOverride 879 * skip override of pre-emp and drive current 880 * 881 * Possible status values returned are: 882 * NV_OK 883 * NV_ERR_INVALID_PARAM_STRUCT 884 * NV_ERR_INVALID_ARGUMENT 885 * 886 * NOTE: This control call is only for testing purposes and 887 * should not be used in normal DP operations. Preemphais 888 * and drivecurrent will be set during Link training in 889 * normal DP operations 890 * 891 */ 892 893 #define NV0073_CTRL_DP_SET_TESTPATTERN_PARAMS_MESSAGE_ID (0x47U) 894 895 typedef struct NV0073_CTRL_DP_SET_TESTPATTERN_PARAMS { 896 NvU32 subDeviceInstance; 897 NvU32 displayId; 898 NV0073_CTRL_DP_TESTPATTERN testPattern; 899 NvU8 laneMask; 900 NV0073_CTRL_DP_CSTM cstm; 901 NvBool bIsHBR2; 902 NvBool bSkipLaneDataOverride; 903 } NV0073_CTRL_DP_SET_TESTPATTERN_PARAMS; 904 905 #define NV0073_CTRL_CMD_DP_SET_TESTPATTERN (0x731347U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_SET_TESTPATTERN_PARAMS_MESSAGE_ID" */ 906 907 /* 908 * NV0073_CTRL_CMD_GET_DP_TESTPATTERN 909 * 910 * This command returns the current test pattern set on the main link of 911 * Display Port. 912 * 913 * The command takes a NV0073_CTRL_DP_GET_TESTPATTERN_PARAMS structure as the 914 * argument with the appropriate subDeviceInstance, displayId as inputs and 915 * returns the current test pattern in testPattern field of the structure. 916 * 917 * subDeviceInstance 918 * This parameter specifies the subdevice instance within the 919 * NV04_DISPLAY_COMMON parent device to which the operation should be 920 * directed. This parameter must specify a value between zero and the 921 * total number of subdevices within the parent device. This parameter 922 * should be set to zero for default behavior. 923 * displayId 924 * This parameter specifies the ID of the display for which the dfp 925 * caps should be returned. The display ID must a dfp display. 926 * If more than one displayId bit is set or the displayId is not a dfp, 927 * this call will return NV_ERR_INVALID_ARGUMENT. 928 * testPattern 929 * This parameter is of type NV0073_CTRL_DP_TESTPATTERN and specifies the 930 * testpattern set on displayport. The format of this structure is 931 * described above. 932 * 933 * Possible status values returned are: 934 * NV_OK 935 * NV_ERR_INVALID_PARAM_STRUCT 936 * NV_ERR_INVALID_ARGUMENT 937 * 938 * NOTE: This control call is only for testing purposes and 939 * should not be used in normal DP operations. 940 * 941 */ 942 943 #define NV0073_CTRL_DP_GET_TESTPATTERN_PARAMS_MESSAGE_ID (0x48U) 944 945 typedef struct NV0073_CTRL_DP_GET_TESTPATTERN_PARAMS { 946 NvU32 subDeviceInstance; 947 NvU32 displayId; 948 NV0073_CTRL_DP_TESTPATTERN testPattern; 949 } NV0073_CTRL_DP_GET_TESTPATTERN_PARAMS; 950 951 952 #define NV0073_CTRL_CMD_DP_GET_TESTPATTERN (0x731348U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_GET_TESTPATTERN_PARAMS_MESSAGE_ID" */ 953 954 /* 955 * NV0073_CTRL_DP_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA 956 * 957 * This structure specifies the Pre-emphasis/Drive Current/Postcursor2/TxPu information 958 * for a display port device. These are the the current values that RM is 959 * using to map the levels for Pre-emphasis and Drive Current for Link 960 * Training. 961 * preEmphasis 962 * This field specifies the preemphasis values. 963 * driveCurrent 964 * This field specifies the driveCurrent values. 965 * postcursor2 966 * This field specifies the postcursor2 values. 967 * TxPu 968 * This field specifies the pull-up current source drive values. 969 */ 970 #define NV0073_CTRL_MAX_DRIVECURRENT_LEVELS 4U 971 #define NV0073_CTRL_MAX_PREEMPHASIS_LEVELS 4U 972 #define NV0073_CTRL_MAX_POSTCURSOR2_LEVELS 4U 973 974 typedef struct NV0073_CTRL_DP_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_1 { 975 NvU32 preEmphasis; 976 NvU32 driveCurrent; 977 NvU32 postCursor2; 978 NvU32 TxPu; 979 } NV0073_CTRL_DP_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_1; 980 981 typedef NV0073_CTRL_DP_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_1 NV0073_CTRL_DP_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_SLICE1[NV0073_CTRL_MAX_PREEMPHASIS_LEVELS]; 982 983 typedef NV0073_CTRL_DP_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_SLICE1 NV0073_CTRL_DP_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_SLICE2[NV0073_CTRL_MAX_DRIVECURRENT_LEVELS]; 984 985 typedef NV0073_CTRL_DP_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_SLICE2 NV0073_CTRL_DP_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA[NV0073_CTRL_MAX_POSTCURSOR2_LEVELS]; 986 987 988 /* 989 * NV0073_CTRL_DP_SET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA 990 * 991 * This command is used to override the Pre-emphasis/Drive Current/PostCursor2/TxPu 992 * data in the RM. 993 * subDeviceInstance 994 * This parameter specifies the subdevice instance within the 995 * NV04_DISPLAY_COMMON parent device to which the operation should be 996 * directed. This parameter must specify a value between zero and the 997 * total number of subdevices within the parent device. This parameter 998 * should be set to zero for default behavior. 999 * displayId 1000 * This parameter specifies the ID of the digital display for which the 1001 * data should be returned. The display ID must a digital display. 1002 * If more than one displayId bit is set or the displayId is not a DP, 1003 * this call will return NV_ERR_INVALID_ARGUMENT. 1004 * dpData 1005 * This parameter is of type NV0073_CTRL_DP_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA 1006 * and specifies the Pre-emphasis/Drive Current/Postcursor2/TxPu information 1007 * for a display port device. 1008 * The command takes a NV0073_CTRL_DP_SET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS 1009 * structure as the argument with the appropriate subDeviceInstance, displayId, 1010 * and dpData. The fields of this structure are described above. 1011 * 1012 * Possible status values returned are: 1013 * NV_OK 1014 * NV_ERR_INVALID_PARAM_STRUCT 1015 * NV_ERR_INVALID_ARGUMENT 1016 * 1017 */ 1018 #define NV0073_CTRL_DP_SET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS_MESSAGE_ID (0x51U) 1019 1020 typedef struct NV0073_CTRL_DP_SET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS { 1021 NvU32 subDeviceInstance; 1022 NvU32 displayId; 1023 NV0073_CTRL_DP_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA dpData; 1024 } NV0073_CTRL_DP_SET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS; 1025 1026 #define NV0073_CTRL_CMD_DP_SET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA (0x731351U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_SET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS_MESSAGE_ID" */ 1027 1028 /* 1029 * NV0073_CTRL_DP_GET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA 1030 * 1031 * This command is used to get the Pre-emphasis/Drive Current/PostCursor2/TxPu data. 1032 * subDeviceInstance 1033 * This parameter specifies the subdevice instance within the 1034 * NV04_DISPLAY_COMMON parent device to which the operation should be 1035 * directed. This parameter must specify a value between zero and the 1036 * total number of subdevices within the parent device. This parameter 1037 * should be set to zero for default behavior. 1038 * displayId 1039 * This parameter specifies the ID of the digital display for which the 1040 * data should be returned. The display ID must a digital display. 1041 * If more than one displayId bit is set or the displayId is not a DP, 1042 * this call will return NV_ERR_INVALID_ARGUMENT. 1043 * The command takes a NV0073_CTRL_DP_GET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS 1044 * structure as the argument with the appropriate subDeviceInstance, displayId, 1045 * and dpData. The fields of this structure are described above. 1046 * 1047 * Possible status values returned are: 1048 * NV_OK 1049 * NV_ERR_INVALID_PARAM_STRUCT 1050 * NV_ERR_INVALID_ARGUMENT 1051 * 1052 */ 1053 #define NV0073_CTRL_DP_GET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS_MESSAGE_ID (0x52U) 1054 1055 typedef struct NV0073_CTRL_DP_GET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS { 1056 NvU32 subDeviceInstance; 1057 NvU32 displayId; 1058 NV0073_CTRL_DP_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA dpData; 1059 } NV0073_CTRL_DP_GET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS; 1060 1061 #define NV0073_CTRL_CMD_DP_GET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA (0x731352U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_GET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS_MESSAGE_ID" */ 1062 1063 1064 1065 /* 1066 * NV0073_CTRL_CMD_DP_MAIN_LINK_CTRL 1067 * 1068 * This command is used to set various Main Link configurations for 1069 * the specified displayId such as powering up/down Main Link. 1070 * 1071 * subDeviceInstance 1072 * This parameter specifies the subdevice instance within the 1073 * NV04_DISPLAY_COMMON parent device to which the operation should be 1074 * directed. This parameter must specify a value between zero and the 1075 * total number of subdevices within the parent device. This parameter 1076 * should be set to zero for default behavior. 1077 * displayId 1078 * This parameter specifies the ID of the DP display which owns 1079 * the Main Link to be adjusted. The display ID must a DP display 1080 * as determined with the NV0073_CTRL_CMD_SPECIFIC_GET_TYPE command. 1081 * If more than one displayId bit is set or the displayId is not a DP, 1082 * this call will return NV_ERR_INVALID_ARGUMENT. 1083 * ctrl 1084 * Here are the current defined fields: 1085 * NV0073_CTRL_DP_MAIN_LINK_CTRL_POWER_STATE_POWERDOWN 1086 * This value will power down Main Link. 1087 * NV0073_CTRL_DP_MAIN_LINK_CTRL_POWER_STATE_POWERUP 1088 * This value will power up Main Link. 1089 * 1090 */ 1091 #define NV0073_CTRL_CMD_DP_MAIN_LINK_CTRL (0x731356U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_MAIN_LINK_CTRL_PARAMS_MESSAGE_ID" */ 1092 1093 #define NV0073_CTRL_DP_MAIN_LINK_CTRL_PARAMS_MESSAGE_ID (0x56U) 1094 1095 typedef struct NV0073_CTRL_DP_MAIN_LINK_CTRL_PARAMS { 1096 NvU32 subDeviceInstance; 1097 NvU32 displayId; 1098 NvU32 ctrl; 1099 } NV0073_CTRL_DP_MAIN_LINK_CTRL_PARAMS; 1100 1101 #define NV0073_CTRL_DP_MAIN_LINK_CTRL_POWER_STATE 0:0 1102 #define NV0073_CTRL_DP_MAIN_LINK_CTRL_POWER_STATE_POWERDOWN (0x00000000U) 1103 #define NV0073_CTRL_DP_MAIN_LINK_CTRL_POWER_STATE_POWERUP (0x00000001U) 1104 1105 1106 1107 /* 1108 * NV0073_CTRL_CMD_DP_GET_AUDIO_MUTESTREAM 1109 * 1110 * This command returns the current audio mute state on the main link of Display Port 1111 * 1112 * The command takes a NV0073_CTRL_DP_GET_AUDIO_MUTESTREAM_PARAMS structure as the 1113 * argument with the appropriate subDeviceInstance, displayId as inputs and returns the 1114 * current mute status in mute field of the structure. 1115 * 1116 * subDeviceInstance 1117 * This parameter specifies the subdevice instance within the 1118 * NV04_DISPLAY_COMMON parent device to which the operation should be 1119 * directed. This parameter must specify a value between zero and the 1120 * total number of subdevices within the parent device. This parameter 1121 * should be set to zero for default behavior. 1122 * displayId 1123 * This parameter specifies the ID of the display for which the audio stream 1124 * state should be returned. The display ID must a DP display. 1125 * If the display ID is invalid or if it is not a DP display, 1126 * this call will return NV_ERR_INVALID_ARGUMENT. 1127 * mute 1128 * This parameter will return one of the following values: 1129 * NV0073_CTRL_DP_AUDIO_MUTESTREAM_MUTE_DISABLE 1130 * Audio mute is currently disabled. 1131 * NV0073_CTRL_DP_AUDIO_MUTESTREAM_MUTE_ENABLE 1132 * Audio mute is currently enabled. 1133 * NV0073_CTRL_DP_AUDIO_MUTESTREAM_MUTE_AUTO 1134 * Audio mute is automatically controlled by hardware. 1135 * NV0073_CTRL_DP_AUDIO_MUTESTREAM_MUTE_UNKNOWN 1136 * Audio mute is currently in an unknown state. 1137 * 1138 * Possible status values returned are: 1139 * NV_OK 1140 * NV_ERR_INVALID_PARAM_STRUCT 1141 * NV_ERR_INVALID_ARGUMENT 1142 * 1143 * 1144 */ 1145 #define NV0073_CTRL_CMD_DP_GET_AUDIO_MUTESTREAM (0x731358U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_GET_AUDIO_MUTESTREAM_PARAMS_MESSAGE_ID" */ 1146 1147 #define NV0073_CTRL_DP_GET_AUDIO_MUTESTREAM_PARAMS_MESSAGE_ID (0x58U) 1148 1149 typedef struct NV0073_CTRL_DP_GET_AUDIO_MUTESTREAM_PARAMS { 1150 NvU32 subDeviceInstance; 1151 NvU32 displayId; 1152 NvU32 mute; 1153 } NV0073_CTRL_DP_GET_AUDIO_MUTESTREAM_PARAMS; 1154 1155 #define NV0073_CTRL_DP_AUDIO_MUTESTREAM_MUTE_DISABLE (0x00000000U) 1156 #define NV0073_CTRL_DP_AUDIO_MUTESTREAM_MUTE_ENABLE (0x00000001U) 1157 #define NV0073_CTRL_DP_AUDIO_MUTESTREAM_MUTE_AUTO (0x00000002U) 1158 #define NV0073_CTRL_DP_AUDIO_MUTESTREAM_MUTE_UNKNOWN (0x00000003U) 1159 1160 /* 1161 * NV0073_CTRL_CMD_DP_SET_AUDIO_MUTESTREAM 1162 * 1163 * This command sets the current audio mute state on the main link of Display Port 1164 * 1165 * The command takes a NV0073_CTRL_DP_SET_AUDIO_MUTESTREAM_PARAMS structure as the 1166 * argument with the appropriate subDeviceInstance, displayId as inputs and whether to enable 1167 * or disable mute in the parameter - mute. 1168 * 1169 * subDeviceInstance 1170 * This parameter specifies the subdevice instance within the 1171 * NV04_DISPLAY_COMMON parent device to which the operation should be 1172 * directed. This parameter must specify a value between zero and the 1173 * total number of subdevices within the parent device. This parameter 1174 * should be set to zero for default behavior. 1175 * displayId 1176 * This parameter specifies the ID of the display for which the audio stream 1177 * state should be returned. The display ID must a DP display. 1178 * If the display ID is invalid or if it is not a DP display, 1179 * this call will return NV_ERR_INVALID_ARGUMENT. 1180 * mute 1181 * This parameter is an input to this command. 1182 * Here are the current defined values: 1183 * NV0073_CTRL_DP_AUDIO_MUTESTREAM_MUTE_DISABLE 1184 * Audio mute will be disabled. 1185 * NV0073_CTRL_DP_AUDIO_MUTESTREAM_MUTE_ENABLE 1186 * Audio mute will be enabled. 1187 * NV0073_CTRL_DP_AUDIO_MUTESTREAM_MUTE_AUTO 1188 * Audio mute will be automatically controlled by hardware. 1189 * 1190 * Note: Any other value for mute in NV0073_CTRL_DP_SET_AUDIO_MUTESTREAM_PARAMS is not allowed and 1191 * the API will return an error. 1192 * 1193 * Possible status values returned are: 1194 * NV_OK 1195 * NV_ERR_INVALID_PARAM_STRUCT 1196 * NV_ERR_INVALID_ARGUMENT 1197 * 1198 * 1199 */ 1200 #define NV0073_CTRL_CMD_DP_SET_AUDIO_MUTESTREAM (0x731359U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_SET_AUDIO_MUTESTREAM_PARAMS_MESSAGE_ID" */ 1201 1202 #define NV0073_CTRL_DP_SET_AUDIO_MUTESTREAM_PARAMS_MESSAGE_ID (0x59U) 1203 1204 typedef struct NV0073_CTRL_DP_SET_AUDIO_MUTESTREAM_PARAMS { 1205 NvU32 subDeviceInstance; 1206 NvU32 displayId; 1207 NvU32 mute; 1208 } NV0073_CTRL_DP_SET_AUDIO_MUTESTREAM_PARAMS; 1209 1210 /* 1211 * NV0073_CTRL_CMD_DP_ASSR_CTRL 1212 * 1213 * This command is used to control and query DisplayPort ASSR 1214 * settings for the specified displayId. 1215 * 1216 * subDeviceInstance 1217 * This parameter specifies the subdevice instance within the 1218 * NV04_DISPLAY_COMMON parent device to which the operation should be 1219 * directed. This parameter must specify a value between zero and the 1220 * total number of subdevices within the parent device. This parameter 1221 * should be set to zero for default behavior. 1222 * displayId 1223 * This parameter specifies the ID of the DP display which owns 1224 * the Main Link to be adjusted. The display ID must a DP display 1225 * as determined with the NV0073_CTRL_CMD_SPECIFIC_GET_TYPE command. 1226 * If more than one displayId bit is set or the displayId is not a DP, 1227 * this call will return NV_ERR_INVALID_ARGUMENT. 1228 * cmd 1229 * This input parameter specifies the command to execute. Legal 1230 * values for this parameter include: 1231 * NV0073_CTRL_DP_ASSR_CMD_QUERY_STATE 1232 * This field can be used to query ASSR state. When used the ASSR 1233 * state value is returned in the data parameter. 1234 * NV0073_CTRL_DP_ASSR_CMD_DISABLE 1235 * This field can be used to control the ASSR disable state. 1236 * NV0073_CTRL_DP_ASSR_CMD_FORCE_STATE 1237 * This field can be used to control ASSR State without looking at 1238 * whether the display supports it. Used in conjunction with 1239 * Fake link training. Note that this updates the state on the 1240 * source side only. The sink is assumed to be configured for ASSR 1241 * by the client (DD). 1242 * data 1243 * This parameter specifies the data associated with the cmd 1244 * parameter. 1245 * NV0073_CTRL_DP_ASSR_DATA_STATE_ENABLED 1246 * This field indicates the state of ASSR when queried using cmd 1247 * parameter. When used to control the State, it indicates whether 1248 * ASSR should be enabled or disabled. 1249 * NV0073_CTRL_DP_ASSR_DATA_STATE_ENABLED_NO 1250 * When queried this flag indicates that ASSR is not enabled on the sink. 1251 * When used as the data for CMD_FORCE_STATE, it requests ASSR to 1252 * to be disabled on the source side. 1253 * NV0073_CTRL_DP_ASSR_DATA_STATE_ENABLED_YES 1254 * When queried this flag indicates that ASSR is not enabled on the sink. 1255 * When used as the data for CMD_FORCE_STATE, it requests ASSR to 1256 * to be enabled on the source side. 1257 * err 1258 * This output parameter specifies any errors associated with the cmd 1259 * parameter. 1260 * NV0073_CTRL_DP_ASSR_ERR_CAP 1261 * This field indicates the error pertaining to ASSR capability of 1262 * the sink device. 1263 * NV0073_CTRL_DP_ASSR_ERR_CAP_NOERR 1264 * This flag indicates there is no error. 1265 * NV0073_CTRL_DP_ASSR_ERR_CAP_ERR 1266 * This flag indicates that the sink is not ASSR capable. 1267 * 1268 * Possible status values returned are: 1269 * NV_OK 1270 * NV_ERR_INVALID_PARAM_STRUCT 1271 * NV_ERR_INVALID_ARGUMENT 1272 * 1273 */ 1274 #define NV0073_CTRL_CMD_DP_ASSR_CTRL (0x73135aU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_ASSR_CTRL_PARAMS_MESSAGE_ID" */ 1275 1276 #define NV0073_CTRL_DP_ASSR_CTRL_PARAMS_MESSAGE_ID (0x5AU) 1277 1278 typedef struct NV0073_CTRL_DP_ASSR_CTRL_PARAMS { 1279 NvU32 subDeviceInstance; 1280 NvU32 displayId; 1281 NvU32 cmd; 1282 NvU32 data; 1283 NvU32 err; 1284 } NV0073_CTRL_DP_ASSR_CTRL_PARAMS; 1285 1286 #define NV0073_CTRL_DP_ASSR_CMD 31:0 1287 #define NV0073_CTRL_DP_ASSR_CMD_QUERY_STATE (0x00000001U) 1288 #define NV0073_CTRL_DP_ASSR_CMD_DISABLE (0x00000002U) 1289 #define NV0073_CTRL_DP_ASSR_CMD_FORCE_STATE (0x00000003U) 1290 #define NV0073_CTRL_DP_ASSR_CMD_ENABLE (0x00000004U) 1291 #define NV0073_CTRL_DP_ASSR_DATA_STATE_ENABLED 0:0 1292 #define NV0073_CTRL_DP_ASSR_DATA_STATE_ENABLED_NO (0x00000000U) 1293 #define NV0073_CTRL_DP_ASSR_DATA_STATE_ENABLED_YES (0x00000001U) 1294 #define NV0073_CTRL_DP_ASSR_ERR_CAP 0:0 1295 #define NV0073_CTRL_DP_ASSR_ERR_CAP_NOERR (0x00000000U) 1296 #define NV0073_CTRL_DP_ASSR_ERR_CAP_ERR (0x00000001U) 1297 1298 /* 1299 * NV0073_CTRL_CMD_DP_TOPOLOGY_ALLOCATE_DISPLAYID 1300 * 1301 * This command is used to assign a displayId from the free pool 1302 * to a specific AUX Address in a DP 1.2 topology. The topology 1303 * is uniquely identified by the DisplayId of the DP connector. 1304 * 1305 * subDeviceInstance 1306 * This parameter specifies the subdevice instance within the 1307 * NV04_DISPLAY_COMMON parent device to which the operation should be 1308 * directed. This parameter must specify a value between zero and the 1309 * total number of subdevices within the parent device. This parameter 1310 * should be set to zero for default behavior. 1311 * displayId 1312 * This is the DisplayId of the DP connector to which the topology 1313 * is rooted. 1314 * preferredDisplayId 1315 * Client can sent a preferredDisplayID which RM can use during allocation 1316 * if available. If this Id is a part of allDisplayMask in RM then we return 1317 * a free available Id to the client. However, if this is set to 1318 * NV0073_CTRL_CMD_DP_INVALID_PREFERRED_DISPLAY_ID then we return allDisplayMask value. 1319 * useBFM 1320 * Set to true if DP-BFM is used during emulation/RTL Sim. 1321 * 1322 * [out] displayIdAssigned 1323 * This is the out field that will receive the new displayId. If the 1324 * function fails this is guaranteed to be 0. 1325 * [out] allDisplayMask 1326 * This is allDisplayMask RM variable which is returned only when 1327 * preferredDisplayId is set to NV0073_CTRL_CMD_DP_INVALID_PREFERRED_DISPLAY_ID 1328 * 1329 * 1330 * Possible status values returned are: 1331 * NV_OK 1332 * NV_ERR_INVALID_PARAM_STRUCT 1333 * NV_ERR_INVALID_ARGUMENT 1334 * NV_ERR_NOT_SUPPORTED 1335 * 1336 */ 1337 #define NV0073_CTRL_CMD_DP_TOPOLOGY_ALLOCATE_DISPLAYID (0x73135bU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_TOPOLOGY_ALLOCATE_DISPLAYID_PARAMS_MESSAGE_ID" */ 1338 1339 /* 1340 * There cannot be more than 128 devices in a topology (also by DP 1.2 specification) 1341 * NOTE: Temporarily lowered to pass XAPI RM tests. Should be reevaluated! 1342 */ 1343 #define NV0073_CTRL_CMD_DP_MAX_TOPOLOGY_NODES 120U 1344 #define NV0073_CTRL_CMD_DP_INVALID_PREFERRED_DISPLAY_ID 0xffffffffU 1345 1346 #define NV0073_CTRL_CMD_DP_TOPOLOGY_ALLOCATE_DISPLAYID_PARAMS_MESSAGE_ID (0x5BU) 1347 1348 typedef struct NV0073_CTRL_CMD_DP_TOPOLOGY_ALLOCATE_DISPLAYID_PARAMS { 1349 NvU32 subDeviceInstance; 1350 NvU32 displayId; 1351 NvU32 preferredDisplayId; 1352 1353 NvBool force; 1354 NvBool useBFM; 1355 1356 NvU32 displayIdAssigned; 1357 NvU32 allDisplayMask; 1358 } NV0073_CTRL_CMD_DP_TOPOLOGY_ALLOCATE_DISPLAYID_PARAMS; 1359 1360 /* 1361 * NV0073_CTRL_CMD_DP_TOPOLOGY_FREE_DISPLAYID 1362 * 1363 * This command is used to return a multistream displayid to the unused pool. 1364 * You must not call this function while either the ARM or ASSEMBLY state cache 1365 * refers to this display-id. The head must not be attached. 1366 * 1367 * subDeviceInstance 1368 * This parameter specifies the subdevice instance within the 1369 * NV04_DISPLAY_COMMON parent device to which the operation should be 1370 * directed. This parameter must specify a value between zero and the 1371 * total number of subdevices within the parent device. This parameter 1372 * should be set to zero for default behavior. 1373 * displayId 1374 * This is the displayId to free. 1375 * 1376 * Possible status values returned are: 1377 * NV_OK 1378 * NV_ERR_INVALID_PARAM_STRUCT 1379 * NV_ERR_INVALID_ARGUMENT 1380 * NV_ERR_NOT_SUPPORTED 1381 * 1382 * 1383 */ 1384 #define NV0073_CTRL_CMD_DP_TOPOLOGY_FREE_DISPLAYID (0x73135cU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_TOPOLOGY_FREE_DISPLAYID_PARAMS_MESSAGE_ID" */ 1385 1386 #define NV0073_CTRL_CMD_DP_TOPOLOGY_FREE_DISPLAYID_PARAMS_MESSAGE_ID (0x5CU) 1387 1388 typedef struct NV0073_CTRL_CMD_DP_TOPOLOGY_FREE_DISPLAYID_PARAMS { 1389 NvU32 subDeviceInstance; 1390 NvU32 displayId; 1391 } NV0073_CTRL_CMD_DP_TOPOLOGY_FREE_DISPLAYID_PARAMS; 1392 1393 1394 1395 /* 1396 * NV0073_CTRL_CMD_DP_GET_LINK_CONFIG 1397 * 1398 * This command is used to query DisplayPort link config 1399 * settings on the transmitter side. 1400 * 1401 * subDeviceInstance 1402 * This parameter specifies the subdevice instance within the 1403 * NV04_DISPLAY_COMMON parent device to which the operation should be 1404 * directed. This parameter must specify a value between zero and the 1405 * total number of subdevices within the parent device. This parameter 1406 * should be set to zero for default behavior. 1407 * displayId 1408 * This parameter specifies the ID of the DP display which owns 1409 * the Main Link to be queried. 1410 * If more than one displayId bit is set or the displayId is not a DP, 1411 * this call will return NV_ERR_INVALID_ARGUMENT. 1412 * laneCount 1413 * Number of lanes the DP transmitter hardware is set up to drive. 1414 * linkBW 1415 * The BW of each lane that the DP transmitter hardware is set up to drive. 1416 * The values returned will be according to the DP specifications. 1417 * dp2LinkBW 1418 * Current BW of each lane that the DP transmitter hardware is set up to drive is UHBR. 1419 * The values returned will be using 10M convention. 1420 * 1421 * Note: 1422 * linkBW and dp2LinkBw are mutual exclusive. Only one of the value will be non-zero. 1423 * 1424 */ 1425 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG (0x731360U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_GET_LINK_CONFIG_PARAMS_MESSAGE_ID" */ 1426 1427 #define NV0073_CTRL_DP_GET_LINK_CONFIG_PARAMS_MESSAGE_ID (0x60U) 1428 1429 typedef struct NV0073_CTRL_DP_GET_LINK_CONFIG_PARAMS { 1430 NvU32 subDeviceInstance; 1431 NvU32 displayId; 1432 NvU32 laneCount; 1433 NvU32 linkBW; 1434 NvU32 dp2LinkBW; 1435 } NV0073_CTRL_DP_GET_LINK_CONFIG_PARAMS; 1436 1437 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LANE_COUNT 3:0 1438 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LANE_COUNT_0 (0x00000000U) 1439 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LANE_COUNT_1 (0x00000001U) 1440 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LANE_COUNT_2 (0x00000002U) 1441 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LANE_COUNT_4 (0x00000004U) 1442 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LINK_BW 3:0 1443 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LINK_BW_1_62GBPS (0x00000006U) 1444 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LINK_BW_2_70GBPS (0x0000000aU) 1445 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LINK_BW_5_40GBPS (0x00000014U) 1446 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LINK_BW_8_10GBPS (0x0000001EU) 1447 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LINK_BW_2_16GBPS (0x00000008U) 1448 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LINK_BW_2_43GBPS (0x00000009U) 1449 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LINK_BW_3_24GBPS (0x0000000CU) 1450 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LINK_BW_4_32GBPS (0x00000010U) 1451 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LINK_BW_6_75GBPS (0x00000019U) 1452 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_DP2LINK_BW 15:0 1453 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_DP2LINK_BW_1_62GBPS (0x000000A2U) 1454 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_DP2LINK_BW_2_70GBPS (0x0000010EU) 1455 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_DP2LINK_BW_5_40GBPS (0x0000021CU) 1456 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_DP2LINK_BW_8_10GBPS (0x0000032AU) 1457 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_DP2LINK_BW_2_16GBPS (0x000000D8U) 1458 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_DP2LINK_BW_2_43GBPS (0x000000F3U) 1459 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_DP2LINK_BW_3_24GBPS (0x00000114U) 1460 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_DP2LINK_BW_4_32GBPS (0x000001B0U) 1461 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_DP2LINK_BW_6_75GBPS (0x000002A3U) 1462 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_DP2LINK_BW_10_0GBPS (0x000003E8U) 1463 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_DP2LINK_BW_13_5GBPS (0x00000546U) 1464 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_DP2LINK_BW_20_0GBPS (0x000007D0U) 1465 1466 /* 1467 * NV0073_CTRL_CMD_DP_GET_EDP_DATA 1468 * 1469 * This command is used to query Embedded DisplayPort information. 1470 * 1471 * subDeviceInstance 1472 * This parameter specifies the subdevice instance within the 1473 * NV04_DISPLAY_COMMON parent device to which the operation should be 1474 * directed. This parameter must specify a value between zero and the 1475 * total number of subdevices within the parent device. This parameter 1476 * should be set to zero for default behavior. 1477 * displayId 1478 * This parameter specifies the ID of the eDP display which owns 1479 * the Main Link to be queried. 1480 * If more than one displayId bit is set or the displayId is not a eDP, 1481 * this call will return NV_ERR_INVALID_ARGUMENT. 1482 * data 1483 * This output parameter specifies the data associated with the eDP display. 1484 * It is only valid if this function returns NV_OK. 1485 * NV0073_CTRL_CMD_DP_GET_EDP_DATA_PANEL_POWER 1486 * This field indicates the state of the eDP panel power. 1487 * NV0073_CTRL_CMD_DP_GET_EDP_DATA_PANEL_POWER_OFF 1488 * This eDP panel is powered off. 1489 * NV0073_CTRL_CMD_DP_GET_EDP_DATA_PANEL_POWER_ON 1490 * This eDP panel is powered on. 1491 * NV0073_CTRL_CMD_DP_GET_EDP_DATA_DPCD_POWER_OFF 1492 * This field tells the client if DPCD power off command 1493 * should be used for the current eDP panel. 1494 * NV0073_CTRL_DP_GET_EDP_DATA_DPCD_POWER_OFF_ENABLE 1495 * This eDP panel can use DPCD to power off the panel. 1496 * NV0073_CTRL_DP_GET_EDP_DATA_DPCD_POWER_OFF_DISABLE 1497 * This eDP panel cannot use DPCD to power off the panel. 1498 * NV0073_CTRL_DP_GET_EDP_DATA_DPCD_SET_POWER 1499 * This field tells the client current eDP panel DPCD SET_POWER (0x600) status 1500 * NV0073_CTRL_DP_GET_EDP_DATA_DPCD_SET_POWER_D0 1501 * This eDP panel is current up and in full power mode. 1502 * NV0073_CTRL_DP_GET_EDP_DATA_DPCD_SET_POWER_D3 1503 * This eDP panel is current standby. 1504 */ 1505 #define NV0073_CTRL_CMD_DP_GET_EDP_DATA (0x731361U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_GET_EDP_DATA_PARAMS_MESSAGE_ID" */ 1506 1507 #define NV0073_CTRL_DP_GET_EDP_DATA_PARAMS_MESSAGE_ID (0x61U) 1508 1509 typedef struct NV0073_CTRL_DP_GET_EDP_DATA_PARAMS { 1510 NvU32 subDeviceInstance; 1511 NvU32 displayId; 1512 NvU32 data; 1513 } NV0073_CTRL_DP_GET_EDP_DATA_PARAMS; 1514 1515 #define NV0073_CTRL_DP_GET_EDP_DATA_PANEL_POWER 0:0 1516 #define NV0073_CTRL_DP_GET_EDP_DATA_PANEL_POWER_OFF (0x00000000U) 1517 #define NV0073_CTRL_DP_GET_EDP_DATA_PANEL_POWER_ON (0x00000001U) 1518 #define NV0073_CTRL_DP_GET_EDP_DATA_DPCD_POWER_OFF 1:1 1519 #define NV0073_CTRL_DP_GET_EDP_DATA_DPCD_POWER_OFF_ENABLE (0x00000000U) 1520 #define NV0073_CTRL_DP_GET_EDP_DATA_DPCD_POWER_OFF_DISABLE (0x00000001U) 1521 #define NV0073_CTRL_DP_GET_EDP_DATA_DPCD_POWER_STATE 2:2 1522 #define NV0073_CTRL_DP_GET_EDP_DATA_DPCD_POWER_STATE_D0 (0x00000000U) 1523 #define NV0073_CTRL_DP_GET_EDP_DATA_DPCD_POWER_STATE_D3 (0x00000001U) 1524 /* 1525 * NV0073_CTRL_CMD_DP_CONFIG_STREAM 1526 * 1527 * This command sets various multi/single stream related params for 1528 * for a given head. 1529 * 1530 * subDeviceInstance 1531 * This parameter specifies the subdevice instance within the 1532 * NV04_DISPLAY_COMMON parent device to which the operation should be 1533 * directed. This parameter must specify a value between zero and the 1534 * total number of subdevices within the parent device. This parameter 1535 * should be set to zero for default behavior. 1536 * Head 1537 * Specifies the head index for the stream. 1538 * sorIndex 1539 * Specifies the SOR index for the stream. 1540 * dpLink 1541 * Specifies the DP link: either 0 or 1 (A , B) 1542 * bEnableOverride 1543 * Specifies whether we're manually configuring this stream. 1544 * If not set, none of the remaining settings have any effect. 1545 * bMST 1546 * Specifies whether in Multistream or Singlestream mode. 1547 * MST/SST 1548 * Structures for passing in either Multistream or Singlestream params 1549 * slotStart 1550 * Specifies the start value of the timeslot 1551 * slotEnd 1552 * Specifies the end value of the timeslot 1553 * PBN 1554 * Specifies the PBN for the timeslot. 1555 * minHBlank 1556 * Specifies the min HBlank 1557 * minVBlank 1558 * Specifies the min VBlank 1559 * sendACT -- deprecated. A new control call has been added. 1560 * Specifies whether ACT has to be sent or not. 1561 * tuSize 1562 * Specifies TU size value 1563 * watermark 1564 * Specifies stream watermark. 1565 * linkClkFreqHz -- moving to MvidWarParams. Use that instead. 1566 * Specifies the link freq in Hz. Note that this is the byte clock. 1567 * eg: = (5.4 Ghz / 10) 1568 * actualPclkHz; -- moving to MvidWarParams. Use that instead. 1569 * Specifies the actual pclk freq in Hz. 1570 * mvidWarEnabled 1571 * Specifies whether MVID WAR is enabled. 1572 * MvidWarParams 1573 * Is valid if mvidWarEnabled is true. 1574 * bEnableTwoHeadOneOr 1575 * Whether two head one OR is enabled. If this is set then RM will 1576 * replicate SF settings of Master head on Slave head. Head index 1577 * passed should be of Master Head. 1578 * 1579 * Possible status values returned are: 1580 * NV_OK 1581 * NV_ERR_INVALID_ARGUMENT 1582 * NV_ERR_GENERIC: when this command has already been called 1583 * 1584 */ 1585 #define NV0073_CTRL_CMD_DP_CONFIG_STREAM (0x731362U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_CONFIG_STREAM_PARAMS_MESSAGE_ID" */ 1586 1587 #define NV0073_CTRL_CMD_DP_CONFIG_STREAM_PARAMS_MESSAGE_ID (0x62U) 1588 1589 typedef struct NV0073_CTRL_CMD_DP_CONFIG_STREAM_PARAMS { 1590 NvU32 subDeviceInstance; 1591 NvU32 head; 1592 NvU32 sorIndex; 1593 NvU32 dpLink; 1594 1595 NvBool bEnableOverride; 1596 NvBool bMST; 1597 NvU32 singleHeadMultistreamMode; 1598 NvU32 hBlankSym; 1599 NvU32 vBlankSym; 1600 NvU32 colorFormat; 1601 NvBool bEnableTwoHeadOneOr; 1602 1603 struct { 1604 NvU32 slotStart; 1605 NvU32 slotEnd; 1606 NvU32 PBN; 1607 NvU32 Timeslice; 1608 NvBool sendACT; // deprecated -Use NV0073_CTRL_CMD_DP_SEND_ACT 1609 NvU32 singleHeadMSTPipeline; 1610 NvBool bEnableAudioOverRightPanel; 1611 } MST; 1612 1613 struct { 1614 NvBool bEnhancedFraming; 1615 NvU32 tuSize; 1616 NvU32 waterMark; 1617 NvU32 actualPclkHz; // deprecated -Use MvidWarParams 1618 NvU32 linkClkFreqHz; // deprecated -Use MvidWarParams 1619 NvBool bEnableAudioOverRightPanel; 1620 struct { 1621 NvU32 activeCnt; 1622 NvU32 activeFrac; 1623 NvU32 activePolarity; 1624 NvBool mvidWarEnabled; 1625 struct { 1626 NvU32 actualPclkHz; 1627 NvU32 linkClkFreqHz; 1628 } MvidWarParams; 1629 } Legacy; 1630 } SST; 1631 } NV0073_CTRL_CMD_DP_CONFIG_STREAM_PARAMS; 1632 1633 /* 1634 * NV0073_CTRL_CMD_DP_SET_RATE_GOV 1635 * 1636 * This command enables rate governing for a MST. 1637 * 1638 * subDeviceInstance 1639 * This parameter specifies the subdevice instance within the 1640 * NV04_DISPLAY_COMMON parent device to which the operation should be 1641 * directed. This parameter must specify a value between zero and the 1642 * total number of subdevices within the parent device. This parameter 1643 * should be set to zero for default behavior. 1644 * Head 1645 * Specifies the head index for the stream. 1646 * sorIndex 1647 * Specifies the SOR index for the stream. 1648 * flags 1649 * Specifies Rate Governing, trigger type and wait on trigger and operation type. 1650 * 1651 * _FLAGS_OPERATION: whether this control call should program or check for status of previous operation. 1652 * 1653 * _FLAGS_STATUS: Out only. Caller should check the status for _FLAGS_OPERATION_CHECK_STATUS through 1654 * this bit. 1655 * 1656 * Possible status values returned are: 1657 * NV_OK 1658 * NV_ERR_INVALID_ARGUMENT 1659 * NV_ERR_GENERIC: when this command has already been called 1660 * 1661 */ 1662 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV (0x731363U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_SET_RATE_GOV_PARAMS_MESSAGE_ID" */ 1663 1664 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_PARAMS_MESSAGE_ID (0x63U) 1665 1666 typedef struct NV0073_CTRL_CMD_DP_SET_RATE_GOV_PARAMS { 1667 NvU32 subDeviceInstance; 1668 NvU32 head; 1669 NvU32 sorIndex; 1670 NvU32 flags; 1671 } NV0073_CTRL_CMD_DP_SET_RATE_GOV_PARAMS; 1672 1673 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_ENABLE_RG 0:0 1674 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_ENABLE_RG_OFF (0x00000000U) 1675 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_ENABLE_RG_ON (0x00000001U) 1676 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_TRIGGER_MODE 1:1 1677 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_TRIGGER_MODE_LOADV (0x00000000U) 1678 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_TRIGGER_MODE_IMMEDIATE (0x00000001U) 1679 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_WAIT_TRIGGER 2:2 1680 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_WAIT_TRIGGER_OFF (0x00000000U) 1681 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_WAIT_TRIGGER_ON (0x00000001U) 1682 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_OPERATION 3:3 1683 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_OPERATION_PROGRAM (0x00000000U) 1684 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_OPERATION_CHECK_STATUS (0x00000001U) 1685 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_STATUS 31:31 1686 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_STATUS_FAIL (0x00000000U) 1687 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_STATUS_PASS (0x00000001U) 1688 1689 /* 1690 * NV0073_CTRL_CMD_DP_SET_MANUAL_DISPLAYPORT 1691 * 1692 * This call is used by the displayport library. Once 1693 * all of the platforms have ported, this call will be 1694 * deprecated and made the default behavior. 1695 * 1696 * Disables automatic watermark programming 1697 * Disables automatic DP IRQ handling (CP IRQ) 1698 * Disables automatic retry on defers 1699 * 1700 * subDeviceInstance 1701 * This parameter specifies the subdevice instance within the 1702 * NV04_DISPLAY_COMMON parent device to which the operation should be 1703 * directed. This parameter must specify a value between zero and the 1704 * total number of subdevices within the parent device. This parameter 1705 * should be set to zero for default behavior. 1706 * 1707 * 1708 * Possible status values returned are: 1709 * NV_OK 1710 * NV_ERR_INVALID_ARGUMENT 1711 * NV_ERR_NOT_SUPPORTED 1712 * 1713 */ 1714 #define NV0073_CTRL_CMD_DP_SET_MANUAL_DISPLAYPORT (0x731365U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_SET_MANUAL_DISPLAYPORT_PARAMS_MESSAGE_ID" */ 1715 1716 #define NV0073_CTRL_CMD_DP_SET_MANUAL_DISPLAYPORT_PARAMS_MESSAGE_ID (0x65U) 1717 1718 typedef struct NV0073_CTRL_CMD_DP_SET_MANUAL_DISPLAYPORT_PARAMS { 1719 NvU32 subDeviceInstance; 1720 } NV0073_CTRL_CMD_DP_SET_MANUAL_DISPLAYPORT_PARAMS; 1721 1722 /* 1723 * NV0073_CTRL_CMD_DP_SET_ECF 1724 * 1725 * subDeviceInstance 1726 * This parameter specifies the subdevice instance within the 1727 * NV04_DISPLAY_COMMON parent device to which the operation should be 1728 * directed. This parameter must specify a value between zero and the 1729 * total number of subdevices within the parent device. This parameter 1730 * should be set to zero for default behavior. 1731 * sorIndex 1732 * This parameter specifies the Index of sor for which ecf 1733 * should be updated. 1734 * ecf 1735 * This parameter has the ECF bit mask. 1736 * 1737 * Possible status values returned are: 1738 * NV_OK 1739 * NV_ERR_INVALID_ARGUMENT 1740 * 1741 */ 1742 #define NV0073_CTRL_CMD_DP_SET_ECF (0x731366U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_SET_ECF_PARAMS_MESSAGE_ID" */ 1743 1744 #define NV0073_CTRL_CMD_DP_SET_ECF_PARAMS_MESSAGE_ID (0x66U) 1745 1746 typedef struct NV0073_CTRL_CMD_DP_SET_ECF_PARAMS { 1747 NvU32 subDeviceInstance; 1748 NvU32 sorIndex; 1749 NV_DECLARE_ALIGNED(NvU64 ecf, 8); 1750 NvBool bForceClearEcf; 1751 NvBool bAddStreamBack; 1752 } NV0073_CTRL_CMD_DP_SET_ECF_PARAMS; 1753 1754 /* 1755 * NV0073_CTRL_CMD_DP_SEND_ACT 1756 * 1757 * This command sends ACT. 1758 * 1759 * subDeviceInstance 1760 * This parameter specifies the subdevice instance within the 1761 * NV04_DISPLAY_COMMON parent device to which the operation should be 1762 * directed. This parameter must specify a value between zero and the 1763 * total number of subdevices within the parent device. This parameter 1764 * should be set to zero for default behavior. 1765 * 1766 * displayId 1767 * Specifies the root port displayId for which the trigger has to be done. 1768 * 1769 * Possible status values returned are: 1770 * NV_OK 1771 * NV_ERR_INVALID_ARGUMENT 1772 * NV_ERR_GENERIC: when this command has already been called 1773 * 1774 */ 1775 #define NV0073_CTRL_CMD_DP_SEND_ACT (0x731367U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_SEND_ACT_PARAMS_MESSAGE_ID" */ 1776 1777 #define NV0073_CTRL_CMD_DP_SEND_ACT_PARAMS_MESSAGE_ID (0x67U) 1778 1779 typedef struct NV0073_CTRL_CMD_DP_SEND_ACT_PARAMS { 1780 NvU32 subDeviceInstance; 1781 NvU32 displayId; 1782 } NV0073_CTRL_CMD_DP_SEND_ACT_PARAMS; 1783 1784 1785 1786 /* 1787 * NV0073_CTRL_CMD_DP_GET_CAPS 1788 * 1789 * This command returns the following info 1790 * 1791 * subDeviceInstance 1792 * This parameter specifies the subdevice instance within the 1793 * NV04_DISPLAY_COMMON parent device to which the operation should be 1794 * directed. This parameter must specify a value between zero and the 1795 * total number of subdevices within the parent device. This parameter 1796 * should be set to zero for default behavior. 1797 * sorIndex 1798 * Specifies the SOR index. 1799 * dpVersionsSupported 1800 * Specified the DP versions supported by the GPU 1801 * UHBRSupportedByGpu 1802 * Bitmask to specify the UHBR link rates supported by the GPU. 1803 * bIsMultistreamSupported 1804 * Returns NV_TRUE if MST is supported by the GPU else NV_FALSE 1805 * bIsSCEnabled 1806 * Returns NV_TRUE if Stream cloning is supported by the GPU else NV_FALSE 1807 * maxLinkRate 1808 * Returns Maximum allowed orclk for DP mode of SOR 1809 * 1 signifies 5.40(HBR2), 2 signifies 2.70(HBR), 3 signifies 1.62(RBR) 1810 * bHasIncreasedWatermarkLimits 1811 * Returns NV_TRUE if the GPU uses higher watermark limits, else NV_FALSE 1812 * bIsPC2Disabled 1813 * Returns NV_TRUE if VBIOS flag to disable PostCursor2 is set, else NV_FALSE 1814 * bFECSupported 1815 * Returns NV_TRUE if GPU supports FEC, else NV_FALSE 1816 * bIsTrainPhyRepeater 1817 * Returns NV_TRUE if LTTPR Link Training feature is set 1818 * bOverrideLinkBw 1819 * Returns NV_TRUE if DFP limits defined in DCB have to be honored, else NV_FALSE 1820 * 1821 * DSC caps 1822 * 1823 * Possible status values returned are: 1824 * NV_OK 1825 * NV_ERR_INVALID_ARGUMENT 1826 * NV_ERR_NOT_SUPPORTED 1827 * 1828 */ 1829 1830 #define NV0073_CTRL_CMD_DP_GET_CAPS (0x731369U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS_MESSAGE_ID" */ 1831 1832 #define NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS_MESSAGE_ID (0x69U) 1833 1834 typedef struct NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS { 1835 NvU32 subDeviceInstance; 1836 NvU32 sorIndex; 1837 NvU32 maxLinkRate; 1838 NvU32 dpVersionsSupported; 1839 NvU32 UHBRSupportedByGpu; 1840 NvBool bIsMultistreamSupported; 1841 NvBool bIsSCEnabled; 1842 NvBool bHasIncreasedWatermarkLimits; 1843 NvBool bIsPC2Disabled; 1844 NvBool isSingleHeadMSTSupported; 1845 NvBool bFECSupported; 1846 NvBool bIsTrainPhyRepeater; 1847 NvBool bOverrideLinkBw; 1848 NV0073_CTRL_CMD_DSC_CAP_PARAMS DSC; 1849 } NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS; 1850 1851 #define NV0073_CTRL_CMD_DP_GET_CAPS_DP_VERSIONS_SUPPORTED_DP1_2 0:0 1852 #define NV0073_CTRL_CMD_DP_GET_CAPS_DP_VERSIONS_SUPPORTED_DP1_2_NO (0x00000000U) 1853 #define NV0073_CTRL_CMD_DP_GET_CAPS_DP_VERSIONS_SUPPORTED_DP1_2_YES (0x00000001U) 1854 #define NV0073_CTRL_CMD_DP_GET_CAPS_DP_VERSIONS_SUPPORTED_DP1_4 1:1 1855 #define NV0073_CTRL_CMD_DP_GET_CAPS_DP_VERSIONS_SUPPORTED_DP1_4_NO (0x00000000U) 1856 #define NV0073_CTRL_CMD_DP_GET_CAPS_DP_VERSIONS_SUPPORTED_DP1_4_YES (0x00000001U) 1857 1858 1859 #define NV0073_CTRL_CMD_DP_GET_CAPS_MAX_LINK_RATE 2:0 1860 #define NV0073_CTRL_CMD_DP_GET_CAPS_MAX_LINK_RATE_NONE (0x00000000U) 1861 #define NV0073_CTRL_CMD_DP_GET_CAPS_MAX_LINK_RATE_1_62 (0x00000001U) 1862 #define NV0073_CTRL_CMD_DP_GET_CAPS_MAX_LINK_RATE_2_70 (0x00000002U) 1863 #define NV0073_CTRL_CMD_DP_GET_CAPS_MAX_LINK_RATE_5_40 (0x00000003U) 1864 #define NV0073_CTRL_CMD_DP_GET_CAPS_MAX_LINK_RATE_8_10 (0x00000004U) 1865 1866 1867 #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_ENCODER_COLOR_FORMAT_RGB (0x00000001U) 1868 #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_ENCODER_COLOR_FORMAT_Y_CB_CR_444 (0x00000002U) 1869 #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_ENCODER_COLOR_FORMAT_Y_CB_CR_NATIVE_422 (0x00000004U) 1870 #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_ENCODER_COLOR_FORMAT_Y_CB_CR_NATIVE_420 (0x00000008U) 1871 1872 #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_BITS_PER_PIXEL_PRECISION_1_16 (0x00000001U) 1873 #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_BITS_PER_PIXEL_PRECISION_1_8 (0x00000002U) 1874 #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_BITS_PER_PIXEL_PRECISION_1_4 (0x00000003U) 1875 #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_BITS_PER_PIXEL_PRECISION_1_2 (0x00000004U) 1876 #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_BITS_PER_PIXEL_PRECISION_1 (0x00000005U) 1877 1878 #define NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES (0x73136aU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_PARAMS_MESSAGE_ID" */ 1879 1880 #define NV0073_CTRL_CMD_DP_MSA_PROPERTIES_SYNC_POLARITY_LOW (0U) 1881 #define NV0073_CTRL_CMD_DP_MSA_PROPERTIES_SYNC_POLARITY_HIGH (1U) 1882 1883 typedef struct NV0073_CTRL_DP_MSA_PROPERTIES_MASK { 1884 NvU8 miscMask[2]; 1885 NvBool bRasterTotalHorizontal; 1886 NvBool bRasterTotalVertical; 1887 NvBool bActiveStartHorizontal; 1888 NvBool bActiveStartVertical; 1889 NvBool bSurfaceTotalHorizontal; 1890 NvBool bSurfaceTotalVertical; 1891 NvBool bSyncWidthHorizontal; 1892 NvBool bSyncPolarityHorizontal; 1893 NvBool bSyncHeightVertical; 1894 NvBool bSyncPolarityVertical; 1895 NvBool bReservedEnable[3]; 1896 } NV0073_CTRL_DP_MSA_PROPERTIES_MASK; 1897 1898 typedef struct NV0073_CTRL_DP_MSA_PROPERTIES_VALUES { 1899 NvU8 misc[2]; 1900 NvU16 rasterTotalHorizontal; 1901 NvU16 rasterTotalVertical; 1902 NvU16 activeStartHorizontal; 1903 NvU16 activeStartVertical; 1904 NvU16 surfaceTotalHorizontal; 1905 NvU16 surfaceTotalVertical; 1906 NvU16 syncWidthHorizontal; 1907 NvU16 syncPolarityHorizontal; 1908 NvU16 syncHeightVertical; 1909 NvU16 syncPolarityVertical; 1910 NvU8 reserved[3]; 1911 } NV0073_CTRL_DP_MSA_PROPERTIES_VALUES; 1912 1913 #define NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_PARAMS_MESSAGE_ID (0x6AU) 1914 1915 typedef struct NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_PARAMS { 1916 NvU32 subDeviceInstance; 1917 NvU32 displayId; 1918 NvBool bEnableMSA; 1919 NvBool bStereoPhaseInverse; 1920 NvBool bCacheMsaOverrideForNextModeset; 1921 NV0073_CTRL_DP_MSA_PROPERTIES_MASK featureMask; 1922 NV0073_CTRL_DP_MSA_PROPERTIES_VALUES featureValues; 1923 NV_DECLARE_ALIGNED(struct NV0073_CTRL_DP_MSA_PROPERTIES_VALUES *pFeatureDebugValues, 8); 1924 } NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_PARAMS; 1925 1926 /* 1927 * NV0073_CTRL_CMD_DP_GENERATE_FAKE_INTERRUPT 1928 * 1929 * This command can be used to invoke a fake interrupt for the operation of DP1.2 branch device 1930 * 1931 * subDeviceInstance 1932 * This parameter specifies the subdevice instance within the 1933 * NV04_DISPLAY_COMMON parent device to which the operation should be 1934 * directed. This parameter must specify a value between zero and the 1935 * total number of subdevices within the parent device. This parameter 1936 * should be set to zero for default behavior. 1937 * interruptType 1938 * This parameter specifies the type of fake interrupt to be invoked. Possible values are: 1939 * 0 => IRQ 1940 * 1 => HPDPlug 1941 * 2 => HPDUnPlug 1942 * displayId 1943 * should be for DP only 1944 * 1945 */ 1946 1947 #define NV0073_CTRL_CMD_DP_GENERATE_FAKE_INTERRUPT (0x73136bU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_GENERATE_FAKE_INTERRUPT_PARAMS_MESSAGE_ID" */ 1948 1949 #define NV0073_CTRL_CMD_DP_GENERATE_FAKE_INTERRUPT_PARAMS_MESSAGE_ID (0x6BU) 1950 1951 typedef struct NV0073_CTRL_CMD_DP_GENERATE_FAKE_INTERRUPT_PARAMS { 1952 NvU32 subDeviceInstance; 1953 NvU32 displayId; 1954 NvU32 interruptType; 1955 } NV0073_CTRL_CMD_DP_GENERATE_FAKE_INTERRUPT_PARAMS; 1956 1957 #define NV0073_CTRL_CMD_DP_GENERATE_FAKE_INTERRUPT_IRQ (0x00000000U) 1958 #define NV0073_CTRL_CMD_DP_GENERATE_FAKE_INTERRUPT_PLUG (0x00000001U) 1959 #define NV0073_CTRL_CMD_DP_GENERATE_FAKE_INTERRUPT_UNPLUG (0x00000002U) 1960 1961 /* 1962 * NV0073_CTRL_CMD_DP_CONFIG_RAD_SCRATCH_REG 1963 * 1964 * This command sets the MS displayId lit up by driver for further use of VBIOS 1965 * 1966 * subDeviceInstance 1967 * This parameter specifies the subdevice instance within the 1968 * NV04_DISPLAY_COMMON parent device to which the operation should be 1969 * directed. This parameter must specify a value between zero and the 1970 * total number of subdevices within the parent device. This parameter 1971 * should be set to zero for default behavior. 1972 * displayId 1973 * should be for DP only 1974 * activeDevAddr 1975 * Active MS panel address 1976 * sorIndex 1977 * SOR Index 1978 * dpLink 1979 * DP Sub Link Index 1980 * hopCount 1981 * Maximum hopcounts in MS address 1982 * dpMsDevAddrState 1983 * DP Multistream Device Address State. The values can be 1984 * 1985 * 1986 * Possible status values returned are: 1987 * NV_OK 1988 * NV_ERR_INVALID_ARGUMENT 1989 * NV_ERR_TIMEOUT 1990 * 1991 */ 1992 #define NV0073_CTRL_CMD_DP_CONFIG_RAD_SCRATCH_REG (0x73136cU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_CONFIG_RAD_SCRATCH_REG_PARAMS_MESSAGE_ID" */ 1993 1994 #define NV0073_CTRL_CMD_DP_CONFIG_RAD_SCRATCH_REG_PARAMS_MESSAGE_ID (0x6CU) 1995 1996 typedef struct NV0073_CTRL_CMD_DP_CONFIG_RAD_SCRATCH_REG_PARAMS { 1997 NvU32 subDeviceInstance; 1998 NvU32 displayId; 1999 NvU32 activeDevAddr; 2000 NvU32 sorIndex; 2001 NvU32 dpLink; 2002 NvU32 hopCount; 2003 NvU32 dpMsDevAddrState; 2004 } NV0073_CTRL_CMD_DP_CONFIG_RAD_SCRATCH_REG_PARAMS; 2005 2006 2007 2008 /* 2009 * NV0073_CTRL_CMD_DP_SET_TRIGGER_SELECT 2010 * 2011 * This command configures a new bit, NV_PDISP_SF_DP_LINKCTL_TRIGGER_SELECT 2012 * to indicate which pipeline will handle the 2013 * time slots allocation in single head MST mode 2014 * 2015 * subDeviceInstance 2016 * This parameter specifies the subdevice instance within the 2017 * NV04_DISPLAY_COMMON parent device to which the operation should be 2018 * directed. This parameter must specify a value between zero and the 2019 * total number of subdevices within the parent device. This parameter 2020 * should be set to zero for default behavior 2021 * Head 2022 * Specifies the head index for the stream 2023 * sorIndex 2024 * Specifies the SOR index for the stream 2025 * streamIndex 2026 * Stream Identifier 2027 * 2028 * 2029 * Possible status values returned are: 2030 * NV_OK 2031 * NV_ERR_INVALID_ARGUMENT 2032 * NV_ERR_GENERIC: when this command has already been called 2033 * 2034 */ 2035 #define NV0073_CTRL_CMD_DP_SET_TRIGGER_SELECT (0x73136fU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_SET_TRIGGER_SELECT_PARAMS_MESSAGE_ID" */ 2036 2037 #define NV0073_CTRL_CMD_DP_SET_TRIGGER_SELECT_PARAMS_MESSAGE_ID (0x6FU) 2038 2039 typedef struct NV0073_CTRL_CMD_DP_SET_TRIGGER_SELECT_PARAMS { 2040 NvU32 subDeviceInstance; 2041 NvU32 head; 2042 NvU32 sorIndex; 2043 NvU32 singleHeadMSTPipeline; 2044 } NV0073_CTRL_CMD_DP_SET_TRIGGER_SELECT_PARAMS; 2045 2046 /* 2047 * NV0073_CTRL_CMD_DP_CONFIG_SINGLE_HEAD_MULTI_STREAM 2048 * 2049 * This call is used by the displayport library.& clients of RM 2050 * Its main function is to configure single Head Multi stream mode 2051 * this call configures internal RM datastructures to support required mode. 2052 * 2053 * subDeviceInstance 2054 * This parameter specifies the subdevice instance within the 2055 * NV04_DISPLAY_COMMON parent device to which the operation should be 2056 * directed. This parameter must specify a value between zero and the 2057 * total number of subdevices within the parent device. This parameter 2058 * should be set to zero for default behavior. 2059 * 2060 * displayIDs 2061 * This parameter specifies array of DP displayIds to be configured which are driven out from a single head. 2062 * 2063 * numStreams 2064 * This parameter specifies number of streams driven from a single head 2065 * ex: for 2SST & 2MST its value is 2. 2066 * 2067 * mode 2068 * This parameter specifies single head multi stream mode to be configured. 2069 * 2070 * bSetConfigure 2071 * This parameter configures single head multistream mode 2072 * if TRUE it sets SST or MST based on 'mode' parameter and updates internal driver data structures with the given information. 2073 * if FALSE clears the configuration of single head multi stream mode. 2074 * 2075 * vbiosPrimaryDispIdIndex 2076 * This parameter specifies vbios master displayID index in displayIDs input array. 2077 * 2078 * Possible status values returned are: 2079 * NV_OK 2080 * NV_ERR_INVALID_ARGUMENT 2081 * NV_ERR_NOT_SUPPORTED 2082 * 2083 */ 2084 #define NV0073_CTRL_CMD_DP_CONFIG_SINGLE_HEAD_MULTI_STREAM (0x73136eU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_CONFIG_SINGLE_HEAD_MULTI_STREAM_PARAMS_MESSAGE_ID" */ 2085 2086 #define NV0073_CTRL_CMD_DP_SINGLE_HEAD_MAX_STREAMS (0x00000002U) 2087 #define NV0073_CTRL_CMD_DP_CONFIG_SINGLE_HEAD_MULTI_STREAM_PARAMS_MESSAGE_ID (0x6EU) 2088 2089 typedef struct NV0073_CTRL_CMD_DP_CONFIG_SINGLE_HEAD_MULTI_STREAM_PARAMS { 2090 NvU32 subDeviceInstance; 2091 NvU32 displayIDs[NV0073_CTRL_CMD_DP_SINGLE_HEAD_MAX_STREAMS]; 2092 NvU32 numStreams; 2093 NvU32 mode; 2094 NvBool bSetConfig; 2095 NvU8 vbiosPrimaryDispIdIndex; 2096 } NV0073_CTRL_CMD_DP_CONFIG_SINGLE_HEAD_MULTI_STREAM_PARAMS; 2097 2098 #define NV0073_CTRL_CMD_DP_SINGLE_HEAD_MULTI_STREAM_NONE (0x00000000U) 2099 #define NV0073_CTRL_CMD_DP_SINGLE_HEAD_MULTI_STREAM_MODE_SST (0x00000001U) 2100 #define NV0073_CTRL_CMD_DP_SINGLE_HEAD_MULTI_STREAM_MODE_MST (0x00000002U) 2101 2102 /* 2103 * NV0073_CTRL_CMD_DP_SET_TRIGGER_ALL 2104 * 2105 * This command configures a new bit, NV_PDISP_SF_DP_LINKCTL_TRIGGER_ALL 2106 * to indicate which if all the pipelines to take affect on ACT (sorFlushUpdates) 2107 * in single head MST mode 2108 * 2109 * subDeviceInstance 2110 * This parameter specifies the subdevice instance within the 2111 * NV04_DISPLAY_COMMON parent device to which the operation should be 2112 * directed. This parameter must specify a value between zero and the 2113 * total number of subdevices within the parent device. This parameter 2114 * should be set to zero for default behavior 2115 * Head 2116 * Specifies the head index for the stream 2117 * sorIndex 2118 * Specifies the SOR index for the stream 2119 * streamIndex 2120 * Stream Identifier 2121 * 2122 * 2123 * Possible status values returned are: 2124 * NV_OK 2125 * NV_ERR_INVALID_ARGUMENT 2126 * NV_ERR_GENERIC: when this command has already been called 2127 * 2128 */ 2129 #define NV0073_CTRL_CMD_DP_SET_TRIGGER_ALL (0x731370U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_SET_TRIGGER_ALL_PARAMS_MESSAGE_ID" */ 2130 2131 #define NV0073_CTRL_CMD_DP_SET_TRIGGER_ALL_PARAMS_MESSAGE_ID (0x70U) 2132 2133 typedef struct NV0073_CTRL_CMD_DP_SET_TRIGGER_ALL_PARAMS { 2134 NvU32 subDeviceInstance; 2135 NvU32 head; 2136 NvBool enable; 2137 } NV0073_CTRL_CMD_DP_SET_TRIGGER_ALL_PARAMS; 2138 2139 2140 2141 /* 2142 * NV0073_CTRL_CMD_DP_GET_AUXLOGGER_BUFFER_DATA 2143 * 2144 * This command collects the DP AUX log from the RM aux buffer and 2145 * sends it to the application. 2146 * 2147 * dpAuxBufferReadSize 2148 * Specifies the number of logs to be read from the 2149 * AUX buffer in RM 2150 * dpNumMessagesRead 2151 * Specifies the number of logs read from the AUX buffer 2152 * dpAuxBuffer 2153 * The local buffer to copy the specified number of logs 2154 * from RM to user application 2155 * 2156 * 2157 * Possible status values returned are: 2158 * NV_OK 2159 * NV_ERR_INVALID_ARGUMENT 2160 * NV_ERR_GENERIC: when this command has already been called 2161 * 2162 * 2163 *DPAUXPACKET - This structure holds the log information 2164 * auxPacket - carries the hex dump of the message transaction 2165 * auxEvents - Contains the information as in what request and reply type where 2166 * auxRequestTimeStamp - Request timestamp 2167 * auxMessageReqSize - Request Message size 2168 * auxMessageReplySize - Reply message size(how much information was actually send by receiver) 2169 * auxOutPort - DP port number 2170 * auxPortAddress - Address to which data was requested to be read or written 2171 * auxReplyTimeStamp - Reply timestamp 2172 * auxCount - Serial number to keep track of transactions 2173 */ 2174 2175 /*Maximum dp messages size is 16 as per the protocol*/ 2176 #define DP_MAX_MSG_SIZE 16U 2177 #define MAX_LOGS_PER_POLL 50U 2178 2179 /* Various kinds of DP Aux transactions */ 2180 #define NV_DP_AUXLOGGER_REQUEST_TYPE 3:0 2181 #define NV_DP_AUXLOGGER_REQUEST_TYPE_NULL 0x00000000U 2182 #define NV_DP_AUXLOGGER_REQUEST_TYPE_I2CWR 0x00000001U 2183 #define NV_DP_AUXLOGGER_REQUEST_TYPE_I2CREQWSTAT 0x00000002U 2184 #define NV_DP_AUXLOGGER_REQUEST_TYPE_MOTWR 0x00000003U 2185 #define NV_DP_AUXLOGGER_REQUEST_TYPE_MOTREQWSTAT 0x00000004U 2186 #define NV_DP_AUXLOGGER_REQUEST_TYPE_AUXWR 0x00000005U 2187 #define NV_DP_AUXLOGGER_REQUEST_TYPE_I2CRD 0x00000006U 2188 #define NV_DP_AUXLOGGER_REQUEST_TYPE_MOTRD 0x00000007U 2189 #define NV_DP_AUXLOGGER_REQUEST_TYPE_AUXRD 0x00000008U 2190 #define NV_DP_AUXLOGGER_REQUEST_TYPE_UNKNOWN 0x00000009U 2191 2192 #define NV_DP_AUXLOGGER_REPLY_TYPE 7:4 2193 #define NV_DP_AUXLOGGER_REPLY_TYPE_NULL 0x00000000U 2194 #define NV_DP_AUXLOGGER_REPLY_TYPE_SB_ACK 0x00000001U 2195 #define NV_DP_AUXLOGGER_REPLY_TYPE_RETRY 0x00000002U 2196 #define NV_DP_AUXLOGGER_REPLY_TYPE_TIMEOUT 0x00000003U 2197 #define NV_DP_AUXLOGGER_REPLY_TYPE_DEFER 0x00000004U 2198 #define NV_DP_AUXLOGGER_REPLY_TYPE_DEFER_TO 0x00000005U 2199 #define NV_DP_AUXLOGGER_REPLY_TYPE_ACK 0x00000006U 2200 #define NV_DP_AUXLOGGER_REPLY_TYPE_ERROR 0x00000007U 2201 #define NV_DP_AUXLOGGER_REPLY_TYPE_UNKNOWN 0x00000008U 2202 2203 #define NV_DP_AUXLOGGER_EVENT_TYPE 9:8 2204 #define NV_DP_AUXLOGGER_EVENT_TYPE_AUX 0x00000000U 2205 #define NV_DP_AUXLOGGER_EVENT_TYPE_HOT_PLUG 0x00000001U 2206 #define NV_DP_AUXLOGGER_EVENT_TYPE_HOT_UNPLUG 0x00000002U 2207 #define NV_DP_AUXLOGGER_EVENT_TYPE_IRQ 0x00000003U 2208 2209 #define NV_DP_AUXLOGGER_AUXCTL_CMD 15:12 2210 #define NV_DP_AUXLOGGER_AUXCTL_CMD_INIT 0x00000000U 2211 #define NV_DP_AUXLOGGER_AUXCTL_CMD_I2CWR 0x00000000U 2212 #define NV_DP_AUXLOGGER_AUXCTL_CMD_I2CRD 0x00000001U 2213 #define NV_DP_AUXLOGGER_AUXCTL_CMD_I2CREQWSTAT 0x00000002U 2214 #define NV_DP_AUXLOGGER_AUXCTL_CMD_MOTWR 0x00000004U 2215 #define NV_DP_AUXLOGGER_AUXCTL_CMD_MOTRD 0x00000005U 2216 #define NV_DP_AUXLOGGER_AUXCTL_CMD_MOTREQWSTAT 0x00000006U 2217 #define NV_DP_AUXLOGGER_AUXCTL_CMD_AUXWR 0x00000008U 2218 #define NV_DP_AUXLOGGER_AUXCTL_CMD_AUXRD 0x00000009U 2219 2220 2221 typedef struct DPAUXPACKET { 2222 NvU32 auxEvents; 2223 NvU32 auxRequestTimeStamp; 2224 NvU32 auxMessageReqSize; 2225 NvU32 auxMessageReplySize; 2226 NvU32 auxOutPort; 2227 NvU32 auxPortAddress; 2228 NvU32 auxReplyTimeStamp; 2229 NvU32 auxCount; 2230 NvU8 auxPacket[DP_MAX_MSG_SIZE]; 2231 } DPAUXPACKET; 2232 typedef struct DPAUXPACKET *PDPAUXPACKET; 2233 2234 #define NV0073_CTRL_CMD_DP_GET_AUXLOGGER_BUFFER_DATA (0x731373U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_GET_AUXLOGGER_BUFFER_DATA_PARAMS_MESSAGE_ID" */ 2235 2236 #define NV0073_CTRL_CMD_DP_GET_AUXLOGGER_BUFFER_DATA_PARAMS_MESSAGE_ID (0x73U) 2237 2238 typedef struct NV0073_CTRL_CMD_DP_GET_AUXLOGGER_BUFFER_DATA_PARAMS { 2239 //In 2240 NvU32 subDeviceInstance; 2241 NvU32 dpAuxBufferReadSize; 2242 2243 //Out 2244 NvU32 dpNumMessagesRead; 2245 DPAUXPACKET dpAuxBuffer[MAX_LOGS_PER_POLL]; 2246 } NV0073_CTRL_CMD_DP_GET_AUXLOGGER_BUFFER_DATA_PARAMS; 2247 2248 2249 2250 2251 /* NV0073_CTRL_CMD_DP_CONFIG_INDEXED_LINK_RATES 2252 * 2253 * This setup link rate table for target display to enable indexed link rate 2254 * and export valid link rates back to client. Client may pass empty table to 2255 * reset previous setting. 2256 * 2257 * subDeviceInstance 2258 * client will give a subdevice to get right pGpu/pDisp for it 2259 * displayId 2260 * DisplayId of the display for which the client targets 2261 * linkRateTbl 2262 * Link rates in 200KHz as native granularity from eDP 1.4 2263 * linkBwTbl 2264 * Link rates valid for client to apply to 2265 * linkBwCount 2266 * Total valid link rates 2267 * 2268 * Possible status values returned include: 2269 * NV_OK 2270 * NV_ERR_NOT_SUPPORTED 2271 * NV_ERR_INVALID_ARGUMENT 2272 */ 2273 2274 #define NV0073_CTRL_CMD_DP_CONFIG_INDEXED_LINK_RATES (0x731377U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_CONFIG_INDEXED_LINK_RATES_PARAMS_MESSAGE_ID" */ 2275 2276 #define NV0073_CTRL_DP_MAX_INDEXED_LINK_RATES 8U 2277 2278 #define NV0073_CTRL_CMD_DP_CONFIG_INDEXED_LINK_RATES_PARAMS_MESSAGE_ID (0x77U) 2279 2280 typedef struct NV0073_CTRL_CMD_DP_CONFIG_INDEXED_LINK_RATES_PARAMS { 2281 // In 2282 NvU32 subDeviceInstance; 2283 NvU32 displayId; 2284 NvU16 linkRateTbl[NV0073_CTRL_DP_MAX_INDEXED_LINK_RATES]; 2285 2286 // Out 2287 NvU16 linkBwTbl[NV0073_CTRL_DP_MAX_INDEXED_LINK_RATES]; 2288 NvU8 linkBwCount; 2289 } NV0073_CTRL_CMD_DP_CONFIG_INDEXED_LINK_RATES_PARAMS; 2290 2291 2292 /* 2293 * NV0073_CTRL_CMD_DP_SET_STEREO_MSA_PROPERTIES 2294 * 2295 * This command is used to not depend on supervisor interrupts for setting the 2296 * stereo msa params. We will not cache the values and can toggle stereo using 2297 * this ctrl call on demand. Note that this control call will only change stereo 2298 * settings and will leave other settings as is. 2299 * 2300 * subDeviceInstance 2301 * This parameter specifies the subdevice instance within the 2302 * NV04_DISPLAY_COMMON parent device to which the operation should be 2303 * directed. This parameter must specify a value between zero and the 2304 * total number of subdevices within the parent device. This parameter 2305 * should be set to zero for default behavior. 2306 * displayId 2307 * should be for DP only 2308 * bEnableMSA 2309 * To enable or disable MSA 2310 * bStereoPhaseInverse 2311 * To enable or disable Stereo Phase Inverse value 2312 * featureMask 2313 * Enable/Disable mask of individual MSA property. 2314 * featureValues 2315 * MSA property value to write 2316 * 2317 * Possible status values returned are: 2318 * NV_OK 2319 * NV_ERR_INVALID_ARGUMENT 2320 * NV_ERR_NOT_SUPPORTED 2321 * NV_ERR_TIMEOUT 2322 * 2323 */ 2324 #define NV0073_CTRL_CMD_DP_SET_STEREO_MSA_PROPERTIES (0x731378U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_SET_STEREO_MSA_PROPERTIES_PARAMS_MESSAGE_ID" */ 2325 2326 #define NV0073_CTRL_CMD_DP_SET_STEREO_MSA_PROPERTIES_PARAMS_MESSAGE_ID (0x78U) 2327 2328 typedef struct NV0073_CTRL_CMD_DP_SET_STEREO_MSA_PROPERTIES_PARAMS { 2329 NvU32 subDeviceInstance; 2330 NvU32 displayId; 2331 NvBool bEnableMSA; 2332 NvBool bStereoPhaseInverse; 2333 NV0073_CTRL_DP_MSA_PROPERTIES_MASK featureMask; 2334 NV0073_CTRL_DP_MSA_PROPERTIES_VALUES featureValues; 2335 } NV0073_CTRL_CMD_DP_SET_STEREO_MSA_PROPERTIES_PARAMS; 2336 2337 2338 2339 /* 2340 * NV0073_CTRL_CMD_DP_CONFIGURE_FEC 2341 * 2342 * This command is used to enable/disable FEC on DP Mainlink. 2343 * FEC is a prerequisite to DSC. This should be called only 2344 * after LT completes (including PostLT LQA) while enabling. 2345 * 2346 * subDeviceInstance 2347 * This parameter specifies the subdevice instance within the 2348 * NV04_DISPLAY_COMMON parent device to which the operation should be 2349 * directed. This parameter must specify a value between zero and the 2350 * total number of subdevices within the parent device. This parameter 2351 * should be set to zero for default behavior. 2352 * 2353 * displayId 2354 * Can only be 1 and must be DP. 2355 * 2356 * bEnableFec 2357 * To enable or disable FEC 2358 * 2359 * Possible status values returned are: 2360 * NV_OK 2361 * NV_ERR_INVALID_ARGUMENT 2362 * NV_ERR_NOT_SUPPORTED 2363 * 2364 */ 2365 #define NV0073_CTRL_CMD_DP_CONFIGURE_FEC (0x73137aU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_CONFIGURE_FEC_PARAMS_MESSAGE_ID" */ 2366 2367 #define NV0073_CTRL_CMD_DP_CONFIGURE_FEC_PARAMS_MESSAGE_ID (0x7AU) 2368 2369 typedef struct NV0073_CTRL_CMD_DP_CONFIGURE_FEC_PARAMS { 2370 NvU32 subDeviceInstance; 2371 NvU32 displayId; 2372 NvBool bEnableFec; 2373 } NV0073_CTRL_CMD_DP_CONFIGURE_FEC_PARAMS; 2374 2375 /* 2376 * NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD 2377 * 2378 * subDeviceInstance 2379 * This parameter specifies the subdevice instance within the 2380 * NV04_DISPLAY_COMMON parent device to which the operation should be 2381 * directed. This parameter must specify a value between zero and the 2382 * total number of subdevices within the parent device. This parameter 2383 * should be set to zero for default behavior 2384 * cmd 2385 * This parameter is an input to this command. 2386 * Here are the current defined fields: 2387 * NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_CMD_POWER 2388 * Set to specify what operation to run. 2389 * NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_CMD_POWER_UP 2390 * Request to power up pad. 2391 * NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_CMD_POWER_DOWN 2392 * Request to power down the pad. 2393 * linkBw 2394 * This parameter is used to pass in the link bandwidth required to run the 2395 * power up sequence. Refer enum DP_LINK_BANDWIDTH for valid values. 2396 * laneCount 2397 * This parameter is used to pass the lanecount. 2398 * sorIndex 2399 * This parameter is used to pass the SOR index. 2400 * sublinkIndex 2401 * This parameter is used to pass the sublink index. Please refer 2402 * enum DFPLINKINDEX for valid values 2403 * priPadLinkIndex 2404 * This parameter is used to pass the padlink index for primary link. 2405 * Please refer enum DFPPADLINK for valid index values for Link A~F. 2406 * secPadLinkIndex 2407 * This parameter is used to pass the padlink index for secondary link. 2408 * For Single SST pass in NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_PADLINK_INDEX_INVALID 2409 * bEnableSpread 2410 * This parameter is boolean value used to indicate if spread is to be enabled or disabled. 2411 */ 2412 2413 #define NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD (0x73137bU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_PARAMS_MESSAGE_ID" */ 2414 2415 #define NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_PARAMS_MESSAGE_ID (0x7BU) 2416 2417 typedef struct NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_PARAMS { 2418 NvU32 subDeviceInstance; 2419 NvU32 cmd; 2420 NvU32 linkBw; 2421 NvU32 laneCount; 2422 NvU32 sorIndex; 2423 NvU32 sublinkIndex; // sublink A/B 2424 NvU32 priPadLinkIndex; // padlink A/B/C/D/E/F 2425 NvU32 secPadLinkIndex; // padlink A/B/C/D/E/F for secondary link in DualSST case. 2426 NvBool bEnableSpread; 2427 } NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_PARAMS; 2428 2429 #define NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_CMD_POWER 0:0 2430 #define NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_CMD_POWER_UP (0x00000000U) 2431 #define NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_CMD_POWER_DOWN (0x00000001U) 2432 2433 #define NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_PADLINK_INDEX_INVALID (0x000000FFU) 2434 2435 /* 2436 * NV0073_CTRL_CMD_DP_AUXCH_CTRL 2437 * 2438 * This command can be used to perform the I2C Bulk transfer over 2439 * DP Aux channel. This is the display port specific implementation 2440 * for sending bulk data over the DpAux channel, by splitting up the 2441 * data into pieces and retrying for pieces that aren't ACK'd. 2442 * 2443 * subDeviceInstance [IN] 2444 * This parameter specifies the subdevice instance within the 2445 * NV04_DISPLAY_COMMON parent device to which the operation should be 2446 * directed. This parameter must specify a value between zero and the 2447 * total number of subdevices within the parent device. This parameter 2448 * should be set to zero for default behavior. 2449 * displayId [IN] 2450 * This parameter specifies the ID of the display for which the dfp 2451 * caps should be returned. The display ID must a dfp display. 2452 * If more than one displayId bit is set or the displayId is not a dfp, 2453 * this call will return NV_ERR_INVALID_ARGUMENT. 2454 * addr [IN] 2455 * This parameter is an input to this command. The addr parameter follows 2456 * Section 2.4 in DisplayPort spec and the client should refer to the valid 2457 * address in DisplayPort spec. Only the first 20 bits are valid. 2458 * bWrite [IN] 2459 * This parameter specifies whether the command is a I2C write (NV_TRUE) or 2460 * a I2C read (NV_FALSE). 2461 * data [IN/OUT] 2462 * In the case of a read transaction, this parameter returns the data from 2463 * transaction request. In the case of a write transaction, the client 2464 * should write to this buffer for the data to send. 2465 * size [IN/OUT] 2466 * Specifies how many data bytes to read/write depending on the 2467 * transaction type. 2468 * 2469 * Possible status values returned are: 2470 * NV_OK 2471 * NV_ERR_INVALID_ARGUMENT 2472 * NV_ERR_NOT_SUPPORTED 2473 */ 2474 #define NV0073_CTRL_CMD_DP_AUXCH_I2C_TRANSFER_CTRL (0x73137cU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_AUXCH_I2C_TRANSFER_CTRL_PARAMS_MESSAGE_ID" */ 2475 2476 #define NV0073_CTRL_DP_AUXCH_I2C_TRANSFER_MAX_DATA_SIZE 256U 2477 2478 #define NV0073_CTRL_DP_AUXCH_I2C_TRANSFER_CTRL_PARAMS_MESSAGE_ID (0x7CU) 2479 2480 typedef struct NV0073_CTRL_DP_AUXCH_I2C_TRANSFER_CTRL_PARAMS { 2481 NvU32 subDeviceInstance; 2482 NvU32 displayId; 2483 NvU32 addr; 2484 NvBool bWrite; 2485 NvU8 data[NV0073_CTRL_DP_AUXCH_I2C_TRANSFER_MAX_DATA_SIZE]; 2486 NvU32 size; 2487 } NV0073_CTRL_DP_AUXCH_I2C_TRANSFER_CTRL_PARAMS; 2488 2489 /* 2490 * NV0073_CTRL_CMD_DP_ENABLE_VRR 2491 * 2492 * The command is used to enable VRR. 2493 * 2494 * subDeviceInstance [IN] 2495 * This parameter specifies the subdevice instance within the 2496 * NV04_DISPLAY_COMMON parent device to which the operation should be 2497 * directed. This parameter must specify a value between zero and the 2498 * total number of subdevices within the parent device. This parameter 2499 * should be set to zero for default behavior 2500 * displayId [IN] 2501 * This parameter is an input to this command, specifies the ID of the display 2502 * for client targeted to. 2503 * The display ID must a DP display. 2504 * If more than one displayId bit is set or the displayId is not a DP, 2505 * this call will return NV_ERR_INVALID_ARGUMENT. 2506 * cmd [IN] 2507 * This parameter is an input to this command. 2508 * 2509 * _STAGE: specifies the stage id to execute in the VRR enablement sequence. 2510 * _MONITOR_ENABLE_BEGIN: Send command to the monitor to start monitor 2511 * enablement procedure. 2512 * _MONITOR_ENABLE_CHALLENGE: Send challenge to the monitor 2513 * _MONITOR_ENABLE_CHECK: Read digest from the monitor, and verify 2514 * if the result is valid. 2515 * _DRIVER_ENABLE_BEGIN: Send command to the monitor to start driver 2516 * enablement procedure. 2517 * _DRIVER_ENABLE_CHALLENGE: Read challenge from the monitor and write back 2518 * corresponding digest. 2519 * _DRIVER_ENABLE_CHECK: Check if monitor enablement worked. 2520 * _RESET_MONITOR: Set the FW state m/c to a known state. 2521 * _INIT_PUBLIC_INFO: Send command to the monitor to prepare public info. 2522 * _GET_PUBLIC_INFO: Read public info from the monitor. 2523 * _STATUS_CHECK: Check if monitor is ready for next command. 2524 * result [OUT] 2525 * This is an output parameter to reflect the result of the operation. 2526 */ 2527 #define NV0073_CTRL_CMD_DP_ENABLE_VRR (0x73137dU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_ENABLE_VRR_PARAMS_MESSAGE_ID" */ 2528 2529 #define NV0073_CTRL_CMD_DP_ENABLE_VRR_PARAMS_MESSAGE_ID (0x7DU) 2530 2531 typedef struct NV0073_CTRL_CMD_DP_ENABLE_VRR_PARAMS { 2532 NvU32 subDeviceInstance; 2533 NvU32 displayId; 2534 NvU32 cmd; 2535 NvU32 result; 2536 } NV0073_CTRL_CMD_DP_ENABLE_VRR_PARAMS; 2537 2538 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE 3:0 2539 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_MONITOR_ENABLE_BEGIN (0x00000000U) 2540 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_MONITOR_ENABLE_CHALLENGE (0x00000001U) 2541 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_MONITOR_ENABLE_CHECK (0x00000002U) 2542 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_DRIVER_ENABLE_BEGIN (0x00000003U) 2543 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_DRIVER_ENABLE_CHALLENGE (0x00000004U) 2544 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_DRIVER_ENABLE_CHECK (0x00000005U) 2545 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_RESET_MONITOR (0x00000006U) 2546 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_INIT_PUBLIC_INFO (0x00000007U) 2547 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_GET_PUBLIC_INFO (0x00000008U) 2548 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_STATUS_CHECK (0x00000009U) 2549 2550 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_STATUS_OK (0x00000000U) 2551 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_STATUS_PENDING (0x80000001U) 2552 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_STATUS_READ_ERROR (0x80000002U) 2553 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_STATUS_WRITE_ERROR (0x80000003U) 2554 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_STATUS_DEVICE_ERROR (0x80000004U) 2555 2556 /* 2557 * NV0073_CTRL_CMD_DP_GET_GENERIC_INFOFRAME 2558 * 2559 * This command is used to capture the display output packets for DP protocol. 2560 * Common supported packets are Dynamic Range and mastering infoframe SDP for HDR, 2561 * VSC SDP for colorimetry and pixel encoding info. 2562 * 2563 * displayID (in) 2564 * This parameter specifies the displayID for the display resource to configure. 2565 * subDeviceInstance (in) 2566 * This parameter specifies the subdevice instance within the NV04_DISPLAY_COMMON 2567 * parent device to which the operation should be directed. 2568 * infoframeIndex (in) 2569 * HW provides support to program 2 generic infoframes per frame for DP. 2570 * This parameter indicates which infoframe packet is to be captured. 2571 * Possible flags are as follows: 2572 * NV0073_CTRL_DP_GET_GENERIC_INFOFRAME_CAPTURE_MODE 2573 * This flag indicates the INFOFRAME that needs to be read. 2574 * Set to _INFOFRAME0 if RM should read GENERIC_INFOFRAME 2575 * Set to _INFOFRAME1 if RM should read GENERIC_INFOFRAME1 2576 * packet (out) 2577 * pPacket points to the memory for reading the infoframe packet. 2578 * bTransmitControl (out) 2579 * This gives the transmit mode of infoframes. 2580 * If set, means infoframe will be sent as soon as possible and then on 2581 * every frame during vblank. 2582 * If cleared, means the infoframe will be sent once as soon as possible. 2583 * 2584 * Possible status values returned are: 2585 * NV_OK 2586 * NV_ERR_INVALID_ARGUMENT 2587 * NV_ERR_NOT_SUPPORTED 2588 */ 2589 #define NV0073_CTRL_CMD_DP_GET_GENERIC_INFOFRAME (0x73137eU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_GET_GENERIC_INFOFRAME_PARAMS_MESSAGE_ID" */ 2590 2591 #define NV0073_CTRL_DP_GENERIC_INFOFRAME_MAX_PACKET_SIZE 36U 2592 2593 #define NV0073_CTRL_DP_GET_GENERIC_INFOFRAME_PARAMS_MESSAGE_ID (0x7EU) 2594 2595 typedef struct NV0073_CTRL_DP_GET_GENERIC_INFOFRAME_PARAMS { 2596 NvU32 subDeviceInstance; 2597 NvU32 displayId; 2598 NvU32 infoframeIndex; 2599 NvU8 packet[NV0073_CTRL_DP_GENERIC_INFOFRAME_MAX_PACKET_SIZE]; 2600 NvBool bTransmitControl; 2601 } NV0073_CTRL_DP_GET_GENERIC_INFOFRAME_PARAMS; 2602 2603 2604 #define NV0073_CTRL_DP_GET_GENERIC_INFOFRAME_CAPTURE_MODE 0:0 2605 #define NV0073_CTRL_DP_GET_GENERIC_INFOFRAME_CAPTURE_MODE_INFOFRAME0 (0x0000000U) 2606 #define NV0073_CTRL_DP_GET_GENERIC_INFOFRAME_CAPTURE_MODE_INFOFRAME1 (0x0000001U) 2607 2608 2609 /* 2610 * NV0073_CTRL_CMD_DP_GET_MSA_ATTRIBUTES 2611 * 2612 * This command is used to capture the various data attributes sent in the MSA for DP protocol. 2613 * Refer table 2-94 'MSA Data Fields' in DP1.4a spec document for MSA data field description. 2614 * 2615 * displayID (in) 2616 * This parameter specifies the displayID for the display resource to configure. 2617 * subDeviceInstance (in) 2618 * This parameter specifies the subdevice instance within the NV04_DISPLAY_COMMON 2619 * parent device to which the operation should be directed. 2620 * mvid, nvid (out) 2621 * Video timestamp used by DP sink for regenerating pixel clock. 2622 * misc0, misc1 (out) 2623 * Miscellaneous MSA attributes. 2624 * hTotal, vTotal (out) 2625 * Htotal measured in pixel count and vtotal measured in line count. 2626 * hActiveStart, vActiveStart (out) 2627 * Active start measured from start of leading edge of the sync pulse. 2628 * hActiveWidth, vActiveWidth (out) 2629 * Active video width and height. 2630 * hSyncWidth, vSyncWidth (out) 2631 * Width of sync pulse. 2632 * hSyncPolarity, vSyncPolarity (out) 2633 * Polarity of sync pulse. 2634 * 2635 * Possible status values returned are: 2636 * NV_OK 2637 * NV_ERR_INVALID_ARGUMENT 2638 * NV_ERR_NOT_SUPPORTED 2639 */ 2640 #define NV0073_CTRL_CMD_DP_GET_MSA_ATTRIBUTES (0x73137fU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_GET_MSA_ATTRIBUTES_PARAMS_MESSAGE_ID" */ 2641 2642 #define NV0073_CTRL_DP_MSA_MAX_DATA_SIZE 7U 2643 2644 #define NV0073_CTRL_DP_GET_MSA_ATTRIBUTES_PARAMS_MESSAGE_ID (0x7FU) 2645 2646 typedef struct NV0073_CTRL_DP_GET_MSA_ATTRIBUTES_PARAMS { 2647 NvU32 subDeviceInstance; 2648 NvU32 displayId; 2649 NvU32 mvid; 2650 NvU32 nvid; 2651 NvU8 misc0; 2652 NvU8 misc1; 2653 NvU16 hTotal; 2654 NvU16 vTotal; 2655 NvU16 hActiveStart; 2656 NvU16 vActiveStart; 2657 NvU16 hActiveWidth; 2658 NvU16 vActiveWidth; 2659 NvU16 hSyncWidth; 2660 NvU16 vSyncWidth; 2661 NvBool hSyncPolarity; 2662 NvBool vSyncPolarity; 2663 } NV0073_CTRL_DP_GET_MSA_ATTRIBUTES_PARAMS; 2664 2665 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_MVID 23:0 2666 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_NVID 23:0 2667 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_MISC0 7:0 2668 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_MISC1 15:8 2669 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_HTOTAL 15:0 2670 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_VTOTAL 31:16 2671 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_HACTIVE_START 15:0 2672 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_VACTIVE_START 31:16 2673 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_HACTIVE_WIDTH 15:0 2674 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_VACTIVE_WIDTH 31:16 2675 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_HSYNC_WIDTH 14:0 2676 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_HSYNC_POLARITY 15:15 2677 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_VSYNC_WIDTH 30:16 2678 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_VSYNC_POLARITY 31:31 2679 2680 /* 2681 * NV0073_CTRL_CMD_DP_AUXCH_OD_CTRL 2682 * 2683 * This command is used to query OD capability and status as well as 2684 * control OD functionality of eDP LCD panels. 2685 * 2686 * subDeviceInstance [in] 2687 * This parameter specifies the subdevice instance within the 2688 * NV04_DISPLAY_COMMON parent device to which the operation should be 2689 * directed. This parameter must specify a value between zero and the 2690 * total number of subdevices within the parent device. This parameter 2691 * should be set to zero for default behavior. 2692 * displayId [in] 2693 * This parameter specifies the ID of the DP display which owns 2694 * the Main Link to be adjusted. The display ID must a DP display 2695 * as determined with the NV0073_CTRL_CMD_SPECIFIC_GET_TYPE command. 2696 * If more than one displayId bit is set or the displayId is not a DP, 2697 * this call will return NV_ERR_INVALID_ARGUMENT. 2698 * cmd [in] 2699 * This parameter is an input to this command. The cmd parameter tells 2700 * whether we have to get the value of a specific field or set the 2701 * value in case of a writeable field. 2702 * control [in] 2703 * This parameter is input by the user. It is used by the user to decide the control 2704 * value to be written to change the Sink OD mode. The command to write is 2705 * the NV0073_CTRL_CMD_DP_AUXCH_OD_CTL_SET command. 2706 * bOdCapable [out] 2707 * This parameter reflects the OD capability of the Sink which can be 2708 * fetched by using the NV0073_CTRL_CMD_DP_AUXCH_OD_CAPABLE_QUERY command. 2709 * bOdControlCapable [out] 2710 * This parameter reflects the OD control capability of the Sink which can be 2711 * fetched by using the NV0073_CTRL_CMD_DP_AUXCH_OD_CTL_CAPABLE_QUERY command. 2712 * bOdStatus [out] 2713 * This parameter reflects the Sink OD status which can be 2714 * fetched by using the NV0073_CTRL_CMD_DP_AUXCH_OD_STATUS_QUERY command. 2715 * 2716 * Possible status values returned are: 2717 * NV_OK 2718 * NV_ERR_INVALID_ARGUMENT 2719 * NV_ERR_NOT_SUPPORTED 2720 */ 2721 #define NV0073_CTRL_CMD_DP_AUXCH_OD_CTRL (0x731380U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_AUXCH_OD_CTRL_PARAMS_MESSAGE_ID" */ 2722 2723 #define NV0073_CTRL_CMD_DP_AUXCH_OD_CTRL_PARAMS_MESSAGE_ID (0x80U) 2724 2725 typedef struct NV0073_CTRL_CMD_DP_AUXCH_OD_CTRL_PARAMS { 2726 NvU32 subDeviceInstance; 2727 NvU32 displayId; 2728 NvU8 control; 2729 NvU8 cmd; 2730 NvBool bOdCapable; 2731 NvBool bOdControlCapable; 2732 NvBool bOdStatus; 2733 } NV0073_CTRL_CMD_DP_AUXCH_OD_CTRL_PARAMS; 2734 2735 /* valid commands */ 2736 #define NV0073_CTRL_CMD_DP_AUXCHQUERY_OD_CAPABLE 0x00000000 2737 #define NV0073_CTRL_CMD_DP_AUXCHQUERY_OD_CTL_CAPABLE 0x00000001 2738 #define NV0073_CTRL_CMD_DP_AUXCHQUERY_OD_STATUS 0x00000002 2739 #define NV0073_CTRL_CMD_DP_AUXCH_OD_CTL_SET 0x00000003 2740 2741 /* valid state values */ 2742 #define NV0073_CTRL_CMD_DP_AUXCH_OD_CTL_SET_AUTONOMOUS 0x00000000 2743 #define NV0073_CTRL_CMD_DP_AUXCH_OD_CTL_SET_DISABLE_OD 0x00000002 2744 #define NV0073_CTRL_CMD_DP_AUXCH_OD_CTL_SET_ENABLE_OD 0x00000003 2745 2746 /* 2747 * NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES 2748 * 2749 * This command returns the following info 2750 * 2751 * subDeviceInstance 2752 * This parameter specifies the subdevice instance within the 2753 * NV04_DISPLAY_COMMON parent device to which the operation should be 2754 * directed. This parameter must specify a value between zero and the 2755 * total number of subdevices within the parent device. This parameter 2756 * should be set to zero for default behavior. 2757 * displayId 2758 * should be for DP only 2759 * bEnableMSA 2760 * To enable or disable MSA 2761 * bStereoPhaseInverse 2762 * To enable or disable Stereo Phase Inverse value 2763 * bCacheMsaOverrideForNextModeset 2764 * Cache the values and don't apply them until next modeset 2765 * featureMask 2766 * Enable/Disable mask of individual MSA property 2767 * featureValues 2768 * MSA property value to write 2769 * bDebugValues 2770 * To inform whether actual MSA values need to be returned 2771 * pFeatureDebugValues 2772 * It will actual MSA property value being written on HW. 2773 * If its NULL then no error but return nothing 2774 * 2775 * Possible status values returned are: 2776 * NV_OK 2777 * NV_ERR_INVALID_ARGUMENT 2778 * NV_ERR_NOT_SUPPORTED 2779 * NV_ERR_TIMEOUT 2780 * 2781 */ 2782 #define NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_V2 (0x731381U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_V2_PARAMS_MESSAGE_ID" */ 2783 2784 #define NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_V2_PARAMS_MESSAGE_ID (0x81U) 2785 2786 typedef struct NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_V2_PARAMS { 2787 NvU32 subDeviceInstance; 2788 NvU32 displayId; 2789 NvBool bEnableMSA; 2790 NvBool bStereoPhaseInverse; 2791 NvBool bCacheMsaOverrideForNextModeset; 2792 NV0073_CTRL_DP_MSA_PROPERTIES_MASK featureMask; 2793 NV0073_CTRL_DP_MSA_PROPERTIES_VALUES featureValues; 2794 NvBool bDebugValues; 2795 NV0073_CTRL_DP_MSA_PROPERTIES_VALUES featureDebugValues; 2796 } NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_V2_PARAMS; 2797 2798 /* 2799 * NV0073_CTRL_CMD_DP_EXECUTE_OVERDRIVE_POLICY 2800 * 2801 * This command is used to execute RM Over Drive policy and decide if TCON Overdrive needs to be enabled 2802 * or not based on the panel Overdrive grade determined using the panel manufId and prodId. 2803 * 2804 * subDeviceInstance [in] 2805 * This parameter specifies the subdevice instance within the 2806 * NV04_DISPLAY_COMMON parent device to which the operation should be 2807 * directed. This parameter must specify a value between zero and the 2808 * total number of subdevices within the parent device. This parameter 2809 * should be set to zero for default behavior. 2810 * displayId [in] 2811 * This parameter specifies the ID of the eDP display which owns 2812 * the Main Link to be adjusted. The display ID must a eDP display 2813 * as determined with the NV0073_CTRL_CMD_SPECIFIC_GET_TYPE command. 2814 * If more than one displayId bit is set or the displayId is not an eDP, 2815 * this call will return NV_ERR_INVALID_ARGUMENT. 2816 * manfId [in] 2817 * This parameter is an input to this command which tells the 2818 * Internal panel's manufacturer ID. 2819 * prodId [in] 2820 * This parameter is an input to this command which tells the 2821 * Internal panel's product ID. 2822 * 2823 * Possible status values returned are: 2824 * NV_OK 2825 * NV_ERR_INVALID_ARGUMENT 2826 * NV_ERR_NOT_SUPPORTED 2827 */ 2828 #define NV0073_CTRL_CMD_DP_EXECUTE_OVERDRIVE_POLICY (0x731382U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_EXECUTE_OVERDRIVE_POLICY_PARAMS_MESSAGE_ID" */ 2829 2830 #define NV0073_CTRL_DP_EXECUTE_OVERDRIVE_POLICY_PARAMS_MESSAGE_ID (0x82U) 2831 2832 typedef struct NV0073_CTRL_DP_EXECUTE_OVERDRIVE_POLICY_PARAMS { 2833 NvU32 subDeviceInstance; 2834 NvU32 displayId; 2835 NvU16 manfId; 2836 NvU16 prodId; 2837 } NV0073_CTRL_DP_EXECUTE_OVERDRIVE_POLICY_PARAMS; 2838 2839 2840 /* _ctrl0073dp_h_ */ 2841