| /netbsd/sys/dev/ic/ |
| H A D | mcp23xxxgpio.c | 65 mcpgpio_regaddr(struct mcpgpio_softc *sc, uint8_t bank, uint8_t reg) in mcpgpio_regaddr()
98 mcpgpio_bankname(struct mcpgpio_softc *sc, uint8_t bank) in mcpgpio_bankname()
132 uint8_t bank, uint8_t reg, uint8_t *valp) in mcpgpio__read()
152 uint8_t bank, uint8_t reg, uint8_t val) in mcpgpio__write()
182 const uint8_t bank = PIN_BANK(pin); in mcpgpio_gpio_pin_read() local
209 const uint8_t bank = PIN_BANK(pin); in mcpgpio_gpio_pin_write() local
239 const uint8_t bank = PIN_BANK(pin); in mcpgpio_gpio_pin_ctl() local
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| H A D | mcp23xxxgpioreg.h | 104 #define REGADDR_BANK1(bank, reg) (((bank) << 4) | (reg)) argument
107 #define REGADDR_BANK0(bank, reg) (((reg) << 1) | (bank)) argument
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| H A D | ug.c | 349 uint8_t bank, sens, rv; in ug_read() local
638 ug2_read(struct ug_softc *sc, uint8_t bank, uint8_t offset, uint8_t count, in ug2_read()
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| /netbsd/sys/arch/arm/samsung/ |
| H A D | exynos_gpio.c | 241 #define GPIO_WRITE(bank, reg, val) \ argument
245 #define GPIO_READ(bank, reg) \ argument
254 struct exynos_gpio_bank *bank = gba->gba_gc->gp_cookie; in exynos_gpio_cfprint() local
268 struct exynos_gpio_bank * const bank = cookie; in exynos_gpio_pin_read() local
281 struct exynos_gpio_bank * const bank = cookie; in exynos_gpio_pin_write() local
297 struct exynos_gpio_bank * const bank = cookie; in exynos_gpio_pin_ctl() local
323 void exynos_gpio_pin_ctl_write(const struct exynos_gpio_bank *bank, in exynos_gpio_pin_ctl_write()
375 struct exynos_gpio_bank *bank = in exynos_gpio_bank_config() local
423 struct exynos_gpio_bank *bank; in exynos_gpio_bank_lookup() local
456 struct exynos_gpio_bank *bank = NULL; in exynos_gpio_fdt_acquire() local
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| H A D | exynos_pinctrl.c | 166 struct exynos_gpio_bank *bank; in exynos_do_config() local
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| /netbsd/sys/arch/arm/nvidia/ |
| H A D | tegra_gpio.c | 139 #define GPIO_WRITE(bank, reg, val) \ argument
143 #define GPIO_READ(bank, reg) \ argument
202 struct tegra_gpio_bank *bank = &sc->sc_banks[bankno]; in tegra_gpio_attach_bank() local
240 struct tegra_gpio_bank *bank = gba->gba_gc->gp_cookie; in tegra_gpio_cfprint() local
254 struct tegra_gpio_bank *bank = priv; in tegra_gpio_pin_read() local
264 struct tegra_gpio_bank *bank = priv; in tegra_gpio_pin_write() local
275 struct tegra_gpio_bank *bank = priv; in tegra_gpio_pin_ctl() local
298 const u_int bank = be32toh(gpio[1]) >> 3; in tegra_gpio_fdt_acquire() local
389 struct tegra_gpio_bank bank; in tegra_gpio_acquire() local
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| /netbsd/sys/arch/arm/rockchip/ |
| H A D | rk3328_iomux.c | 145 rk3328_iomux_calc_iomux_reg(struct rk3328_iomux_softc *sc, u_int bank, u_int pin, bus_size_t *reg, … in rk3328_iomux_calc_iomux_reg()
164 rk3328_iomux_set_bias(struct rk3328_iomux_softc *sc, u_int bank, u_int idx, u_int bias) in rk3328_iomux_set_bias()
172 rk3328_iomux_set_drive_strength(struct rk3328_iomux_softc *sc, u_int bank, u_int idx, u_int drv) in rk3328_iomux_set_drive_strength()
180 rk3328_iomux_set_mux(struct rk3328_iomux_softc *sc, u_int bank, u_int idx, u_int mux) in rk3328_iomux_set_mux()
191 rk3328_iomux_config(struct rk3328_iomux_softc *sc, const int phandle, u_int bank, u_int idx, u_int … in rk3328_iomux_config()
256 const u_int bank = be32toh(pins[0]); in rk3328_iomux_pinctrl_set_config() local
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| H A D | rk3588_iomux.c | 70 #define PIN(bank, idx) (((bank) * NPINPERBANK) + (idx)) argument
844 int bank = pin / 32; in rk3588_iomux_pinname() local
942 u_int bank, u_int idx, u_int mux) in rk3588_iomux_config()
981 const u_int bank = be32toh(pins[0]); in rk3588_iomux_pinctrl_set_config() local
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| H A D | rk3399_iomux.c | 212 rk3399_iomux_set_bias(struct rk3399_iomux_softc *sc, u_int bank, u_int idx, int flags) in rk3399_iomux_set_bias()
266 rk3399_iomux_set_drive_strength(struct rk3399_iomux_softc *sc, u_int bank, u_int idx, u_int val) in rk3399_iomux_set_drive_strength()
356 rk3399_iomux_set_mux(struct rk3399_iomux_softc *sc, u_int bank, u_int idx, u_int mux) in rk3399_iomux_set_mux()
383 rk3399_iomux_config(struct rk3399_iomux_softc *sc, const int phandle, u_int bank, u_int idx, u_int … in rk3399_iomux_config()
424 const u_int bank = be32toh(pins[0]); in rk3399_iomux_pinctrl_set_config() local
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| H A D | rk3288_iomux.c | 126 rk3288_iomux_get_reg(struct rk3288_iomux_softc *sc, u_int bank, u_int idx, in rk3288_iomux_get_reg()
294 const u_int bank = be32toh(pins[0]); in rk3288_iomux_pinctrl_set_config() local
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| /netbsd/sys/arch/mips/cavium/ |
| H A D | octeon_intr.c | 261 int bank; in octeon_intr_init() local
370 const int bank = irq / 64; in octeon_intr_establish() local
433 const int bank = irq / 64; in octeon_intr_disestablish() local
482 int bank; in octeon_iointr() local
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| /netbsd/sys/dev/spi/ |
| H A D | mcp23xxxgpio_spi.c | 138 mcpgpio_spi_read(struct mcpgpio_softc *sc, unsigned int bank, in mcpgpio_spi_read()
153 mcpgpio_spi_write(struct mcpgpio_softc *sc, unsigned int bank, in mcpgpio_spi_write()
191 int bank, nchips, error, ha; in mcpgpio_spi_attach() local
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| /netbsd/sys/external/bsd/drm2/dist/drm/i915/gt/ |
| H A D | intel_gt_irq.c | 46 const unsigned int bank, const unsigned int bit) in gen11_gt_engine_identity()
130 gen11_gt_bank_handler(struct intel_gt *gt, const unsigned int bank) in gen11_gt_bank_handler()
151 unsigned int bank; in gen11_gt_irq_handler() local
164 const unsigned int bank, const unsigned int bit) in gen11_gt_reset_one_iir()
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| /netbsd/sys/arch/hpc/stand/hpcboot/ |
| H A D | memory.h | 55 struct bank { struct
71 // Pagesize, D-RAM bank argument
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| /netbsd/sys/dev/i2c/ |
| H A D | mcp23xxxgpio_i2c.c | 105 mcpgpio_i2c_read(struct mcpgpio_softc *sc, unsigned int bank, in mcpgpio_i2c_read()
118 mcpgpio_i2c_write(struct mcpgpio_softc *sc, unsigned int bank, in mcpgpio_i2c_write()
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| /netbsd/sys/external/gpl2/dts/dist/include/dt-bindings/gpio/ |
| H A D | uniphier-gpio.h | 15 #define UNIPHIER_GPIO_PORT(bank, line) \ argument
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| /netbsd/sys/arch/arm/amlogic/ |
| H A D | gxlphy.c | 104 gxl_readreg(struct mii_softc *sc, u_int bank, u_int reg) in gxl_readreg()
120 gxl_writereg(struct mii_softc *sc, u_int bank, u_int reg, uint16_t val) in gxl_writereg()
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| /netbsd/sys/arch/arm/broadcom/ |
| H A D | bcm2835_gpio.c | 267 int bank; in bcmgpio_attach() local
452 int bank, int pin, int flags) in bmcgpio_intr_enable()
534 int bank = eint->eint_bank; in bcmgpio_intr_disable() local
587 const u_int bank = be32toh(specifier[0]) / 32; in bcmgpio_fdt_intr_establish() local
631 int bank = pin / 32; in bcmgpio_gpio_intr_establish() local
697 const u_int bank = be32toh(specifier[0]) / 32; in bcmgpio_fdt_intrstr() local
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| /netbsd/sys/dev/pci/qat/ |
| H A D | qat_c2xxx.c | 148 qat_c2xxx_init_etr_intr(struct qat_softc *sc, int bank) in qat_c2xxx_init_etr_intr()
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| /netbsd/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/gr/ |
| H A D | nouveau_nvkm_engine_gr_gf117.c | 136 u8 bank[GPC_MAX] = {}, gpc, i, j; in gf117_gr_init_zcull() local
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| H A D | nouveau_nvkm_engine_gr_tu102.c | 64 u8 bank[GPC_MAX] = {}, gpc, i, j; in tu102_gr_init_zcull() local
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| /netbsd/sys/arch/arm/sunxi/ |
| H A D | sunxi_gpio.c | 66 #define SUNXI_GPIO_INT_CFG(bank, eint) (0x200 + (0x20 * (bank)) + (0x4 * ((eint) / 8))) argument
73 #define SUNXI_GPIO_INT_CTL(bank) (0x210 + 0x20 * (bank)) argument
74 #define SUNXI_GPIO_INT_STATUS(bank) (0x214 + 0x20 * (bank)) argument
75 #define SUNXI_GPIO_INT_DEBOUNCE(bank) (0x218 + 0x20 * (bank)) argument
78 #define SUNXI_GPIO_GRP_CONFIG(bank) (0x300 + 0x4 * (bank)) argument
443 u_int bank; in sunxi_gpio_intr() local
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| /netbsd/games/trek/ |
| H A D | phaser.c | 108 struct banks bank[NBANKS]; in phaser() local
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| /netbsd/sys/arch/arm/footbridge/isa/ |
| H A D | dsrtc.c | 90 ds1687_bank_select(struct dsrtc_softc *sc, int bank) in ds1687_bank_select()
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| /netbsd/sys/arch/amiga/dev/ |
| H A D | gtscreg.h | 56 vu_short bank; member
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