| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/net/wireless/quantenna/qtnfmac/pcie/ |
| H A D | pearl_pcie_regs.h | 8 #define PCIE_HDP_CTRL(base) ((base) + 0x2c00) argument
9 #define PCIE_HDP_AXI_CTRL(base) ((base) + 0x2c04) argument
21 #define PCIE_HDP_INT_EN(base) ((base) + 0x2c3c) argument
35 #define PCIE_HDP_CFG0(base) ((base) + 0x2c80) argument
36 #define PCIE_HDP_CFG1(base) ((base) + 0x2c84) argument
37 #define PCIE_HDP_CFG2(base) ((base) + 0x2c88) argument
38 #define PCIE_HDP_CFG3(base) ((base) + 0x2c8c) argument
39 #define PCIE_HDP_CFG4(base) ((base) + 0x2c90) argument
47 #define PCIE_INT(base) ((base) + 0x2cb0) argument
51 #define PCIE_PRI_CFG(base) ((base) + 0x2cc0) argument
[all …]
|
| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/net/wireless/quantenna/qtnfmac/pcie/ |
| H A D | pearl_pcie_regs.h | 8 #define PCIE_HDP_CTRL(base) ((base) + 0x2c00) argument
9 #define PCIE_HDP_AXI_CTRL(base) ((base) + 0x2c04) argument
21 #define PCIE_HDP_INT_EN(base) ((base) + 0x2c3c) argument
35 #define PCIE_HDP_CFG0(base) ((base) + 0x2c80) argument
36 #define PCIE_HDP_CFG1(base) ((base) + 0x2c84) argument
37 #define PCIE_HDP_CFG2(base) ((base) + 0x2c88) argument
38 #define PCIE_HDP_CFG3(base) ((base) + 0x2c8c) argument
39 #define PCIE_HDP_CFG4(base) ((base) + 0x2c90) argument
47 #define PCIE_INT(base) ((base) + 0x2cb0) argument
51 #define PCIE_PRI_CFG(base) ((base) + 0x2cc0) argument
[all …]
|
| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/net/wireless/quantenna/qtnfmac/pcie/ |
| H A D | pearl_pcie_regs.h | 8 #define PCIE_HDP_CTRL(base) ((base) + 0x2c00) argument
9 #define PCIE_HDP_AXI_CTRL(base) ((base) + 0x2c04) argument
21 #define PCIE_HDP_INT_EN(base) ((base) + 0x2c3c) argument
35 #define PCIE_HDP_CFG0(base) ((base) + 0x2c80) argument
36 #define PCIE_HDP_CFG1(base) ((base) + 0x2c84) argument
37 #define PCIE_HDP_CFG2(base) ((base) + 0x2c88) argument
38 #define PCIE_HDP_CFG3(base) ((base) + 0x2c8c) argument
39 #define PCIE_HDP_CFG4(base) ((base) + 0x2c90) argument
47 #define PCIE_INT(base) ((base) + 0x2cb0) argument
51 #define PCIE_PRI_CFG(base) ((base) + 0x2cc0) argument
[all …]
|
| /dports/security/vuls/vuls-0.13.7/scan/ |
| H A D | base.go | 32 type base struct { struct
33 ServerInfo config.ServerInfo
34 Distro config.Distro
35 Platform models.Platform
36 osPackages
40 log *logrus.Entry
41 errs []error
42 warns []error
300 func (l *base) detectPlatform() {
341 func (l *base) detectIPSs() {
[all …]
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/board/micronas/vct/vcth2/ |
| H A D | reg_ebi.h | 16 #define EBI_CPU_IO_ACCS(base) ((base) + EBI_CPU_IO_ACCS_OFFS) argument
24 #define EBI_CTRL(base) ((base) + EBI_CTRL_OFFS) argument
26 #define EBI_IRQ_MASK(base) ((base) + EBI_IRQ_MASK_OFFS) argument
28 #define EBI_IRQ_MASK2(base) ((base) + EBI_IRQ_MASK2_OFFS) argument
40 #define EBI_STATUS(base) ((base) + EBI_STATUS_OFFS) argument
48 #define EBI_CRC_GEN(base) ((base) + EBI_CRC_GEN_OFFS) argument
50 #define EBI_EXT_ADDR(base) ((base) + EBI_EXT_ADDR_OFFS) argument
60 #define EBI_ECC0(base) ((base) + EBI_ECC0_OFFS) argument
62 #define EBI_ECC1(base) ((base) + EBI_ECC1_OFFS) argument
64 #define EBI_ECC2(base) ((base) + EBI_ECC2_OFFS) argument
[all …]
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/board/micronas/vct/vctv/ |
| H A D | reg_ebi.h | 16 #define EBI_CPU_IO_ACCS(base) ((base) + EBI_CPU_IO_ACCS_OFFS) argument
24 #define EBI_CTRL(base) ((base) + EBI_CTRL_OFFS) argument
26 #define EBI_IRQ_MASK(base) ((base) + EBI_IRQ_MASK_OFFS) argument
28 #define EBI_IRQ_MASK2(base) ((base) + EBI_IRQ_MASK2_OFFS) argument
40 #define EBI_STATUS(base) ((base) + EBI_STATUS_OFFS) argument
48 #define EBI_CRC_GEN(base) ((base) + EBI_CRC_GEN_OFFS) argument
50 #define EBI_EXT_ADDR(base) ((base) + EBI_EXT_ADDR_OFFS) argument
60 #define EBI_ECC0(base) ((base) + EBI_ECC0_OFFS) argument
62 #define EBI_ECC1(base) ((base) + EBI_ECC1_OFFS) argument
64 #define EBI_ECC2(base) ((base) + EBI_ECC2_OFFS) argument
[all …]
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/micronas/vct/vcth2/ |
| H A D | reg_ebi.h | 16 #define EBI_CPU_IO_ACCS(base) ((base) + EBI_CPU_IO_ACCS_OFFS) argument
24 #define EBI_CTRL(base) ((base) + EBI_CTRL_OFFS) argument
26 #define EBI_IRQ_MASK(base) ((base) + EBI_IRQ_MASK_OFFS) argument
28 #define EBI_IRQ_MASK2(base) ((base) + EBI_IRQ_MASK2_OFFS) argument
40 #define EBI_STATUS(base) ((base) + EBI_STATUS_OFFS) argument
48 #define EBI_CRC_GEN(base) ((base) + EBI_CRC_GEN_OFFS) argument
50 #define EBI_EXT_ADDR(base) ((base) + EBI_EXT_ADDR_OFFS) argument
60 #define EBI_ECC0(base) ((base) + EBI_ECC0_OFFS) argument
62 #define EBI_ECC1(base) ((base) + EBI_ECC1_OFFS) argument
64 #define EBI_ECC2(base) ((base) + EBI_ECC2_OFFS) argument
[all …]
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/board/micronas/vct/vctv/ |
| H A D | reg_ebi.h | 16 #define EBI_CPU_IO_ACCS(base) ((base) + EBI_CPU_IO_ACCS_OFFS) argument
24 #define EBI_CTRL(base) ((base) + EBI_CTRL_OFFS) argument
26 #define EBI_IRQ_MASK(base) ((base) + EBI_IRQ_MASK_OFFS) argument
28 #define EBI_IRQ_MASK2(base) ((base) + EBI_IRQ_MASK2_OFFS) argument
40 #define EBI_STATUS(base) ((base) + EBI_STATUS_OFFS) argument
48 #define EBI_CRC_GEN(base) ((base) + EBI_CRC_GEN_OFFS) argument
50 #define EBI_EXT_ADDR(base) ((base) + EBI_EXT_ADDR_OFFS) argument
60 #define EBI_ECC0(base) ((base) + EBI_ECC0_OFFS) argument
62 #define EBI_ECC1(base) ((base) + EBI_ECC1_OFFS) argument
64 #define EBI_ECC2(base) ((base) + EBI_ECC2_OFFS) argument
[all …]
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/micronas/vct/vctv/ |
| H A D | reg_ebi.h | 16 #define EBI_CPU_IO_ACCS(base) ((base) + EBI_CPU_IO_ACCS_OFFS) argument
24 #define EBI_CTRL(base) ((base) + EBI_CTRL_OFFS) argument
26 #define EBI_IRQ_MASK(base) ((base) + EBI_IRQ_MASK_OFFS) argument
28 #define EBI_IRQ_MASK2(base) ((base) + EBI_IRQ_MASK2_OFFS) argument
40 #define EBI_STATUS(base) ((base) + EBI_STATUS_OFFS) argument
48 #define EBI_CRC_GEN(base) ((base) + EBI_CRC_GEN_OFFS) argument
50 #define EBI_EXT_ADDR(base) ((base) + EBI_EXT_ADDR_OFFS) argument
60 #define EBI_ECC0(base) ((base) + EBI_ECC0_OFFS) argument
62 #define EBI_ECC1(base) ((base) + EBI_ECC1_OFFS) argument
64 #define EBI_ECC2(base) ((base) + EBI_ECC2_OFFS) argument
[all …]
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/board/micronas/vct/vcth2/ |
| H A D | reg_ebi.h | 16 #define EBI_CPU_IO_ACCS(base) ((base) + EBI_CPU_IO_ACCS_OFFS) argument
24 #define EBI_CTRL(base) ((base) + EBI_CTRL_OFFS) argument
26 #define EBI_IRQ_MASK(base) ((base) + EBI_IRQ_MASK_OFFS) argument
28 #define EBI_IRQ_MASK2(base) ((base) + EBI_IRQ_MASK2_OFFS) argument
40 #define EBI_STATUS(base) ((base) + EBI_STATUS_OFFS) argument
48 #define EBI_CRC_GEN(base) ((base) + EBI_CRC_GEN_OFFS) argument
50 #define EBI_EXT_ADDR(base) ((base) + EBI_EXT_ADDR_OFFS) argument
60 #define EBI_ECC0(base) ((base) + EBI_ECC0_OFFS) argument
62 #define EBI_ECC1(base) ((base) + EBI_ECC1_OFFS) argument
64 #define EBI_ECC2(base) ((base) + EBI_ECC2_OFFS) argument
[all …]
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/board/micronas/vct/vctv/ |
| H A D | reg_ebi.h | 16 #define EBI_CPU_IO_ACCS(base) ((base) + EBI_CPU_IO_ACCS_OFFS) argument
24 #define EBI_CTRL(base) ((base) + EBI_CTRL_OFFS) argument
26 #define EBI_IRQ_MASK(base) ((base) + EBI_IRQ_MASK_OFFS) argument
28 #define EBI_IRQ_MASK2(base) ((base) + EBI_IRQ_MASK2_OFFS) argument
40 #define EBI_STATUS(base) ((base) + EBI_STATUS_OFFS) argument
48 #define EBI_CRC_GEN(base) ((base) + EBI_CRC_GEN_OFFS) argument
50 #define EBI_EXT_ADDR(base) ((base) + EBI_EXT_ADDR_OFFS) argument
60 #define EBI_ECC0(base) ((base) + EBI_ECC0_OFFS) argument
62 #define EBI_ECC1(base) ((base) + EBI_ECC1_OFFS) argument
64 #define EBI_ECC2(base) ((base) + EBI_ECC2_OFFS) argument
[all …]
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/board/micronas/vct/vcth2/ |
| H A D | reg_ebi.h | 16 #define EBI_CPU_IO_ACCS(base) ((base) + EBI_CPU_IO_ACCS_OFFS) argument
24 #define EBI_CTRL(base) ((base) + EBI_CTRL_OFFS) argument
26 #define EBI_IRQ_MASK(base) ((base) + EBI_IRQ_MASK_OFFS) argument
28 #define EBI_IRQ_MASK2(base) ((base) + EBI_IRQ_MASK2_OFFS) argument
40 #define EBI_STATUS(base) ((base) + EBI_STATUS_OFFS) argument
48 #define EBI_CRC_GEN(base) ((base) + EBI_CRC_GEN_OFFS) argument
50 #define EBI_EXT_ADDR(base) ((base) + EBI_EXT_ADDR_OFFS) argument
60 #define EBI_ECC0(base) ((base) + EBI_ECC0_OFFS) argument
62 #define EBI_ECC1(base) ((base) + EBI_ECC1_OFFS) argument
64 #define EBI_ECC2(base) ((base) + EBI_ECC2_OFFS) argument
[all …]
|
| /dports/sysutils/u-boot-utilite/u-boot-2015.07/board/micronas/vct/vcth2/ |
| H A D | reg_ebi.h | 17 #define EBI_CPU_IO_ACCS(base) ((base) + EBI_CPU_IO_ACCS_OFFS) argument
25 #define EBI_CTRL(base) ((base) + EBI_CTRL_OFFS) argument
27 #define EBI_IRQ_MASK(base) ((base) + EBI_IRQ_MASK_OFFS) argument
29 #define EBI_IRQ_MASK2(base) ((base) + EBI_IRQ_MASK2_OFFS) argument
41 #define EBI_STATUS(base) ((base) + EBI_STATUS_OFFS) argument
49 #define EBI_CRC_GEN(base) ((base) + EBI_CRC_GEN_OFFS) argument
51 #define EBI_EXT_ADDR(base) ((base) + EBI_EXT_ADDR_OFFS) argument
61 #define EBI_ECC0(base) ((base) + EBI_ECC0_OFFS) argument
63 #define EBI_ECC1(base) ((base) + EBI_ECC1_OFFS) argument
65 #define EBI_ECC2(base) ((base) + EBI_ECC2_OFFS) argument
[all …]
|
| /dports/sysutils/u-boot-utilite/u-boot-2015.07/board/micronas/vct/vctv/ |
| H A D | reg_ebi.h | 17 #define EBI_CPU_IO_ACCS(base) ((base) + EBI_CPU_IO_ACCS_OFFS) argument
25 #define EBI_CTRL(base) ((base) + EBI_CTRL_OFFS) argument
27 #define EBI_IRQ_MASK(base) ((base) + EBI_IRQ_MASK_OFFS) argument
29 #define EBI_IRQ_MASK2(base) ((base) + EBI_IRQ_MASK2_OFFS) argument
41 #define EBI_STATUS(base) ((base) + EBI_STATUS_OFFS) argument
49 #define EBI_CRC_GEN(base) ((base) + EBI_CRC_GEN_OFFS) argument
51 #define EBI_EXT_ADDR(base) ((base) + EBI_EXT_ADDR_OFFS) argument
61 #define EBI_ECC0(base) ((base) + EBI_ECC0_OFFS) argument
63 #define EBI_ECC1(base) ((base) + EBI_ECC1_OFFS) argument
65 #define EBI_ECC2(base) ((base) + EBI_ECC2_OFFS) argument
[all …]
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/board/micronas/vct/vctv/ |
| H A D | reg_ebi.h | 16 #define EBI_CPU_IO_ACCS(base) ((base) + EBI_CPU_IO_ACCS_OFFS) argument
24 #define EBI_CTRL(base) ((base) + EBI_CTRL_OFFS) argument
26 #define EBI_IRQ_MASK(base) ((base) + EBI_IRQ_MASK_OFFS) argument
28 #define EBI_IRQ_MASK2(base) ((base) + EBI_IRQ_MASK2_OFFS) argument
40 #define EBI_STATUS(base) ((base) + EBI_STATUS_OFFS) argument
48 #define EBI_CRC_GEN(base) ((base) + EBI_CRC_GEN_OFFS) argument
50 #define EBI_EXT_ADDR(base) ((base) + EBI_EXT_ADDR_OFFS) argument
60 #define EBI_ECC0(base) ((base) + EBI_ECC0_OFFS) argument
62 #define EBI_ECC1(base) ((base) + EBI_ECC1_OFFS) argument
64 #define EBI_ECC2(base) ((base) + EBI_ECC2_OFFS) argument
[all …]
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/board/micronas/vct/vcth2/ |
| H A D | reg_ebi.h | 16 #define EBI_CPU_IO_ACCS(base) ((base) + EBI_CPU_IO_ACCS_OFFS) argument
24 #define EBI_CTRL(base) ((base) + EBI_CTRL_OFFS) argument
26 #define EBI_IRQ_MASK(base) ((base) + EBI_IRQ_MASK_OFFS) argument
28 #define EBI_IRQ_MASK2(base) ((base) + EBI_IRQ_MASK2_OFFS) argument
40 #define EBI_STATUS(base) ((base) + EBI_STATUS_OFFS) argument
48 #define EBI_CRC_GEN(base) ((base) + EBI_CRC_GEN_OFFS) argument
50 #define EBI_EXT_ADDR(base) ((base) + EBI_EXT_ADDR_OFFS) argument
60 #define EBI_ECC0(base) ((base) + EBI_ECC0_OFFS) argument
62 #define EBI_ECC1(base) ((base) + EBI_ECC1_OFFS) argument
64 #define EBI_ECC2(base) ((base) + EBI_ECC2_OFFS) argument
[all …]
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/board/micronas/vct/vcth/ |
| H A D | reg_ebi.h | 16 #define EBI_CPU_IO_ACCS(base) ((base) + EBI_CPU_IO_ACCS_OFFS) argument
18 #define EBI_IO_ACCS_DATA(base) ((base) + EBI_IO_ACCS_DATA_OFFS) argument
20 #define EBI_CTRL(base) ((base) + EBI_CTRL_OFFS) argument
22 #define EBI_IRQ_MASK(base) ((base) + EBI_IRQ_MASK_OFFS) argument
24 #define EBI_TAG1_SYS_ID(base) ((base) + EBI_TAG1_SYS_ID_OFFS) argument
26 #define EBI_TAG2_SYS_ID(base) ((base) + EBI_TAG2_SYS_ID_OFFS) argument
34 #define EBI_STATUS(base) ((base) + EBI_STATUS_OFFS) argument
38 #define EBI_SIG_LEVEL(base) ((base) + EBI_SIG_LEVEL_OFFS) argument
42 #define EBI_EXT_ADDR(base) ((base) + EBI_EXT_ADDR_OFFS) argument
44 #define EBI_IRQ_STATUS(base) ((base) + EBI_IRQ_STATUS_OFFS) argument
[all …]
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/micronas/vct/vcth/ |
| H A D | reg_ebi.h | 16 #define EBI_CPU_IO_ACCS(base) ((base) + EBI_CPU_IO_ACCS_OFFS) argument
18 #define EBI_IO_ACCS_DATA(base) ((base) + EBI_IO_ACCS_DATA_OFFS) argument
20 #define EBI_CTRL(base) ((base) + EBI_CTRL_OFFS) argument
22 #define EBI_IRQ_MASK(base) ((base) + EBI_IRQ_MASK_OFFS) argument
24 #define EBI_TAG1_SYS_ID(base) ((base) + EBI_TAG1_SYS_ID_OFFS) argument
26 #define EBI_TAG2_SYS_ID(base) ((base) + EBI_TAG2_SYS_ID_OFFS) argument
34 #define EBI_STATUS(base) ((base) + EBI_STATUS_OFFS) argument
38 #define EBI_SIG_LEVEL(base) ((base) + EBI_SIG_LEVEL_OFFS) argument
42 #define EBI_EXT_ADDR(base) ((base) + EBI_EXT_ADDR_OFFS) argument
44 #define EBI_IRQ_STATUS(base) ((base) + EBI_IRQ_STATUS_OFFS) argument
[all …]
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/board/micronas/vct/vcth/ |
| H A D | reg_ebi.h | 16 #define EBI_CPU_IO_ACCS(base) ((base) + EBI_CPU_IO_ACCS_OFFS) argument
18 #define EBI_IO_ACCS_DATA(base) ((base) + EBI_IO_ACCS_DATA_OFFS) argument
20 #define EBI_CTRL(base) ((base) + EBI_CTRL_OFFS) argument
22 #define EBI_IRQ_MASK(base) ((base) + EBI_IRQ_MASK_OFFS) argument
24 #define EBI_TAG1_SYS_ID(base) ((base) + EBI_TAG1_SYS_ID_OFFS) argument
26 #define EBI_TAG2_SYS_ID(base) ((base) + EBI_TAG2_SYS_ID_OFFS) argument
34 #define EBI_STATUS(base) ((base) + EBI_STATUS_OFFS) argument
38 #define EBI_SIG_LEVEL(base) ((base) + EBI_SIG_LEVEL_OFFS) argument
42 #define EBI_EXT_ADDR(base) ((base) + EBI_EXT_ADDR_OFFS) argument
44 #define EBI_IRQ_STATUS(base) ((base) + EBI_IRQ_STATUS_OFFS) argument
[all …]
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/board/micronas/vct/vcth/ |
| H A D | reg_ebi.h | 16 #define EBI_CPU_IO_ACCS(base) ((base) + EBI_CPU_IO_ACCS_OFFS) argument
18 #define EBI_IO_ACCS_DATA(base) ((base) + EBI_IO_ACCS_DATA_OFFS) argument
20 #define EBI_CTRL(base) ((base) + EBI_CTRL_OFFS) argument
22 #define EBI_IRQ_MASK(base) ((base) + EBI_IRQ_MASK_OFFS) argument
24 #define EBI_TAG1_SYS_ID(base) ((base) + EBI_TAG1_SYS_ID_OFFS) argument
26 #define EBI_TAG2_SYS_ID(base) ((base) + EBI_TAG2_SYS_ID_OFFS) argument
34 #define EBI_STATUS(base) ((base) + EBI_STATUS_OFFS) argument
38 #define EBI_SIG_LEVEL(base) ((base) + EBI_SIG_LEVEL_OFFS) argument
42 #define EBI_EXT_ADDR(base) ((base) + EBI_EXT_ADDR_OFFS) argument
44 #define EBI_IRQ_STATUS(base) ((base) + EBI_IRQ_STATUS_OFFS) argument
[all …]
|
| /dports/sysutils/u-boot-utilite/u-boot-2015.07/board/micronas/vct/vcth/ |
| H A D | reg_ebi.h | 17 #define EBI_CPU_IO_ACCS(base) ((base) + EBI_CPU_IO_ACCS_OFFS) argument
19 #define EBI_IO_ACCS_DATA(base) ((base) + EBI_IO_ACCS_DATA_OFFS) argument
21 #define EBI_CTRL(base) ((base) + EBI_CTRL_OFFS) argument
23 #define EBI_IRQ_MASK(base) ((base) + EBI_IRQ_MASK_OFFS) argument
25 #define EBI_TAG1_SYS_ID(base) ((base) + EBI_TAG1_SYS_ID_OFFS) argument
27 #define EBI_TAG2_SYS_ID(base) ((base) + EBI_TAG2_SYS_ID_OFFS) argument
35 #define EBI_STATUS(base) ((base) + EBI_STATUS_OFFS) argument
39 #define EBI_SIG_LEVEL(base) ((base) + EBI_SIG_LEVEL_OFFS) argument
43 #define EBI_EXT_ADDR(base) ((base) + EBI_EXT_ADDR_OFFS) argument
45 #define EBI_IRQ_STATUS(base) ((base) + EBI_IRQ_STATUS_OFFS) argument
[all …]
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/board/micronas/vct/vcth/ |
| H A D | reg_ebi.h | 16 #define EBI_CPU_IO_ACCS(base) ((base) + EBI_CPU_IO_ACCS_OFFS) argument
18 #define EBI_IO_ACCS_DATA(base) ((base) + EBI_IO_ACCS_DATA_OFFS) argument
20 #define EBI_CTRL(base) ((base) + EBI_CTRL_OFFS) argument
22 #define EBI_IRQ_MASK(base) ((base) + EBI_IRQ_MASK_OFFS) argument
24 #define EBI_TAG1_SYS_ID(base) ((base) + EBI_TAG1_SYS_ID_OFFS) argument
26 #define EBI_TAG2_SYS_ID(base) ((base) + EBI_TAG2_SYS_ID_OFFS) argument
34 #define EBI_STATUS(base) ((base) + EBI_STATUS_OFFS) argument
38 #define EBI_SIG_LEVEL(base) ((base) + EBI_SIG_LEVEL_OFFS) argument
42 #define EBI_EXT_ADDR(base) ((base) + EBI_EXT_ADDR_OFFS) argument
44 #define EBI_IRQ_STATUS(base) ((base) + EBI_IRQ_STATUS_OFFS) argument
[all …]
|
| /dports/textproc/py-stemming/stemming-1.0.1/stemming/ |
| H A D | lovins.py | 12 def A(base): argument
16 def B(base): argument
20 def C(base): argument
24 def D(base): argument
28 def E(base): argument
32 def F(base): argument
36 def G(base): argument
40 def H(base): argument
45 def I(base): argument
50 def J(base): argument
[all …]
|
| /dports/textproc/py-whoosh/Whoosh-2.7.4/src/whoosh/lang/ |
| H A D | lovins.py | 12 def A(base): argument
17 def B(base): argument
22 def C(base): argument
27 def D(base): argument
32 def E(base): argument
37 def F(base): argument
42 def G(base): argument
47 def H(base): argument
53 def I(base): argument
59 def J(base): argument
[all …]
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/clang/test/CodeGen/arm-mve-intrinsics/ |
| H A D | load-store.c | 13 float16x8_t test_vld1q_f16(const float16_t *base) in test_vld1q_f16()
28 float32x4_t test_vld1q_f32(const float32_t *base) in test_vld1q_f32()
43 int8x16_t test_vld1q_s8(const int8_t *base) in test_vld1q_s8()
58 int16x8_t test_vld1q_s16(const int16_t *base) in test_vld1q_s16()
73 int32x4_t test_vld1q_s32(const int32_t *base) in test_vld1q_s32()
88 uint8x16_t test_vld1q_u8(const uint8_t *base) in test_vld1q_u8()
103 uint16x8_t test_vld1q_u16(const uint16_t *base) in test_vld1q_u16()
118 uint32x4_t test_vld1q_u32(const uint32_t *base) in test_vld1q_u32()
269 int8x16_t test_vldrbq_s8(const int8_t *base) in test_vldrbq_s8()
281 int16x8_t test_vldrbq_s16(const int8_t *base) in test_vldrbq_s16()
[all …]
|