Home
last modified time | relevance | path

Searched defs:bcr_regs (Results 1 – 25 of 62) sorted by relevance

123

/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gcc/libstdc++-v3/testsuite/backward/
H A Dheader_iterator_h.cc26 // { dg-options "-Wno-deprecated" }
30 return 0;
31 }
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-snapdragon/
H A Dclock-snapdragon.h26 struct bcr_regs { struct
42 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, argument
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-snapdragon/
H A Dclock-snapdragon.h26 struct bcr_regs { struct
42 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, argument
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-snapdragon/
H A Dclock-snapdragon.h26 struct bcr_regs { struct
42 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, argument
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/mach-snapdragon/
H A Dclock-snapdragon.h26 struct bcr_regs { struct
42 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, argument
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-snapdragon/
H A Dclock-snapdragon.h26 struct bcr_regs { struct
42 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, argument
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-snapdragon/
H A Dclock-snapdragon.h26 struct bcr_regs { struct
42 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, argument
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/mach-snapdragon/
H A Dclock-snapdragon.h26 struct bcr_regs { struct
42 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, argument
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/mach-snapdragon/
H A Dclock-snapdragon.h26 struct bcr_regs { struct
42 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, argument
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/mach-snapdragon/
H A Dclock-snapdragon.h26 struct bcr_regs { struct
42 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, argument
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/mach-snapdragon/
H A Dclock-snapdragon.h26 struct bcr_regs { struct
42 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, argument
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-snapdragon/
H A Dclock-snapdragon.h26 struct bcr_regs { struct
42 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, argument
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/mach-snapdragon/
H A Dclock-snapdragon.h26 struct bcr_regs { struct
42 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, argument
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-snapdragon/
H A Dclock-snapdragon.h26 struct bcr_regs { struct
42 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, argument
/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/mach-snapdragon/
H A Dclock-snapdragon.h26 struct bcr_regs { struct
42 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, argument
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-snapdragon/
H A Dclock-snapdragon.h26 struct bcr_regs { struct
42 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, argument
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/mach-snapdragon/
H A Dclock-snapdragon.h26 struct bcr_regs { struct
42 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, argument
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-snapdragon/
H A Dclock-snapdragon.h26 struct bcr_regs { struct
42 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, argument
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/mach-snapdragon/
H A Dclock-snapdragon.h26 struct bcr_regs { struct
42 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, argument
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/arm/mach-snapdragon/
H A Dclock-snapdragon.h26 struct bcr_regs { struct
42 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, argument
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/mach-snapdragon/
H A Dclock-snapdragon.h26 struct bcr_regs { struct
42 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, argument
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/mach-snapdragon/
H A Dclock-snapdragon.h26 struct bcr_regs { struct
42 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, argument
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/mach-snapdragon/
H A Dclock-snapdragon.h26 struct bcr_regs { struct
42 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, argument
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/mach-snapdragon/
H A Dclock-snapdragon.h26 struct bcr_regs { struct
42 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, argument
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/mach-snapdragon/
H A Dclock-snapdragon.h26 struct bcr_regs { struct
42 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, argument

123