1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2015 Landon Fuller <landon@landonf.org>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer,
12 * without modification.
13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
15 * redistribution must be conditioned upon including a substantially
16 * similar Disclaimer requirement for further binary redistribution.
17 *
18 * NO WARRANTY
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
21 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
22 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
23 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
24 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
27 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
29 * THE POSSIBILITY OF SUCH DAMAGES.
30 */
31
32 #include <sys/cdefs.h>
33 /*
34 * Broadcom Common PCIe-G2 Support.
35 *
36 * This base driver implementation is shared by the bhnd_pcib_g2 (root complex)
37 * and bhnd_pci_hostb_g2 (host bridge) drivers.
38 */
39
40 #include <sys/param.h>
41 #include <sys/malloc.h>
42 #include <sys/kernel.h>
43 #include <sys/bus.h>
44 #include <sys/module.h>
45 #include <sys/systm.h>
46
47 #include <machine/bus.h>
48 #include <sys/rman.h>
49 #include <machine/resource.h>
50
51 #include <dev/bhnd/bhnd.h>
52 #include <dev/mdio/mdio.h>
53
54 #include "bhnd_pcie2_reg.h"
55 #include "bhnd_pcie2_var.h"
56
57 static struct bhnd_device_quirk bhnd_pcie2_quirks[];
58
59 #define BHND_PCIE_DEV(_core, _desc, ...) \
60 BHND_DEVICE(BCM, _core, _desc, bhnd_pcie2_quirks, ## __VA_ARGS__)
61
62 static const struct bhnd_device bhnd_pcie2_devs[] = {
63 BHND_PCIE_DEV(PCIE2, "PCIe-G2 Host-PCI bridge", BHND_DF_HOSTB),
64 BHND_PCIE_DEV(PCIE2, "PCIe-G2 PCI-BHND bridge", BHND_DF_SOC),
65
66 BHND_DEVICE_END
67 };
68
69 /* Device quirks tables */
70 static struct bhnd_device_quirk bhnd_pcie2_quirks[] = {
71 BHND_DEVICE_QUIRK_END
72 };
73
74 int
bhnd_pcie2_generic_probe(device_t dev)75 bhnd_pcie2_generic_probe(device_t dev)
76 {
77 const struct bhnd_device *id;
78
79 id = bhnd_device_lookup(dev, bhnd_pcie2_devs,
80 sizeof(bhnd_pcie2_devs[0]));
81 if (id == NULL)
82 return (ENXIO);
83
84 bhnd_set_custom_core_desc(dev, id->desc);
85 return (BUS_PROBE_DEFAULT);
86 }
87
88 int
bhnd_pcie2_generic_attach(device_t dev)89 bhnd_pcie2_generic_attach(device_t dev)
90 {
91 struct bhnd_pcie2_softc *sc;
92 int error;
93
94 sc = device_get_softc(dev);
95 sc->dev = dev;
96 sc->quirks = bhnd_device_quirks(dev, bhnd_pcie2_devs,
97 sizeof(bhnd_pcie2_devs[0]));
98
99 /* Allocate bus resources */
100 sc->mem_res = bhnd_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid,
101 RF_ACTIVE);
102 if (sc->mem_res == NULL)
103 return (ENXIO);
104
105 BHND_PCIE2_LOCK_INIT(sc);
106
107 /* Probe and attach children */
108 if ((error = bus_generic_attach(dev)))
109 goto cleanup;
110
111 return (0);
112
113 cleanup:
114 bhnd_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem_res);
115 BHND_PCIE2_LOCK_DESTROY(sc);
116
117 return (error);
118 }
119
120 int
bhnd_pcie2_generic_detach(device_t dev)121 bhnd_pcie2_generic_detach(device_t dev)
122 {
123 struct bhnd_pcie2_softc *sc;
124 int error;
125
126 sc = device_get_softc(dev);
127
128 if ((error = bus_generic_detach(dev)))
129 return (error);
130
131 bhnd_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem_res);
132
133 BHND_PCIE2_LOCK_DESTROY(sc);
134
135 return (0);
136 }
137
138 static struct resource_list *
bhnd_pcie2_get_resource_list(device_t dev,device_t child)139 bhnd_pcie2_get_resource_list(device_t dev, device_t child)
140 {
141 struct bhnd_pcie2_devinfo *dinfo;
142
143 if (device_get_parent(child) != dev)
144 return (NULL);
145
146 dinfo = device_get_ivars(child);
147 return (&dinfo->resources);
148 }
149
150 static device_t
bhnd_pcie2_add_child(device_t dev,u_int order,const char * name,int unit)151 bhnd_pcie2_add_child(device_t dev, u_int order, const char *name, int unit)
152 {
153 struct bhnd_pcie2_devinfo *dinfo;
154 device_t child;
155
156 child = device_add_child_ordered(dev, order, name, unit);
157 if (child == NULL)
158 return (NULL);
159
160 dinfo = malloc(sizeof(struct bhnd_pcie2_devinfo), M_DEVBUF, M_NOWAIT);
161 if (dinfo == NULL) {
162 device_delete_child(dev, child);
163 return (NULL);
164 }
165
166 resource_list_init(&dinfo->resources);
167
168 device_set_ivars(child, dinfo);
169 return (child);
170 }
171
172 static void
bhnd_pcie2_child_deleted(device_t dev,device_t child)173 bhnd_pcie2_child_deleted(device_t dev, device_t child)
174 {
175 struct bhnd_pcie2_devinfo *dinfo;
176
177 if (device_get_parent(child) != dev)
178 return;
179
180 dinfo = device_get_ivars(child);
181 if (dinfo != NULL) {
182 resource_list_free(&dinfo->resources);
183 free(dinfo, M_DEVBUF);
184 }
185
186 device_set_ivars(child, NULL);
187 }
188
189 int
bhnd_pcie2_generic_suspend(device_t dev)190 bhnd_pcie2_generic_suspend(device_t dev)
191 {
192 return (bus_generic_suspend(dev));
193 }
194
195 int
bhnd_pcie2_generic_resume(device_t dev)196 bhnd_pcie2_generic_resume(device_t dev)
197 {
198 return (bus_generic_resume(dev));
199 }
200
201 /**
202 * Read a 32-bit PCIe TLP/DLLP/PLP protocol register.
203 *
204 * @param sc The bhndb_pci driver state.
205 * @param addr The protocol register offset.
206 */
207 uint32_t
bhnd_pcie2_read_proto_reg(struct bhnd_pcie2_softc * sc,uint32_t addr)208 bhnd_pcie2_read_proto_reg(struct bhnd_pcie2_softc *sc, uint32_t addr)
209 {
210 // TODO
211 return (ENXIO);
212 }
213
214 /**
215 * Write a 32-bit PCIe TLP/DLLP/PLP protocol register value.
216 *
217 * @param sc The bhndb_pci driver state.
218 * @param addr The protocol register offset.
219 * @param val The value to write to @p addr.
220 */
221 void
bhnd_pcie2_write_proto_reg(struct bhnd_pcie2_softc * sc,uint32_t addr,uint32_t val)222 bhnd_pcie2_write_proto_reg(struct bhnd_pcie2_softc *sc, uint32_t addr,
223 uint32_t val)
224 {
225 // TODO
226 panic("unimplemented");
227 }
228
229 int
bhnd_pcie2_mdio_read(struct bhnd_pcie2_softc * sc,int phy,int reg)230 bhnd_pcie2_mdio_read(struct bhnd_pcie2_softc *sc, int phy, int reg)
231 {
232 // TODO
233 return (ENXIO);
234 }
235
236 int
bhnd_pcie2_mdio_write(struct bhnd_pcie2_softc * sc,int phy,int reg,int val)237 bhnd_pcie2_mdio_write(struct bhnd_pcie2_softc *sc, int phy, int reg, int val)
238 {
239 // TODO
240 return (ENXIO);
241 }
242
243 int
bhnd_pcie2_mdio_read_ext(struct bhnd_pcie2_softc * sc,int phy,int devaddr,int reg)244 bhnd_pcie2_mdio_read_ext(struct bhnd_pcie2_softc *sc, int phy, int devaddr,
245 int reg)
246 {
247 // TODO
248 return (ENXIO);
249 }
250
251 int
bhnd_pcie2_mdio_write_ext(struct bhnd_pcie2_softc * sc,int phy,int devaddr,int reg,int val)252 bhnd_pcie2_mdio_write_ext(struct bhnd_pcie2_softc *sc, int phy, int devaddr,
253 int reg, int val)
254 {
255 // TODO
256 return (ENXIO);
257 }
258
259 static device_method_t bhnd_pcie2_methods[] = {
260 /* Device interface */
261 DEVMETHOD(device_probe, bhnd_pcie2_generic_probe),
262 DEVMETHOD(device_attach, bhnd_pcie2_generic_attach),
263 DEVMETHOD(device_detach, bhnd_pcie2_generic_detach),
264 DEVMETHOD(device_suspend, bhnd_pcie2_generic_suspend),
265 DEVMETHOD(device_resume, bhnd_pcie2_generic_resume),
266
267 /* Bus interface */
268 DEVMETHOD(bus_add_child, bhnd_pcie2_add_child),
269 DEVMETHOD(bus_child_deleted, bhnd_pcie2_child_deleted),
270 DEVMETHOD(bus_print_child, bus_generic_print_child),
271 DEVMETHOD(bus_get_resource_list, bhnd_pcie2_get_resource_list),
272 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
273 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
274 DEVMETHOD(bus_delete_resource, bus_generic_rl_delete_resource),
275
276 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource),
277 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
278 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
279 DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource),
280 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource),
281
282 DEVMETHOD_END
283 };
284
285 DEFINE_CLASS_0(bhnd_pcie2, bhnd_pcie2_driver, bhnd_pcie2_methods,
286 sizeof(struct bhnd_pcie2_softc));
287 MODULE_DEPEND(bhnd_pcie2, bhnd, 1, 1, 1);
288 MODULE_DEPEND(bhnd_pcie2, pci, 1, 1, 1);
289 MODULE_VERSION(bhnd_pcie2, 1);
290