| /dports/sysutils/u-boot-rock64/u-boot-2021.07/include/dt-bindings/mfd/ |
| H A D | stm32f4-rcc.h | 34 #define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8)) argument
35 #define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit) argument
44 #define STM32F4_AHB2_RESET(bit) (STM32F4_RCC_AHB2_##bit + (0x14 * 8)) argument
45 #define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + 0x20) argument
51 #define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8)) argument
52 #define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + 0x40) argument
81 #define STM32F4_APB1_RESET(bit) (STM32F4_RCC_APB1_##bit + (0x20 * 8)) argument
82 #define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + 0x80) argument
105 #define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8)) argument
106 #define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + 0xA0) argument
|
| /dports/sysutils/u-boot-sifive-fu540/u-boot-2021.07/include/dt-bindings/mfd/ |
| H A D | stm32f4-rcc.h | 34 #define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8)) argument
35 #define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit) argument
44 #define STM32F4_AHB2_RESET(bit) (STM32F4_RCC_AHB2_##bit + (0x14 * 8)) argument
45 #define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + 0x20) argument
51 #define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8)) argument
52 #define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + 0x40) argument
81 #define STM32F4_APB1_RESET(bit) (STM32F4_RCC_APB1_##bit + (0x20 * 8)) argument
82 #define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + 0x80) argument
105 #define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8)) argument
106 #define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + 0xA0) argument
|
| /dports/sysutils/u-boot-rpi4/u-boot-2021.07/include/dt-bindings/mfd/ |
| H A D | stm32f4-rcc.h | 34 #define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8)) argument
35 #define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit) argument
44 #define STM32F4_AHB2_RESET(bit) (STM32F4_RCC_AHB2_##bit + (0x14 * 8)) argument
45 #define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + 0x20) argument
51 #define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8)) argument
52 #define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + 0x40) argument
81 #define STM32F4_APB1_RESET(bit) (STM32F4_RCC_APB1_##bit + (0x20 * 8)) argument
82 #define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + 0x80) argument
105 #define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8)) argument
106 #define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + 0xA0) argument
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/include/dt-bindings/mfd/ |
| H A D | stm32f4-rcc.h | 34 #define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8)) argument
35 #define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit) argument
44 #define STM32F4_AHB2_RESET(bit) (STM32F4_RCC_AHB2_##bit + (0x14 * 8)) argument
45 #define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + 0x20) argument
51 #define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8)) argument
52 #define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + 0x40) argument
81 #define STM32F4_APB1_RESET(bit) (STM32F4_RCC_APB1_##bit + (0x20 * 8)) argument
82 #define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + 0x80) argument
105 #define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8)) argument
106 #define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + 0xA0) argument
|
| /dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/include/dt-bindings/mfd/ |
| H A D | stm32f4-rcc.h | 34 #define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8)) argument
35 #define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit) argument
44 #define STM32F4_AHB2_RESET(bit) (STM32F4_RCC_AHB2_##bit + (0x14 * 8)) argument
45 #define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + 0x20) argument
51 #define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8)) argument
52 #define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + 0x40) argument
81 #define STM32F4_APB1_RESET(bit) (STM32F4_RCC_APB1_##bit + (0x20 * 8)) argument
82 #define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + 0x80) argument
105 #define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8)) argument
106 #define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + 0xA0) argument
|
| /dports/sysutils/u-boot-rockpro64/u-boot-2021.07/include/dt-bindings/mfd/ |
| H A D | stm32f4-rcc.h | 34 #define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8)) argument
35 #define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit) argument
44 #define STM32F4_AHB2_RESET(bit) (STM32F4_RCC_AHB2_##bit + (0x14 * 8)) argument
45 #define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + 0x20) argument
51 #define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8)) argument
52 #define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + 0x40) argument
81 #define STM32F4_APB1_RESET(bit) (STM32F4_RCC_APB1_##bit + (0x20 * 8)) argument
82 #define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + 0x80) argument
105 #define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8)) argument
106 #define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + 0xA0) argument
|
| /dports/sysutils/u-boot-qemu-arm/u-boot-2021.07/include/dt-bindings/mfd/ |
| H A D | stm32f4-rcc.h | 34 #define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8)) argument
35 #define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit) argument
44 #define STM32F4_AHB2_RESET(bit) (STM32F4_RCC_AHB2_##bit + (0x14 * 8)) argument
45 #define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + 0x20) argument
51 #define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8)) argument
52 #define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + 0x40) argument
81 #define STM32F4_APB1_RESET(bit) (STM32F4_RCC_APB1_##bit + (0x20 * 8)) argument
82 #define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + 0x80) argument
105 #define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8)) argument
106 #define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + 0xA0) argument
|
| /dports/sysutils/u-boot-pinebook/u-boot-2021.07/include/dt-bindings/mfd/ |
| H A D | stm32f4-rcc.h | 34 #define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8)) argument
35 #define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit) argument
44 #define STM32F4_AHB2_RESET(bit) (STM32F4_RCC_AHB2_##bit + (0x14 * 8)) argument
45 #define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + 0x20) argument
51 #define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8)) argument
52 #define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + 0x40) argument
81 #define STM32F4_APB1_RESET(bit) (STM32F4_RCC_APB1_##bit + (0x20 * 8)) argument
82 #define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + 0x80) argument
105 #define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8)) argument
106 #define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + 0xA0) argument
|
| /dports/sysutils/u-boot-qemu-riscv64/u-boot-2021.07/include/dt-bindings/mfd/ |
| H A D | stm32f4-rcc.h | 34 #define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8)) argument
35 #define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit) argument
44 #define STM32F4_AHB2_RESET(bit) (STM32F4_RCC_AHB2_##bit + (0x14 * 8)) argument
45 #define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + 0x20) argument
51 #define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8)) argument
52 #define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + 0x40) argument
81 #define STM32F4_APB1_RESET(bit) (STM32F4_RCC_APB1_##bit + (0x20 * 8)) argument
82 #define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + 0x80) argument
105 #define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8)) argument
106 #define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + 0xA0) argument
|
| /dports/sysutils/u-boot-riotboard/u-boot-2021.07/include/dt-bindings/mfd/ |
| H A D | stm32f4-rcc.h | 34 #define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8)) argument
35 #define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit) argument
44 #define STM32F4_AHB2_RESET(bit) (STM32F4_RCC_AHB2_##bit + (0x14 * 8)) argument
45 #define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + 0x20) argument
51 #define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8)) argument
52 #define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + 0x40) argument
81 #define STM32F4_APB1_RESET(bit) (STM32F4_RCC_APB1_##bit + (0x20 * 8)) argument
82 #define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + 0x80) argument
105 #define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8)) argument
106 #define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + 0xA0) argument
|
| /dports/sysutils/u-boot-rpi-arm64/u-boot-2021.07/include/dt-bindings/mfd/ |
| H A D | stm32f4-rcc.h | 34 #define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8)) argument
35 #define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit) argument
44 #define STM32F4_AHB2_RESET(bit) (STM32F4_RCC_AHB2_##bit + (0x14 * 8)) argument
45 #define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + 0x20) argument
51 #define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8)) argument
52 #define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + 0x40) argument
81 #define STM32F4_APB1_RESET(bit) (STM32F4_RCC_APB1_##bit + (0x20 * 8)) argument
82 #define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + 0x80) argument
105 #define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8)) argument
106 #define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + 0xA0) argument
|
| /dports/sysutils/u-boot-rpi2/u-boot-2021.07/include/dt-bindings/mfd/ |
| H A D | stm32f4-rcc.h | 34 #define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8)) argument
35 #define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit) argument
44 #define STM32F4_AHB2_RESET(bit) (STM32F4_RCC_AHB2_##bit + (0x14 * 8)) argument
45 #define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + 0x20) argument
51 #define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8)) argument
52 #define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + 0x40) argument
81 #define STM32F4_APB1_RESET(bit) (STM32F4_RCC_APB1_##bit + (0x20 * 8)) argument
82 #define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + 0x80) argument
105 #define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8)) argument
106 #define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + 0xA0) argument
|
| /dports/sysutils/u-boot-rock-pi-4/u-boot-2021.07/include/dt-bindings/mfd/ |
| H A D | stm32f4-rcc.h | 34 #define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8)) argument
35 #define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit) argument
44 #define STM32F4_AHB2_RESET(bit) (STM32F4_RCC_AHB2_##bit + (0x14 * 8)) argument
45 #define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + 0x20) argument
51 #define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8)) argument
52 #define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + 0x40) argument
81 #define STM32F4_APB1_RESET(bit) (STM32F4_RCC_APB1_##bit + (0x20 * 8)) argument
82 #define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + 0x80) argument
105 #define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8)) argument
106 #define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + 0xA0) argument
|
| /dports/sysutils/u-boot-rpi3/u-boot-2021.07/include/dt-bindings/mfd/ |
| H A D | stm32f4-rcc.h | 34 #define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8)) argument
35 #define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit) argument
44 #define STM32F4_AHB2_RESET(bit) (STM32F4_RCC_AHB2_##bit + (0x14 * 8)) argument
45 #define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + 0x20) argument
51 #define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8)) argument
52 #define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + 0x40) argument
81 #define STM32F4_APB1_RESET(bit) (STM32F4_RCC_APB1_##bit + (0x20 * 8)) argument
82 #define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + 0x80) argument
105 #define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8)) argument
106 #define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + 0xA0) argument
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/skiboot/include/ |
| H A D | bitmap.h | 39 static inline void bitmap_set_bit(bitmap_t map, unsigned int bit) in bitmap_set_bit()
44 static inline void bitmap_clr_bit(bitmap_t map, unsigned int bit) in bitmap_clr_bit()
49 static inline bool bitmap_tst_bit(bitmap_t map, unsigned int bit) in bitmap_tst_bit()
59 #define bitmap_for_each_zero(map, size, bit) \ argument
64 #define bitmap_for_each_one(map, size, bit) \ argument
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/skiboot/include/ |
| H A D | bitmap.h | 39 static inline void bitmap_set_bit(bitmap_t map, unsigned int bit) in bitmap_set_bit()
44 static inline void bitmap_clr_bit(bitmap_t map, unsigned int bit) in bitmap_clr_bit()
49 static inline bool bitmap_tst_bit(bitmap_t map, unsigned int bit) in bitmap_tst_bit()
59 #define bitmap_for_each_zero(map, size, bit) \ argument
64 #define bitmap_for_each_one(map, size, bit) \ argument
|
| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/skiboot/include/ |
| H A D | bitmap.h | 39 static inline void bitmap_set_bit(bitmap_t map, unsigned int bit) in bitmap_set_bit()
44 static inline void bitmap_clr_bit(bitmap_t map, unsigned int bit) in bitmap_clr_bit()
49 static inline bool bitmap_tst_bit(bitmap_t map, unsigned int bit) in bitmap_tst_bit()
59 #define bitmap_for_each_zero(map, size, bit) \ argument
64 #define bitmap_for_each_one(map, size, bit) \ argument
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/skiboot/include/ |
| H A D | bitmap.h | 39 static inline void bitmap_set_bit(bitmap_t map, unsigned int bit) in bitmap_set_bit()
44 static inline void bitmap_clr_bit(bitmap_t map, unsigned int bit) in bitmap_clr_bit()
49 static inline bool bitmap_tst_bit(bitmap_t map, unsigned int bit) in bitmap_tst_bit()
59 #define bitmap_for_each_zero(map, size, bit) \ argument
64 #define bitmap_for_each_one(map, size, bit) \ argument
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/skiboot/include/ |
| H A D | bitmap.h | 39 static inline void bitmap_set_bit(bitmap_t map, unsigned int bit) in bitmap_set_bit()
44 static inline void bitmap_clr_bit(bitmap_t map, unsigned int bit) in bitmap_clr_bit()
49 static inline bool bitmap_tst_bit(bitmap_t map, unsigned int bit) in bitmap_tst_bit()
59 #define bitmap_for_each_zero(map, size, bit) \ argument
64 #define bitmap_for_each_one(map, size, bit) \ argument
|
| /dports/emulators/qemu/qemu-6.2.0/roms/skiboot/include/ |
| H A D | bitmap.h | 26 static inline void bitmap_set_bit(bitmap_t map, unsigned int bit) in bitmap_set_bit()
31 static inline void bitmap_clr_bit(bitmap_t map, unsigned int bit) in bitmap_clr_bit()
36 static inline bool bitmap_tst_bit(bitmap_t map, unsigned int bit) in bitmap_tst_bit()
46 #define bitmap_for_each_zero(map, size, bit) \ argument
51 #define bitmap_for_each_one(map, size, bit) \ argument
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/skiboot/include/ |
| H A D | bitmap.h | 39 static inline void bitmap_set_bit(bitmap_t map, unsigned int bit) in bitmap_set_bit()
44 static inline void bitmap_clr_bit(bitmap_t map, unsigned int bit) in bitmap_clr_bit()
49 static inline bool bitmap_tst_bit(bitmap_t map, unsigned int bit) in bitmap_tst_bit()
59 #define bitmap_for_each_zero(map, size, bit) \ argument
64 #define bitmap_for_each_one(map, size, bit) \ argument
|
| /dports/multimedia/v4l-utils/linux-5.13-rc2/arch/mips/lib/ |
| H A D | bitops.c | 24 unsigned int bit = nr % BITS_PER_LONG; in __mips_set_bit() local
45 unsigned int bit = nr % BITS_PER_LONG; in __mips_clear_bit() local
66 unsigned int bit = nr % BITS_PER_LONG; in __mips_change_bit() local
88 unsigned int bit = nr % BITS_PER_LONG; in __mips_test_and_set_bit_lock() local
112 unsigned int bit = nr % BITS_PER_LONG; in __mips_test_and_clear_bit() local
136 unsigned int bit = nr % BITS_PER_LONG; in __mips_test_and_change_bit() local
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/arch/mips/lib/ |
| H A D | bitops.c | 24 unsigned int bit = nr % BITS_PER_LONG; in __mips_set_bit() local
45 unsigned int bit = nr % BITS_PER_LONG; in __mips_clear_bit() local
66 unsigned int bit = nr % BITS_PER_LONG; in __mips_change_bit() local
88 unsigned int bit = nr % BITS_PER_LONG; in __mips_test_and_set_bit_lock() local
112 unsigned int bit = nr % BITS_PER_LONG; in __mips_test_and_clear_bit() local
136 unsigned int bit = nr % BITS_PER_LONG; in __mips_test_and_change_bit() local
|
| /dports/multimedia/libv4l/linux-5.13-rc2/arch/mips/lib/ |
| H A D | bitops.c | 24 unsigned int bit = nr % BITS_PER_LONG; in __mips_set_bit() local
45 unsigned int bit = nr % BITS_PER_LONG; in __mips_clear_bit() local
66 unsigned int bit = nr % BITS_PER_LONG; in __mips_change_bit() local
88 unsigned int bit = nr % BITS_PER_LONG; in __mips_test_and_set_bit_lock() local
112 unsigned int bit = nr % BITS_PER_LONG; in __mips_test_and_clear_bit() local
136 unsigned int bit = nr % BITS_PER_LONG; in __mips_test_and_change_bit() local
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| /dports/multimedia/handbrake/x265_3.5/source/common/ |
| H A D | wavefront.cpp | 69 uint32_t bit = 1 << (row & 31); in enqueueRow() local
75 uint32_t bit = 1 << (row & 31); in enableRow() local
86 uint32_t bit = 1 << (row & 31); in dequeueRow() local
102 uint32_t bit = 1 << id; in findJob() local
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