1 /* 2 * Copyright © 2014 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the 6 * "Software"), to deal in the Software without restriction, including 7 * without limitation the rights to use, copy, modify, merge, publish, 8 * distribute, sub license, and/or sell copies of the Software, and to 9 * permit persons to whom the Software is furnished to do so, subject to 10 * the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the 13 * next paragraph) shall be included in all copies or substantial portions 14 * of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 19 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR 20 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 22 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Midhunchandra Kodiyath <midhunchandra.kodiyath@intel.com> 26 * 27 */ 28 29 #ifndef _MEDIA__DRIVER_DATA_H 30 #define _MEDIA__DRIVER_DATA_H 31 #include <stdbool.h> 32 #include <pthread.h> 33 34 #ifdef __cplusplus 35 extern "C" { 36 #endif 37 #include <drm.h> 38 #include <i915_drm.h> 39 #include <intel_bufmgr.h> 40 41 #ifdef __cplusplus 42 } 43 #endif 44 45 #define TRUE 1 46 #define FALSE 0 47 #define ERROR -1 48 #define MAX_COLOR_PLANES 4 //Maximum color planes supported by media driver, like (A/R/G/B in different planes) 49 #define BATCH_BUF_SIZE 0x80000 50 #define MEDIA_HEAP_INCREMENTAL_SIZE 8 51 52 enum ME_MODES 53 { 54 ME16x_BEFORE_ME4x = 0, 55 ME16x_ONLY = 1, 56 ME4x_ONLY = 2, 57 ME4x_AFTER_ME16x = 3 58 }; 59 enum 60 { 61 NORMAL_MODE = 0, 62 PERFORMANCE_MODE = 1, 63 QUALITY_MODE = 2 64 }; 65 66 typedef pthread_mutex_t MEDIA_DRV_MUTEX; 67 struct media_driver_data 68 { 69 INT fd; 70 INT device_id; 71 INT revision; 72 dri_bufmgr *bufmgr; 73 INT dri2_enabled; 74 UINT exec2_flag:1; /* Flag: has execbuffer2? */ 75 UINT bsd_flag:1; /* Flag: has bitstream decoder for H.264? */ 76 UINT blt_flag:1; /* Flag: has BLT unit? */ 77 UINT vebox_flag:1; /* Flag: has VEBOX unit */ 78 }; 79 80 struct media_interface_descriptor_data 81 { 82 struct 83 { 84 UINT pad0:6; 85 UINT kernel_start_pointer:26; 86 } desc0; 87 88 struct 89 { 90 UINT kernel_start_pointer_high:16; 91 UINT pad0:16; 92 } desc1; 93 94 struct 95 { 96 UINT pad0:7; 97 UINT software_exception_enable:1; 98 UINT pad1:3; 99 UINT maskstack_exception_enable:1; 100 UINT pad2:1; 101 UINT illegal_opcode_exception_enable:1; 102 UINT pad3:2; 103 UINT floating_point_mode:1; 104 UINT thread_priority:1; 105 UINT single_program_flow:1; 106 UINT denorm_mode:1; 107 UINT pad4:12; 108 } desc2; 109 110 struct 111 { 112 UINT pad0:2; 113 UINT sampler_count:3; 114 UINT sampler_state_pointer:27; 115 } desc3; 116 117 struct 118 { 119 UINT binding_table_entry_count:5; 120 UINT binding_table_pointer:11; 121 UINT pad0:16; 122 } desc4; 123 124 struct 125 { 126 UINT constant_urb_entry_read_offset:16; 127 UINT constant_urb_entry_read_length:16; 128 } desc5; 129 130 struct 131 { 132 UINT num_threads_in_tg:10; 133 UINT pad0:5; 134 UINT global_barrier_enable:1; 135 UINT shared_local_memory_size:5; 136 UINT barrier_enable:1; 137 UINT rounding_mode:2; 138 UINT pad1:8; 139 } desc6; 140 141 struct 142 { 143 UINT cross_thread_constant_data_read_length:8; 144 UINT pad0:24; 145 } desc7; 146 }; 147 148 struct gen6_interface_descriptor_data 149 { 150 struct 151 { 152 UINT pad0:6; 153 UINT kernel_start_pointer:26; 154 } desc0; 155 156 struct 157 { 158 UINT pad0:7; 159 UINT software_exception_enable:1; 160 UINT pad1:3; 161 UINT maskstack_exception_enable:1; 162 UINT pad2:1; 163 UINT illegal_opcode_exception_enable:1; 164 UINT pad3:2; 165 UINT floating_point_mode:1; 166 UINT thread_priority:1; 167 UINT single_program_flow:1; 168 UINT pad4:13; 169 } desc1; 170 171 struct 172 { 173 UINT pad0:2; 174 UINT sampler_count:3; 175 UINT sampler_state_pointer:27; 176 } desc2; 177 178 struct 179 { 180 UINT binding_table_entry_count:5; 181 UINT binding_table_pointer:27; 182 } desc3; 183 184 struct 185 { 186 UINT constant_urb_entry_read_offset:16; 187 UINT constant_urb_entry_read_length:16; 188 } desc4; 189 190 union 191 { 192 struct 193 { 194 UINT num_threads:8; 195 UINT barrier_return_byte:8; 196 UINT shared_local_memory_size:5; 197 UINT barrier_enable:1; 198 UINT rounding_mode:2; 199 UINT barrier_return_grf_offset:8; 200 } gen7; 201 202 struct 203 { 204 UINT barrier_id:4; 205 UINT pad0:28; 206 } gen6; 207 } desc5; 208 209 struct 210 { 211 UINT cross_thread_constant_data_read_length:8; 212 UINT pad0:24; 213 } desc6; 214 215 struct 216 { 217 UINT pad0; 218 } desc7; 219 }; 220 #endif 221