1 /*- 2 * Copyright (c) 2006 M. Warner Losh. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23 * 24 * Portions of this software may have been developed with reference to 25 * the SD Simplified Specification. The following disclaimer may apply: 26 * 27 * The following conditions apply to the release of the simplified 28 * specification ("Simplified Specification") by the SD Card Association and 29 * the SD Group. The Simplified Specification is a subset of the complete SD 30 * Specification which is owned by the SD Card Association and the SD 31 * Group. This Simplified Specification is provided on a non-confidential 32 * basis subject to the disclaimers below. Any implementation of the 33 * Simplified Specification may require a license from the SD Card 34 * Association, SD Group, SD-3C LLC or other third parties. 35 * 36 * Disclaimers: 37 * 38 * The information contained in the Simplified Specification is presented only 39 * as a standard specification for SD Cards and SD Host/Ancillary products and 40 * is provided "AS-IS" without any representations or warranties of any 41 * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD 42 * Card Association for any damages, any infringements of patents or other 43 * right of the SD Group, SD-3C LLC, the SD Card Association or any third 44 * parties, which may result from its use. No license is granted by 45 * implication, estoppel or otherwise under any patent or other rights of the 46 * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing 47 * herein shall be construed as an obligation by the SD Group, the SD-3C LLC 48 * or the SD Card Association to disclose or distribute any technical 49 * information, know-how or other confidential information to any third party. 50 * 51 * $FreeBSD: src/sys/dev/mmc/bridge.h,v 1.3 2008/10/08 17:35:41 mav Exp $ 52 */ 53 54 #ifndef BUS_MMC_BRIDGE_H 55 #define BUS_MMC_BRIDGE_H 56 57 /* 58 * This file defines interfaces for the mmc bridge. The names chosen 59 * are similar to or the same as the names used in Linux to allow for 60 * easy porting of what Linux calls mmc host drivers. I use the 61 * FreeBSD terminology of bridge and bus for consistency with other 62 * drivers in the system. This file corresponds roughly to the Linux 63 * linux/mmc/host.h file. 64 * 65 * A mmc bridge is a chipset that can have one or more mmc and/or sd 66 * cards attached to it. mmc cards are attached on a bus topology, 67 * while sd and sdio cards are attached using a star topology (meaning 68 * in practice each sd card has its own, independent slot). Each 69 * mmcbr is assumed to be derived from the mmcbr. This is done to 70 * allow for easier addition of bridges (as each bridge does not need 71 * to be added to the mmcbus file). 72 * 73 * Attached to the mmc bridge is an mmcbus. The mmcbus is described 74 * in bus/mmc/mmcbus_if.m. 75 */ 76 77 78 /* 79 * mmc_ios is a structure that is used to store the state of the mmc/sd 80 * bus configuration. This include the bus' clock speed, its voltage, 81 * the bus mode for command output, the SPI chip select, some power 82 * states and the bus width. 83 */ 84 enum mmc_vdd { 85 vdd_150 = 0, vdd_155, vdd_160, vdd_165, vdd_170, vdd_180, 86 vdd_190, vdd_200, vdd_210, vdd_220, vdd_230, vdd_240, vdd_250, 87 vdd_260, vdd_270, vdd_280, vdd_290, vdd_300, vdd_310, vdd_320, 88 vdd_330, vdd_340, vdd_350, vdd_360 89 }; 90 91 enum mmc_vccq { 92 vccq_120 = 0, vccq_180, vccq_330 93 }; 94 95 enum mmc_power_mode { 96 power_off = 0, power_up, power_on 97 }; 98 99 enum mmc_bus_mode { 100 opendrain = 1, pushpull 101 }; 102 103 enum mmc_chip_select { 104 cs_dontcare = 0, cs_high, cs_low 105 }; 106 107 enum mmc_bus_width { 108 bus_width_1 = 0, bus_width_4 = 2, bus_width_8 = 3 109 }; 110 111 enum mmc_drv_type { 112 drv_type_b = 0, drv_type_a, drv_type_c, drv_type_d 113 }; 114 115 enum mmc_bus_timing { 116 bus_timing_normal = 0, bus_timing_hs, bus_timing_uhs_sdr12, 117 bus_timing_uhs_sdr25, bus_timing_uhs_sdr50, bus_timing_uhs_ddr50, 118 bus_timing_uhs_sdr104, bus_timing_mmc_ddr52, bus_timing_mmc_hs200, 119 bus_timing_mmc_hs400, bus_timing_mmc_hs400es, bus_timing_max = 120 bus_timing_mmc_hs400es 121 }; 122 123 struct mmc_ios { 124 uint32_t clock; /* Speed of the clock in Hz to move data */ 125 enum mmc_vdd vdd; /* Voltage to apply to the power pins */ 126 enum mmc_vccq vccq; /* Voltage to use for signaling */ 127 enum mmc_bus_mode bus_mode; 128 enum mmc_chip_select chip_select; 129 enum mmc_bus_width bus_width; 130 enum mmc_power_mode power_mode; 131 enum mmc_bus_timing timing; 132 enum mmc_drv_type drv_type; 133 }; 134 135 enum mmc_card_mode { 136 mode_mmc, mode_sd 137 }; 138 139 struct mmc_host { 140 int f_min; 141 int f_max; 142 uint32_t host_ocr; 143 uint32_t ocr; 144 uint32_t caps; 145 #define MMC_CAP_4_BIT_DATA (1 << 0) /* Can do 4-bit data transfers */ 146 #define MMC_CAP_8_BIT_DATA (1 << 1) /* Can do 8-bit data transfers */ 147 #define MMC_CAP_HSPEED (1 << 2) /* Can do High Speed transfers */ 148 #define MMC_CAP_WAIT_WHILE_BUSY (1 << 3) /* Host waits for busy responses */ 149 #define MMC_CAP_UHS_SDR12 (1 << 6) /* Can do UHS SDR12 */ 150 #define MMC_CAP_UHS_SDR25 (1 << 7) /* Can do UHS SDR25 */ 151 #define MMC_CAP_UHS_SDR50 (1 << 8) /* Can do UHS SDR50 */ 152 #define MMC_CAP_UHS_SDR104 (1 << 9) /* Can do UHS SDR104 */ 153 #define MMC_CAP_UHS_DDR50 (1 << 10) /* Can do UHS DDR50 */ 154 #define MMC_CAP_MMC_DDR52_120 (1 << 11) /* Can do eMMC DDR52 at 1.2 V */ 155 #define MMC_CAP_MMC_DDR52_180 (1 << 12) /* Can do eMMC DDR52 at 1.8 V */ 156 #define MMC_CAP_MMC_DDR52 (MMC_CAP_MMC_DDR52_120 | MMC_CAP_MMC_DDR52_180) 157 #define MMC_CAP_MMC_HS200_120 (1 << 13) /* Can do eMMC HS200 at 1.2 V */ 158 #define MMC_CAP_MMC_HS200_180 (1 << 14) /* Can do eMMC HS200 at 1.8 V */ 159 #define MMC_CAP_MMC_HS200 (MMC_CAP_MMC_HS200_120| MMC_CAP_MMC_HS200_180) 160 #define MMC_CAP_MMC_HS400_120 (1 << 15) /* Can do eMMC HS400 at 1.2 V */ 161 #define MMC_CAP_MMC_HS400_180 (1 << 16) /* Can do eMMC HS400 at 1.8 V */ 162 #define MMC_CAP_MMC_HS400 (MMC_CAP_MMC_HS400_120 | MMC_CAP_MMC_HS400_180) 163 #define MMC_CAP_MMC_HSX00_120 (MMC_CAP_MMC_HS200_120 | MMC_CAP_MMC_HS400_120) 164 #define MMC_CAP_MMC_ENH_STROBE (1 << 17) /* Can do eMMC Enhanced Strobe */ 165 #define MMC_CAP_SIGNALING_120 (1 << 18) /* Can do signaling at 1.2 V */ 166 #define MMC_CAP_SIGNALING_180 (1 << 19) /* Can do signaling at 1.8 V */ 167 #define MMC_CAP_SIGNALING_330 (1 << 20) /* Can do signaling at 3.3 V */ 168 #define MMC_CAP_DRIVER_TYPE_A (1 << 21) /* Can do Driver Type A */ 169 #define MMC_CAP_DRIVER_TYPE_C (1 << 22) /* Can do Driver Type C */ 170 #define MMC_CAP_DRIVER_TYPE_D (1 << 23) /* Can do Driver Type D */ 171 enum mmc_card_mode mode; 172 struct mmc_ios ios; /* Current state of the host */ 173 }; 174 175 #endif /* BUS_MMC_BRIDGE_H */ 176