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Searched defs:cfgBIF_CFG_DEV0_EPF1_0_PCIE_TPH_REQR_ENH_CAP_LIST_DEFAULT (Results 1 – 2 of 2) sorted by path

/dragonfly/sys/dev/drm/amd/include/asic_reg/nbio/
H A Dnbio_6_1_default.h585 #define cfgBIF_CFG_DEV0_EPF1_0_PCIE_TPH_REQR_ENH_CAP_LIST_DEFAULT 0x2f000000 macro
H A Dnbio_7_0_default.h801 #define cfgBIF_CFG_DEV0_EPF1_0_PCIE_TPH_REQR_ENH_CAP_LIST_DEFAULT 0x2f000000 macro