xref: /openbsd/sys/dev/sbus/cgtwelve.c (revision 63294167)
1 /*	$OpenBSD: cgtwelve.c,v 1.12 2022/07/15 17:57:27 kettenis Exp $	*/
2 
3 /*
4  * Copyright (c) 2002, 2003 Miodrag Vallat.  All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
19  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
23  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25  * POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 /*
29  * cgtwelve (GS) accelerated 24-bit framebuffer driver.
30  *
31  * Enough experiments and SMI's cg12reg.h made this possible.
32  */
33 
34 /*
35  * The cgtwelve framebuffer is a 3-slot SBUS card, that will fit only in
36  * SPARCstation 1, 1+, 2 and 5, or in an xbox SBUS extension.
37  *
38  * It is a 24-bit 3D accelerated framebuffer made by Matrox, featuring 4MB
39  * (regular model) or 8MB (high-res model) of video memory, a complex
40  * windowing engine, double buffering modes, three video planes (overlay,
41  * 8 bit and 24 bit color), and a lot of colormap combinations.
42  *
43  * All of this is driven by a set of three Bt462 ramdacs (latched unless
44  * explicitly programmed), and a couple of other Matrox-specific chips.
45  *
46  * XXX The high res card is untested.
47  */
48 
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/buf.h>
52 #include <sys/device.h>
53 #include <sys/ioctl.h>
54 #include <sys/conf.h>
55 
56 #include <uvm/uvm_extern.h>
57 
58 #include <machine/autoconf.h>
59 #include <machine/bus.h>
60 #include <machine/pmap.h>
61 #include <machine/cpu.h>
62 #include <machine/conf.h>
63 
64 #include <dev/wscons/wsconsio.h>
65 #include <dev/wscons/wsdisplayvar.h>
66 #include <dev/rasops/rasops.h>
67 #include <machine/fbvar.h>
68 
69 #include <dev/sbus/sbusvar.h>
70 
71 #include <dev/sbus/cgtwelvereg.h>
72 
73 #include <dev/cons.h>	/* for prom console hook */
74 
75 /* per-display variables */
76 struct cgtwelve_softc {
77 	struct	sunfb	sc_sunfb;	/* common base device */
78 	bus_space_tag_t	sc_bustag;
79 	bus_addr_t	sc_paddr;
80 
81 	volatile struct cgtwelve_dpu *sc_dpu;
82 	volatile struct cgtwelve_apu *sc_apu;
83 	volatile struct cgtwelve_dac *sc_ramdac;	/* RAMDAC registers */
84 	volatile u_char *sc_overlay;	/* overlay or enable plane */
85 	volatile u_long *sc_inten;	/* true color plane */
86 
87 	int	sc_highres;
88 	int	sc_nscreens;
89 	int	sc_isconsole;
90 };
91 
92 int	cgtwelve_ioctl(void *, u_long, caddr_t, int, struct proc *);
93 paddr_t	cgtwelve_mmap(void *, off_t, int);
94 void	cgtwelve_reset(struct cgtwelve_softc *, int);
95 void	cgtwelve_prom(struct cgtwelve_softc *);
96 
97 static __inline__ void cgtwelve_ramdac_wraddr(struct cgtwelve_softc *sc,
98 	    u_int32_t addr);
99 
100 struct wsdisplay_accessops cgtwelve_accessops = {
101 	.ioctl = cgtwelve_ioctl,
102 	.mmap = cgtwelve_mmap
103 };
104 
105 int	cgtwelvematch(struct device *, void *, void *);
106 void	cgtwelveattach(struct device *, struct device *, void *);
107 int	cgtwelveactivate(struct device *, int);
108 
109 const struct cfattach cgtwelve_ca = {
110 	sizeof(struct cgtwelve_softc), cgtwelvematch, cgtwelveattach,
111 	NULL, cgtwelveactivate
112 };
113 
114 struct cfdriver cgtwelve_cd = {
115 	NULL, "cgtwelve", DV_DULL
116 };
117 
118 
119 /*
120  * Match a cgtwelve.
121  */
122 int
cgtwelvematch(struct device * parent,void * vcf,void * aux)123 cgtwelvematch(struct device *parent, void *vcf, void *aux)
124 {
125 	struct cfdata *cf = vcf;
126 	struct sbus_attach_args *sa = aux;
127 
128 	if (strcmp(cf->cf_driver->cd_name, sa->sa_name) != 0)
129 		return (0);
130 
131 	return (1);
132 }
133 
134 /*
135  * Attach and initialize a cgtwelve.
136  */
137 void
cgtwelveattach(struct device * parent,struct device * self,void * args)138 cgtwelveattach(struct device *parent, struct device *self, void *args)
139 {
140 	struct cgtwelve_softc *sc = (struct cgtwelve_softc *)self;
141 	struct sbus_attach_args *sa = args;
142 	bus_space_tag_t bt;
143 	bus_space_handle_t bh;
144 	int node;
145 	char *ps;
146 
147 	bt = sa->sa_bustag;
148 	node = sa->sa_node;
149 
150 	printf(": %s", getpropstring(node, "model"));
151 	ps = getpropstring(node, "dev_id");
152 	if (*ps != '\0')
153 		printf(" (%s)", ps);
154 	printf("\n");
155 
156 	sc->sc_isconsole = node == fbnode;
157 
158 	if (sa->sa_nreg == 0) {
159 		printf("%s: no SBus registers!\n", self->dv_xname);
160 		return;
161 	}
162 
163 	sc->sc_bustag = bt;
164 
165 	/*
166 	 * Map registers
167 	 */
168 	if (sbus_bus_map(bt, sa->sa_slot, sa->sa_offset +
169 	    CG12_OFF_DPU, sizeof(struct cgtwelve_dpu),
170 	    BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
171 		printf("%s: can't map DPU registers\n", self->dv_xname);
172 		return;
173 	}
174 	sc->sc_dpu = bus_space_vaddr(bt, bh);
175 	if (sbus_bus_map(bt, sa->sa_slot, sa->sa_offset +
176 	    CG12_OFF_APU, sizeof(struct cgtwelve_apu),
177 	    BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
178 		printf("%s: can't map APU registers\n", self->dv_xname);
179 		return;
180 	}
181 	sc->sc_apu = bus_space_vaddr(bt, bh);
182 	if (sbus_bus_map(bt, sa->sa_slot, sa->sa_offset +
183 	    CG12_OFF_DAC, sizeof(struct cgtwelve_dac),
184 	    BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
185 		printf("%s: can't map RAMDAC registers\n", self->dv_xname);
186 		return;
187 	}
188 	sc->sc_ramdac = bus_space_vaddr(bt, bh);
189 
190 	/*
191 	 * The console is using the 1-bit overlay plane, while the prom
192 	 * will correctly report 32 bit depth.
193 	 */
194 	fb_setsize(&sc->sc_sunfb, 1, CG12_WIDTH, CG12_HEIGHT,
195 	    node, 0);
196 	sc->sc_sunfb.sf_depth = 1;
197 	sc->sc_sunfb.sf_linebytes = sc->sc_sunfb.sf_width / 8;
198 	sc->sc_sunfb.sf_fbsize = sc->sc_sunfb.sf_height *
199 	    sc->sc_sunfb.sf_linebytes;
200 
201 	sc->sc_highres = sc->sc_sunfb.sf_width == CG12_WIDTH_HR;
202 
203 	/*
204 	 * Map planes
205 	 */
206 	if (sbus_bus_map(bt, sa->sa_slot, sa->sa_offset +
207 	    (sc->sc_highres ? CG12_OFF_OVERLAY0_HR : CG12_OFF_OVERLAY0),
208 	    round_page(sc->sc_highres ? CG12_SIZE_OVERLAY_HR :
209 	        CG12_SIZE_OVERLAY), BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
210 		printf("%s: can't map overlay plane\n", self->dv_xname);
211 		return;
212 	}
213 	sc->sc_overlay = bus_space_vaddr(bt, bh);
214 	if (sbus_bus_map(bt, sa->sa_slot, sa->sa_offset +
215 	    (sc->sc_highres ? CG12_OFF_INTEN_HR : CG12_OFF_INTEN),
216 	    round_page(sc->sc_highres ? CG12_SIZE_COLOR24_HR :
217 	        CG12_SIZE_COLOR24), BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
218 		printf("%s: can't map color plane\n", self->dv_xname);
219 		return;
220 	}
221 	sc->sc_inten = bus_space_vaddr(bt, bh);
222 	sc->sc_paddr = sbus_bus_addr(bt, sa->sa_slot, sa->sa_offset +
223 	    (sc->sc_highres ? CG12_OFF_INTEN_HR : CG12_OFF_INTEN));
224 
225 	/* reset cursor & frame buffer controls */
226 	sc->sc_sunfb.sf_depth = 0;	/* force action */
227 	cgtwelve_reset(sc, 1);
228 
229 	sc->sc_sunfb.sf_ro.ri_bits = (void *)sc->sc_overlay;
230 	sc->sc_sunfb.sf_ro.ri_hw = sc;
231 	fbwscons_init(&sc->sc_sunfb, 0, sc->sc_isconsole);
232 
233 	if (sc->sc_isconsole)
234 		fbwscons_console_init(&sc->sc_sunfb, -1);
235 
236 	printf("%s: %dx%d", self->dv_xname,
237 	    sc->sc_sunfb.sf_width, sc->sc_sunfb.sf_height);
238 	ps = getpropstring(node, "ucoderev");
239 	if (*ps != '\0')
240 		printf(", microcode rev. %s", ps);
241 	printf("\n");
242 
243 	fbwscons_attach(&sc->sc_sunfb, &cgtwelve_accessops, sc->sc_isconsole);
244 }
245 
246 int
cgtwelveactivate(struct device * self,int act)247 cgtwelveactivate(struct device *self, int act)
248 {
249 	struct cgtwelve_softc *sc = (struct cgtwelve_softc *)self;
250 	int ret = 0;
251 
252 	switch (act) {
253 	case DVACT_POWERDOWN:
254 		if (sc->sc_isconsole)
255 			cgtwelve_prom(sc);
256 		break;
257 	}
258 
259 	return (ret);
260 }
261 
262 int
cgtwelve_ioctl(void * dev,u_long cmd,caddr_t data,int flags,struct proc * p)263 cgtwelve_ioctl(void *dev, u_long cmd, caddr_t data, int flags, struct proc *p)
264 {
265 	struct cgtwelve_softc *sc = dev;
266 	struct wsdisplay_fbinfo *wdf;
267 
268 	/*
269 	 * Note that, although the emulation (text) mode is running in the
270 	 * overlay plane, we advertise the frame buffer as the full-blown
271 	 * 32-bit beast it is.
272 	 */
273 	switch (cmd) {
274 	case WSDISPLAYIO_GTYPE:
275 		*(u_int *)data = WSDISPLAY_TYPE_SUNCG12;
276 		break;
277 	case WSDISPLAYIO_GINFO:
278 		wdf = (struct wsdisplay_fbinfo *)data;
279 		wdf->height = sc->sc_sunfb.sf_height;
280 		wdf->width = sc->sc_sunfb.sf_width;
281 		wdf->depth = 32;
282 		wdf->stride = sc->sc_sunfb.sf_linebytes * 32;
283 		wdf->offset = 0;
284 		wdf->cmsize = 0;
285 		break;
286 	case WSDISPLAYIO_GETSUPPORTEDDEPTH:
287 		*(u_int *)data = WSDISPLAYIO_DEPTH_24_32;
288 		break;
289 	case WSDISPLAYIO_LINEBYTES:
290 		*(u_int *)data = sc->sc_sunfb.sf_linebytes * 32;
291 		break;
292 
293 	case WSDISPLAYIO_GETCMAP:
294 	case WSDISPLAYIO_PUTCMAP:
295 		break;
296 
297 	case WSDISPLAYIO_SMODE:
298 		if (*(int *)data == WSDISPLAYIO_MODE_EMUL) {
299 			/* Back from X11 to text mode */
300 			cgtwelve_reset(sc, 1);
301 		} else {
302 			/* Starting X11, switch to 32 bit mode */
303 			cgtwelve_reset(sc, 32);
304 		}
305 		break;
306 
307 	case WSDISPLAYIO_SVIDEO:
308 	case WSDISPLAYIO_GVIDEO:
309 		break;
310 
311 	default:
312 		return (-1);	/* not supported yet */
313 	}
314 
315 	return (0);
316 }
317 
318 /*
319  * Clean up hardware state (e.g., after bootup or after X crashes).
320  */
321 void
cgtwelve_reset(struct cgtwelve_softc * sc,int depth)322 cgtwelve_reset(struct cgtwelve_softc *sc, int depth)
323 {
324 	u_int32_t c;
325 
326 	if (sc->sc_sunfb.sf_depth != depth) {
327 		if (depth == 1) {
328 			/*
329 			 * Select the enable plane as sc_overlay, and fill it.
330 			 */
331 			sc->sc_apu->hpage = sc->sc_highres ?
332 			    CG12_HPAGE_ENABLE_HR : CG12_HPAGE_ENABLE;
333 			sc->sc_apu->haccess = CG12_HACCESS_ENABLE;
334 			sc->sc_dpu->pln_sl_host = CG12_PLN_SL_ENABLE;
335 			sc->sc_dpu->pln_rd_msk_host = CG12_PLN_RD_ENABLE;
336 			sc->sc_dpu->pln_wr_msk_host = CG12_PLN_WR_ENABLE;
337 
338 			memset((void *)sc->sc_overlay, 0xff, sc->sc_highres ?
339 			    CG12_SIZE_ENABLE_HR : CG12_SIZE_ENABLE);
340 
341 			/*
342 			 * Select the overlay plane as sc_overlay.
343 			 */
344 			sc->sc_apu->hpage = sc->sc_highres ?
345 			    CG12_HPAGE_OVERLAY_HR : CG12_HPAGE_OVERLAY;
346 			sc->sc_apu->haccess = CG12_HACCESS_OVERLAY;
347 			sc->sc_dpu->pln_sl_host = CG12_PLN_SL_OVERLAY;
348 			sc->sc_dpu->pln_rd_msk_host = CG12_PLN_RD_OVERLAY;
349 			sc->sc_dpu->pln_wr_msk_host = CG12_PLN_WR_OVERLAY;
350 
351 			/*
352 			 * Upload a strict mono colormap, or the text
353 			 * upon returning from 32 bit mode would appear
354 			 * as (slightly dark) white on white.
355 			 */
356 			cgtwelve_ramdac_wraddr(sc, 0);
357 			sc->sc_ramdac->color = 0x00000000;
358 			for (c = 1; c < 256; c++)
359 				sc->sc_ramdac->color = 0x00ffffff;
360 		} else {
361 			/*
362 			 * Select the overlay plane as sc_overlay.
363 			 */
364 			sc->sc_apu->hpage = sc->sc_highres ?
365 			    CG12_HPAGE_OVERLAY_HR : CG12_HPAGE_OVERLAY;
366 			sc->sc_apu->haccess = CG12_HACCESS_OVERLAY;
367 			sc->sc_dpu->pln_sl_host = CG12_PLN_SL_OVERLAY;
368 			sc->sc_dpu->pln_rd_msk_host = CG12_PLN_RD_OVERLAY;
369 			sc->sc_dpu->pln_wr_msk_host = CG12_PLN_WR_OVERLAY;
370 
371 			/*
372 			 * Do not attempt to somewhat preserve screen
373 			 * contents - reading the overlay plane and writing
374 			 * to the color plane at the same time is not
375 			 * reliable, and allocating memory to save a copy
376 			 * of the overlay plane would be awful.
377 			 */
378 			bzero((void *)sc->sc_overlay, sc->sc_highres ?
379 			    CG12_SIZE_OVERLAY_HR : CG12_SIZE_OVERLAY);
380 
381 			/*
382 			 * Select the enable plane as sc_overlay, and clear it.
383 			 */
384 			sc->sc_apu->hpage = sc->sc_highres ?
385 			    CG12_HPAGE_ENABLE_HR : CG12_HPAGE_ENABLE;
386 			sc->sc_apu->haccess = CG12_HACCESS_ENABLE;
387 			sc->sc_dpu->pln_sl_host = CG12_PLN_SL_ENABLE;
388 			sc->sc_dpu->pln_rd_msk_host = CG12_PLN_RD_ENABLE;
389 			sc->sc_dpu->pln_wr_msk_host = CG12_PLN_WR_ENABLE;
390 
391 			bzero((void *)sc->sc_overlay, sc->sc_highres ?
392 			    CG12_SIZE_ENABLE_HR : CG12_SIZE_ENABLE);
393 
394 			/*
395 			 * Select the intensity (color) plane, and clear it.
396 			 */
397 			sc->sc_apu->hpage = sc->sc_highres ?
398 			    CG12_HPAGE_24BIT_HR : CG12_HPAGE_24BIT;
399 			sc->sc_apu->haccess = CG12_HACCESS_24BIT;
400 			sc->sc_dpu->pln_sl_host = CG12_PLN_SL_24BIT;
401 			sc->sc_dpu->pln_rd_msk_host = CG12_PLN_RD_24BIT;
402 			sc->sc_dpu->pln_wr_msk_host = CG12_PLN_WR_24BIT;
403 
404 			memset((void *)sc->sc_inten, 0x00ffffff,
405 			    sc->sc_highres ?
406 			      CG12_SIZE_COLOR24_HR : CG12_SIZE_COLOR24);
407 
408 			/*
409 			 * Use a direct colormap (ramp)
410 			 */
411 			cgtwelve_ramdac_wraddr(sc, 0);
412 			for (c = 0; c < 256; c++)
413 				sc->sc_ramdac->color = c | (c << 8) | (c << 16);
414 		}
415 	}
416 
417 	sc->sc_sunfb.sf_depth = depth;
418 }
419 
420 /*
421  * Return the address that would map the given device at the given
422  * offset, allowing for the given protection, or return -1 for error.
423  */
424 paddr_t
cgtwelve_mmap(void * v,off_t offset,int prot)425 cgtwelve_mmap(void *v, off_t offset, int prot)
426 {
427 	struct cgtwelve_softc *sc = v;
428 
429 	if (offset & PGOFSET || offset < 0)
430 		return (-1);
431 
432 	/*
433 	 * Note that mmap() will invoke this function only if we are NOT
434 	 * in emulation mode, so we can assume 32 bit mode safely here.
435 	 */
436 	if (offset < sc->sc_sunfb.sf_fbsize * 32) {
437 		return (bus_space_mmap(sc->sc_bustag, sc->sc_paddr, offset,
438 		    prot, BUS_SPACE_MAP_LINEAR));
439 	}
440 
441 	return (-1);
442 }
443 
444 /*
445  * Simple Bt462 programming routines.
446  */
447 
448 static __inline__ void
cgtwelve_ramdac_wraddr(struct cgtwelve_softc * sc,u_int32_t addr)449 cgtwelve_ramdac_wraddr(struct cgtwelve_softc *sc, u_int32_t addr)
450 {
451 	sc->sc_ramdac->addr_lo = (addr & 0xff);
452 	sc->sc_ramdac->addr_hi = ((addr >> 8) & 0xff);
453 }
454 
455 /*
456  * Shutdown hook used to restore PROM-compatible video mode on shutdown,
457  * so that the PROM prompt is visible again.
458  */
459 void
cgtwelve_prom(struct cgtwelve_softc * sc)460 cgtwelve_prom(struct cgtwelve_softc *sc)
461 {
462 	extern struct consdev consdev_prom;
463 
464 	if (sc->sc_sunfb.sf_depth != 1) {
465 		cgtwelve_reset(sc, 1);
466 
467 		/*
468 		 * Go back to prom output for the last few messages, so they
469 		 * will be displayed correctly.
470 		 */
471 		cn_tab = &consdev_prom;
472 	}
473 }
474