1 /*	$NetBSD: cpu.h,v 1.1 2006/04/07 14:21:18 cherry Exp $	*/
2 
3 /*-
4  * Copyright (c) 2006 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9  * NASA Ames Research Center, and by Charles M. Hannum.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. All advertising materials mentioning features or use of this software
20  *    must display the following acknowledgement:
21  *	This product includes software developed by the NetBSD
22  *	Foundation, Inc. and its contributors.
23  * 4. Neither the name of The NetBSD Foundation nor the names of its
24  *    contributors may be used to endorse or promote products derived
25  *    from this software without specific prior written permission.
26  *
27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37  * POSSIBILITY OF SUCH DAMAGE.
38  */
39 
40 
41 /*-
42  * Copyright (c) 1988 University of Utah.
43  * Copyright (c) 1982, 1990, 1993
44  *	The Regents of the University of California.  All rights reserved.
45  *
46  * This code is derived from software contributed to Berkeley by
47  * the Systems Programming Group of the University of Utah Computer
48  * Science Department.
49  *
50  * Redistribution and use in source and binary forms, with or without
51  * modification, are permitted provided that the following conditions
52  * are met:
53  * 1. Redistributions of source code must retain the above copyright
54  *    notice, this list of conditions and the following disclaimer.
55  * 2. Redistributions in binary form must reproduce the above copyright
56  *    notice, this list of conditions and the following disclaimer in the
57  *    documentation and/or other materials provided with the distribution.
58  * 4. Neither the name of the University nor the names of its contributors
59  *    may be used to endorse or promote products derived from this software
60  *    without specific prior written permission.
61  *
62  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
63  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
64  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
65  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
66  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
67  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
68  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
69  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
70  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
71  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
72  * SUCH DAMAGE.
73  *
74  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
75  *
76  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
77  */
78 
79 
80 #ifndef _IA64_CPU_H_
81 #define _IA64_CPU_H_
82 
83 #ifdef _KERNEL
84 #include <sys/cpu_data.h>
85 #include <sys/cc_microtime.h>
86 #include <machine/frame.h>
87 #include <machine/ia64_cpu.h>
88 
89 
90 struct cpu_info {
91 	struct device *ci_dev;		/* pointer to our device */
92 	struct cpu_info *ci_self;	/* self-pointer */
93 	/*
94 	 * Public members.
95 	 */
96 	struct lwp *ci_curlwp;		/* current owner of the processor */
97 	struct cpu_data ci_data;	/* MI per-cpu data */
98 	struct cc_microtime_state ci_cc;/* cc_microtime state */
99 	struct cpu_info *ci_next;	/* next cpu_info structure */
100 
101 	/* XXX: Todo */
102 	/*
103 	 * Private members.
104 	 */
105 	cpuid_t ci_cpuid;		/* our CPU ID */
106 	struct pmap *ci_pmap;		/* current pmap */
107 	struct lwp *ci_fpcurlwp;	/* current owner of the FPU */
108 	paddr_t ci_curpcb;		/* PA of current HW PCB */
109 	struct pcb *ci_idle_pcb;	/* our idle PCB */
110 	struct cpu_softc *ci_softc;	/* pointer to our device */
111 	u_long ci_want_resched;		/* preempt current process */
112 	u_long ci_intrdepth;		/* interrupt trap depth */
113 	struct trapframe *ci_db_regs;	/* registers for debuggers */
114 };
115 
116 
117 extern struct cpu_info cpu_info_primary;
118 
119 #ifdef MULTIPROCESSOR
120 /* XXX: TODO */
121 #else
122 #define	curcpu() (&cpu_info_primary)
123 #endif /* MULTIPROCESSOR */
124 
125 #define cpu_number() 0              /*XXX: FIXME */
126 
127 #define aston(p)		((p)->p_md.md_astpending = 1)
128 
129 #define	need_resched(ci)            /*XXX: FIXME */
130 
131 struct clockframe {
132 	struct trapframe cf_tf;
133 };
134 
135 #define	CLKF_PC(cf)		((cf)->cf_tf.tf_special.iip)
136 #define	CLKF_CPL(cf)		((cf)->cf_tf.tf_special.psr & IA64_PSR_CPL)
137 #define	CLKF_USERMODE(cf)	(CLKF_CPL(cf) != IA64_PSR_CPL_KERN)
138 #define	CLKF_BASEPRI(frame)	(0) /*XXX: CHECKME */
139 #define	CLKF_INTR(frame)	(curcpu()->ci_intrdepth)
140 
141 #define	TRAPF_PC(tf)		((tf)->tf_special.iip)
142 #define	TRAPF_CPL(tf)		((tf)->tf_special.psr & IA64_PSR_CPL)
143 #define	TRAPF_USERMODE(tf)	(TRAPF_CPL(tf) != IA64_PSR_CPL_KERN)
144 
145 
146 
147 
148 
149 
150 
151 /*
152  * Give a profiling tick to the current process when the user profiling
153  * buffer pages are invalid. XXX:Fixme.... On the ia64 I haven't yet figured
154  * out what to do about this.. XXX.
155  */
156 
157 
158 #define	need_proftick(p)
159 
160 /*
161  * Notify the current process (p) that it has a signal pending,
162  * process as soon as possible.
163  */
164 #define	signotify(p)		aston(p)
165 
166 #define setsoftclock()              /*XXX: FIXME */
167 
168 /* machdep.c */
169 int	cpu_maxproc(void); /*XXX: Fill in machdep.c */
170 
171 #define	cpu_proc_fork(p1, p2) /* XXX: Look into this. */
172 
173 
174 /* XXX: TODO: generic microtime support kern/kern_microtime.c
175  * #define microtime(tv)	cc_microtime(tv)
176  */
177 
178 
179 #endif /* _KERNEL_ */
180 #endif /* _IA64_CPU_H */
181