| /openbsd/sys/dev/pci/drm/amd/pm/powerplay/smumgr/ |
| H A D | tonga_smumgr.c | 248 uint32_t clock, SMU_VoltageLevel *voltage, uint32_t *mvdd) in tonga_get_dependency_volt_by_clk()
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| H A D | vegam_smumgr.c | 602 uint32_t clock, SMU_VoltageLevel *voltage, uint32_t *mvdd) in vegam_get_dependency_volt_by_clk()
720 uint32_t clock, SMU_SclkSetting *sclk_setting) in vegam_calculate_sclk_params()
790 static uint8_t vegam_get_sleep_divider_id_from_clock(uint32_t clock, in vegam_get_sleep_divider_id_from_clock()
810 uint32_t clock, struct SMU75_Discrete_GraphicsLevel *level) in vegam_populate_single_graphic_level()
964 uint32_t clock, struct SMU75_Discrete_MemoryLevel *mem_level) in vegam_calculate_mclk_params()
982 uint32_t clock, struct SMU75_Discrete_MemoryLevel *mem_level) in vegam_populate_single_memory_level()
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| /openbsd/sys/dev/pci/drm/amd/pm/swsmu/smu11/ |
| H A D | smu_v11_0.c | 793 smu_v11_0_get_max_sustainable_clock(struct smu_context *smu, uint32_t *clock, in smu_v11_0_get_max_sustainable_clock()
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| /openbsd/sys/dev/pci/drm/amd/pm/swsmu/smu13/ |
| H A D | smu_v13_0.c | 847 smu_v13_0_get_max_sustainable_clock(struct smu_context *smu, uint32_t *clock, in smu_v13_0_get_max_sustainable_clock()
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| /openbsd/sys/dev/pci/drm/apple/ |
| H A D | parser.c | 422 u64 clock = mul_u32_u32(pixels, vert->precise_sync_rate); in calculate_clock() local
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| /openbsd/sys/dev/pci/drm/display/ |
| H A D | drm_dp_mst_topology.c | 4708 int drm_dp_calc_pbn_mode(int clock, int bpp) in drm_dp_calc_pbn_mode()
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| /openbsd/sys/dev/pci/drm/ |
| H A D | drm_edid.c | 4234 unsigned int clock = cea_mode->clock; in cea_mode_alternate_clock() local
5322 int clock1, clock2, clock; in fixup_detailed_cea_mode_clock() local
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| /openbsd/sys/dev/pci/drm/i915/display/ |
| H A D | intel_audio.c | 86 int clock; member
93 int clock; member
153 int clock; member
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| H A D | intel_backlight.c | 1067 u32 mul, clock; in lpt_hz_to_pwm() local
1105 int clock; in i9xx_hz_to_pwm() local
1123 int clock; in i965_hz_to_pwm() local
1141 int mul, clock; in vlv_hz_to_pwm() local
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| H A D | intel_cdclk.c | 1856 int clock; in _bxt_set_cdclk() local
1983 int cdclk, clock, vco; in bxt_sanitize_cdclk() local
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| H A D | intel_cx0_phy.c | 1732 static int intel_c10_phy_check_hdmi_link_rate(int clock) in intel_c10_phy_check_hdmi_link_rate()
1974 static int intel_c20_phy_check_hdmi_link_rate(int clock) in intel_c20_phy_check_hdmi_link_rate()
1990 int intel_cx0_phy_check_hdmi_link_rate(struct intel_hdmi *hdmi, int clock) in intel_cx0_phy_check_hdmi_link_rate()
2052 static bool intel_c20_use_mplla(u32 clock) in intel_c20_use_mplla()
2139 static u8 intel_c20_get_dp_rate(u32 clock) in intel_c20_get_dp_rate()
2174 static u8 intel_c20_get_hdmi_rate(u32 clock) in intel_c20_get_hdmi_rate()
2194 static bool is_dp2(u32 clock) in is_dp2()
2203 static bool is_hdmi_frl(u32 clock) in is_hdmi_frl()
2226 static int intel_get_c20_custom_width(u32 clock, bool dp) in intel_get_c20_custom_width()
2776 u32 clock; in intel_mtl_tbt_calc_port_clock() local
[all …]
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| H A D | intel_ddi.c | 264 int clock = crtc_state->port_clock; in icl_pll_to_ddi_clk_sel() local
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| H A D | intel_display.c | 2796 struct dpll clock; in vlv_crtc_clock_get() local
2824 struct dpll clock; in chv_crtc_clock_get() local
3842 struct dpll clock; in i9xx_crtc_clock_get() local
7897 struct dpll clock = { in i830_enable_pipe() local
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| H A D | intel_display_types.h | 979 u32 clock; /* in KHz */ member
1006 u32 clock; /* in KHz */ member
1014 u32 clock; /* in kHz */ member
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| H A D | intel_dp.c | 1026 int clock, int bpc, in intel_dp_tmds_clock_valid()
1104 int hdisplay, int clock) in intel_dp_need_bigjoiner()
1347 int clock = crtc_state->hw.adjusted_mode.crtc_clock; in intel_dp_hdmi_compute_bpc() local
1486 int bpp, i, lane_count, clock = intel_dp_mode_clock(pipe_config, conn_state); in intel_dp_compute_link_config_wide() local
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| H A D | intel_dp_aux.c | 227 int try, clock = 0; in intel_dp_aux_xfer() local
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| H A D | intel_dpll.c | 373 const struct dpll *clock) in intel_pll_is_valid()
448 struct dpll clock; in i9xx_find_best_dpll() local
506 struct dpll clock; in pnv_find_best_dpll() local
562 struct dpll clock; in g4x_find_best_dpll() local
657 struct dpll clock; in vlv_find_best_dpll() local
716 struct dpll clock; in chv_find_best_dpll() local
787 const struct dpll *clock, in i9xx_update_pll_dividers()
807 const struct dpll *clock, in i9xx_compute_dpll()
886 const struct dpll *clock, in i8xx_compute_dpll()
1031 const struct dpll *clock, in ilk_update_pll_dividers()
[all …]
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| H A D | intel_dpll_mgr.c | 732 static unsigned hsw_wrpll_get_budget_for_freq(int clock) in hsw_wrpll_get_budget_for_freq()
857 hsw_ddi_calculate_wrpll(int clock /* in Hz */, in hsw_ddi_calculate_wrpll()
1000 int clock = crtc_state->port_clock; in hsw_ddi_lcpll_compute_dpll() local
1020 int clock = crtc_state->port_clock; in hsw_ddi_lcpll_get_dpll() local
1559 skl_ddi_calculate_wrpll(int clock /* in Hz */, in skl_ddi_calculate_wrpll()
2173 int clock = crtc_state->port_clock; in bxt_ddi_set_dpll_hw_state() local
2240 struct dpll clock; in bxt_ddi_pll_get_freq() local
2472 int clock; member
2565 int clock = crtc_state->port_clock; in icl_calc_dp_combo_pll() local
2858 int clock = crtc_state->port_clock; in icl_calc_mg_pll_state() local
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| H A D | intel_hdmi.c | 1831 int clock, bool respect_downstream_limits, in hdmi_port_clock_valid()
1879 int intel_hdmi_tmds_clock(int clock, int bpc, in intel_hdmi_tmds_clock()
1942 intel_hdmi_mode_clock_valid(struct drm_connector *connector, int clock, in intel_hdmi_mode_clock_valid()
1983 int clock = mode->clock; in intel_hdmi_mode_valid() local
2079 int clock, bool respect_downstream_limits) in intel_hdmi_compute_bpc()
2119 int bpc, clock = adjusted_mode->crtc_clock; in intel_hdmi_compute_clock() local
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| H A D | intel_pch_refclk.c | 140 static void lpt_compute_iclkip(struct iclkip_params *p, int clock) in lpt_compute_iclkip()
179 int clock = crtc_state->hw.adjusted_mode.crtc_clock; in lpt_program_iclkip() local
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| H A D | intel_sdvo.c | 1277 struct dpll *clock = &pipe_config->dpll; in i9xx_adjust_sdvo_tv_clock() local
1916 int clock = mode->clock; in intel_sdvo_mode_valid() local
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| H A D | intel_sdvo_regs.h | 78 u16 clock; /* pixel clock, in 10kHz units */ member
111 u16 clock; member
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| H A D | intel_snps_phy.c | 1982 int intel_snps_phy_check_hdmi_link_rate(int clock) in intel_snps_phy_check_hdmi_link_rate()
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| H A D | intel_tv.c | 317 u32 clock; member
995 int clock) in intel_tv_mode_to_mode()
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| H A D | intel_vblank.c | 138 u32 clock = mode->crtc_clock; in intel_crtc_scanlines_since_frame_timestamp() local
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