| /netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce120/ |
| H A D | amdgpu_dce120_hw_sequencer.c | 82 #define CNTL_ID(controller_id)\ argument
157 uint8_t controller_id, in dce120_enable_display_power_gating()
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| /netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/ |
| H A D | amdgpu_dce_abm.c | 63 static bool dce_abm_set_pipe(struct abm *abm, uint32_t controller_id) in dce_abm_set_pipe()
209 uint32_t controller_id) in dmcu_set_backlight_level()
427 unsigned int controller_id, in dce_abm_set_backlight_level_pwm()
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| /netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce112/ |
| H A D | amdgpu_dce112_hw_sequencer.c | 120 uint8_t controller_id, in dce112_enable_display_power_gating()
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| /netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce100/ |
| H A D | amdgpu_dce100_hw_sequencer.c | 79 uint8_t controller_id, in dce100_enable_display_power_gating()
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| /netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/bios/ |
| H A D | amdgpu_command_table.c | 1022 uint8_t controller_id; in set_pixel_clock_v5() local
1079 uint8_t controller_id; in set_pixel_clock_v6() local
1157 uint8_t controller_id; in set_pixel_clock_v7() local
1930 enum controller_id controller_id, in enable_crtc_v1()
1980 enum controller_id controller_id, in enable_crtc_mem_req_v1()
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| H A D | amdgpu_command_table2.c | 364 uint8_t controller_id; in set_pixel_clock_v7() local
608 enum controller_id controller_id, in enable_crtc_v1()
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| H A D | amdgpu_bios_parser2.c | 1104 enum controller_id controller_id, in bios_parser_enable_disp_power_gating()
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| H A D | amdgpu_bios_parser.c | 847 enum controller_id controller_id, in bios_parser_enable_disp_power_gating()
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| /netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/ |
| H A D | amdgpu_dc_surface.c | 108 uint32_t controller_id) in enable_surface_flip_reporting()
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| H A D | amdgpu_dc_link.c | 2341 unsigned int controller_id = 0; in dc_link_set_backlight_level() local
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| /netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/ |
| H A D | dce110_timing_generator.h | 103 enum controller_id controller_id; member
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| H A D | amdgpu_dce110_compressor.c | 466 unsigned int controller_id_to_index(enum controller_id controller_id) in controller_id_to_index()
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| H A D | amdgpu_dce110_hw_sequencer.c | 201 uint8_t controller_id, in dce110_enable_display_power_gating()
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| /netbsd/sys/external/bsd/drm2/dist/drm/amd/display/include/ |
| H A D | bios_parser_types.h | 132 enum controller_id controller_id; member
163 enum controller_id controller_id; member
211 enum controller_id controller_id; /* (Which CRTC uses this PLL) */ member
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| H A D | grph_object_id.h | 76 enum controller_id { enum
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| /netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/ |
| H A D | clock_source.h | 94 enum controller_id controller_id; member
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| /netbsd/sys/external/bsd/drm2/dist/drm/amd/include/ |
| H A D | dm_pp_interface.h | 53 uint32_t controller_id; member
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| /netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| H A D | amdgpu_dcn10_hw_sequencer.c | 2880 uint8_t controller_id, in dcn10_dummy_display_power_gating()
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