xref: /openbsd/sys/arch/arm/cortex/cortex.c (revision 130ea1ec)
1 /*	$OpenBSD: cortex.c,v 1.8 2024/08/18 15:50:47 deraadt Exp $	*/
2 /* $NetBSD: mainbus.c,v 1.3 2001/06/13 17:52:43 nathanw Exp $ */
3 
4 /*
5  * Copyright (c) 1994,1995 Mark Brinicombe.
6  * Copyright (c) 1994 Brini.
7  * All rights reserved.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed by Brini.
20  * 4. The name of the company nor the name of the author may be used to
21  *    endorse or promote products derived from this software without specific
22  *    prior written permission.
23  *
24  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
25  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
26  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
28  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34  * SUCH DAMAGE.
35  *
36  * RiscBSD kernel project
37  *
38  * mainbus.c
39  *
40  * mainbus configuration
41  *
42  * Created      : 15/12/94
43  */
44 
45 #include <sys/param.h>
46 #include <sys/systm.h>
47 #include <sys/kernel.h>
48 #include <sys/device.h>
49 #define _ARM32_BUS_DMA_PRIVATE
50 #include <machine/bus.h>
51 #include <arm/cpufunc.h>
52 #include <arm/armv7/armv7var.h>
53 #include <arm/cortex/cortex.h>
54 #include <arm/mainbus/mainbus.h>
55 
56 struct arm32_bus_dma_tag cortex_bus_dma_tag = {
57 	NULL,
58 	_bus_dmamap_create,
59 	_bus_dmamap_destroy,
60 	_bus_dmamap_load,
61 	_bus_dmamap_load_mbuf,
62 	_bus_dmamap_load_uio,
63 	_bus_dmamap_load_raw,
64 	_bus_dmamap_load_buffer,
65 	_bus_dmamap_unload,
66 	_bus_dmamap_sync,
67 	_bus_dmamem_alloc,
68 	_bus_dmamem_free,
69 	_bus_dmamem_map,
70 	_bus_dmamem_unmap,
71 	_bus_dmamem_mmap,
72 };
73 
74 /* Prototypes for functions provided */
75 
76 int  cortexmatch(struct device *, void *, void *);
77 void cortexattach(struct device *, struct device *, void *);
78 int  cortexprint(void *aux, const char *cortex);
79 int cortexsearch(struct device *,  void *, void *);
80 
81 /* attach and device structures for the device */
82 
83 const struct cfattach cortex_ca = {
84 	sizeof(struct device), cortexmatch, cortexattach
85 };
86 
87 struct cfdriver cortex_cd = {
88 	NULL, "cortex", DV_DULL
89 };
90 
91 /*
92  * int cortexmatch(struct device *parent, struct cfdata *cf, void *aux)
93  */
94 
95 int
cortexmatch(struct device * parent,void * cfdata,void * aux)96 cortexmatch(struct device *parent, void *cfdata, void *aux)
97 {
98 	union mainbus_attach_args *ma = aux;
99 	struct cfdata *cf = (struct cfdata *)cfdata;
100 	int cputype = cpufunc_id();
101 
102 	if (strcmp(cf->cf_driver->cd_name, ma->ma_name) != 0)
103 		return (0);
104 
105 	if ((cputype & CPU_ID_CORTEX_A7_MASK) == CPU_ID_CORTEX_A7 ||
106 	    (cputype & CPU_ID_CORTEX_A9_MASK) == CPU_ID_CORTEX_A9 ||
107 	    (cputype & CPU_ID_CORTEX_A15_MASK) == CPU_ID_CORTEX_A15 ||
108 	    (cputype & CPU_ID_CORTEX_A17_MASK) == CPU_ID_CORTEX_A17) {
109 		if (armv7_periphbase())
110 			return (1);
111 	}
112 
113 	return (0);
114 }
115 
116 /*
117  * void cortexattach(struct device *parent, struct device *self, void *aux)
118  *
119  * probe and attach all children
120  */
121 
122 void
cortexattach(struct device * parent,struct device * self,void * aux)123 cortexattach(struct device *parent, struct device *self, void *aux)
124 {
125 	printf("\n");
126 
127 	config_search(cortexsearch, self, aux);
128 }
129 
130 int
cortexsearch(struct device * parent,void * vcf,void * aux)131 cortexsearch(struct device *parent, void *vcf, void *aux)
132 {
133 	struct cortex_attach_args ca;
134 	struct cfdata *cf = vcf;
135 
136 	ca.ca_name = cf->cf_driver->cd_name;
137 	ca.ca_iot = &armv7_bs_tag;
138 	ca.ca_dmat = &cortex_bus_dma_tag;
139 	ca.ca_periphbase = armv7_periphbase();
140 
141 	/* allow for devices to be disabled in UKC */
142 	if ((*cf->cf_attach->ca_match)(parent, cf, &ca) == 0)
143 		return 0;
144 
145 	config_attach(parent, cf, &ca, cortexprint);
146 	return 1;
147 }
148 
149 /*
150  * int cortexprint(void *aux, const char *cortex)
151  *
152  * print routine used during config of children
153  */
154 
155 int
cortexprint(void * aux,const char * cortex)156 cortexprint(void *aux, const char *cortex)
157 {
158 	struct cortex_attach_args *ca = aux;
159 
160 	if (cortex != NULL)
161 		printf("%s at %s", ca->ca_name, cortex);
162 
163 	return (UNCONF);
164 }
165