1 /*
2 * QEMU CPU model
3 *
4 * Copyright (c) 2012-2014 SUSE LINUX Products GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
19 */
20
21 #include "qemu/osdep.h"
22 #include "qapi/error.h"
23 #include "hw/core/cpu.h"
24 #include "sysemu/hw_accel.h"
25 #include "qemu/log.h"
26 #include "qemu/main-loop.h"
27 #include "exec/log.h"
28 #include "exec/gdbstub.h"
29 #include "sysemu/tcg.h"
30 #include "hw/boards.h"
31 #include "hw/qdev-properties.h"
32 #include "trace.h"
33 #include "qemu/plugin.h"
34
cpu_by_arch_id(int64_t id)35 CPUState *cpu_by_arch_id(int64_t id)
36 {
37 CPUState *cpu;
38
39 CPU_FOREACH(cpu) {
40 CPUClass *cc = CPU_GET_CLASS(cpu);
41
42 if (cc->get_arch_id(cpu) == id) {
43 return cpu;
44 }
45 }
46 return NULL;
47 }
48
cpu_exists(int64_t id)49 bool cpu_exists(int64_t id)
50 {
51 return !!cpu_by_arch_id(id);
52 }
53
cpu_create(const char * typename)54 CPUState *cpu_create(const char *typename)
55 {
56 Error *err = NULL;
57 CPUState *cpu = CPU(object_new(typename));
58 if (!qdev_realize(DEVICE(cpu), NULL, &err)) {
59 error_report_err(err);
60 object_unref(OBJECT(cpu));
61 exit(EXIT_FAILURE);
62 }
63 return cpu;
64 }
65
66 /* Resetting the IRQ comes from across the code base so we take the
67 * BQL here if we need to. cpu_interrupt assumes it is held.*/
cpu_reset_interrupt(CPUState * cpu,int mask)68 void cpu_reset_interrupt(CPUState *cpu, int mask)
69 {
70 bool need_lock = !bql_locked();
71
72 if (need_lock) {
73 bql_lock();
74 }
75 cpu->interrupt_request &= ~mask;
76 if (need_lock) {
77 bql_unlock();
78 }
79 }
80
cpu_exit(CPUState * cpu)81 void cpu_exit(CPUState *cpu)
82 {
83 qatomic_set(&cpu->exit_request, 1);
84 /* Ensure cpu_exec will see the exit request after TCG has exited. */
85 smp_wmb();
86 qatomic_set(&cpu->neg.icount_decr.u16.high, -1);
87 }
88
cpu_common_gdb_read_register(CPUState * cpu,GByteArray * buf,int reg)89 static int cpu_common_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg)
90 {
91 return 0;
92 }
93
cpu_common_gdb_write_register(CPUState * cpu,uint8_t * buf,int reg)94 static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg)
95 {
96 return 0;
97 }
98
cpu_dump_state(CPUState * cpu,FILE * f,int flags)99 void cpu_dump_state(CPUState *cpu, FILE *f, int flags)
100 {
101 CPUClass *cc = CPU_GET_CLASS(cpu);
102
103 if (cc->dump_state) {
104 cpu_synchronize_state(cpu);
105 cc->dump_state(cpu, f, flags);
106 }
107 }
108
cpu_reset(CPUState * cpu)109 void cpu_reset(CPUState *cpu)
110 {
111 device_cold_reset(DEVICE(cpu));
112
113 trace_cpu_reset(cpu->cpu_index);
114 }
115
cpu_common_reset_hold(Object * obj,ResetType type)116 static void cpu_common_reset_hold(Object *obj, ResetType type)
117 {
118 CPUState *cpu = CPU(obj);
119 CPUClass *cc = CPU_GET_CLASS(cpu);
120
121 if (qemu_loglevel_mask(CPU_LOG_RESET)) {
122 qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
123 log_cpu_state(cpu, cc->reset_dump_flags);
124 }
125
126 cpu->interrupt_request = 0;
127 cpu->halted = cpu->start_powered_off;
128 cpu->mem_io_pc = 0;
129 cpu->icount_extra = 0;
130 qatomic_set(&cpu->neg.icount_decr.u32, 0);
131 cpu->neg.can_do_io = true;
132 cpu->exception_index = -1;
133 cpu->crash_occurred = false;
134 cpu->cflags_next_tb = -1;
135
136 cpu_exec_reset_hold(cpu);
137 }
138
cpu_common_has_work(CPUState * cs)139 static bool cpu_common_has_work(CPUState *cs)
140 {
141 return false;
142 }
143
cpu_class_by_name(const char * typename,const char * cpu_model)144 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
145 {
146 ObjectClass *oc;
147 CPUClass *cc;
148
149 oc = object_class_by_name(typename);
150 cc = CPU_CLASS(oc);
151 assert(cc->class_by_name);
152 assert(cpu_model);
153 oc = cc->class_by_name(cpu_model);
154 if (object_class_dynamic_cast(oc, typename) &&
155 !object_class_is_abstract(oc)) {
156 return oc;
157 }
158
159 return NULL;
160 }
161
cpu_common_parse_features(const char * typename,char * features,Error ** errp)162 static void cpu_common_parse_features(const char *typename, char *features,
163 Error **errp)
164 {
165 char *val;
166 static bool cpu_globals_initialized;
167 /* Single "key=value" string being parsed */
168 char *featurestr = features ? strtok(features, ",") : NULL;
169
170 /* should be called only once, catch invalid users */
171 assert(!cpu_globals_initialized);
172 cpu_globals_initialized = true;
173
174 while (featurestr) {
175 val = strchr(featurestr, '=');
176 if (val) {
177 GlobalProperty *prop = g_new0(typeof(*prop), 1);
178 *val = 0;
179 val++;
180 prop->driver = typename;
181 prop->property = g_strdup(featurestr);
182 prop->value = g_strdup(val);
183 qdev_prop_register_global(prop);
184 } else {
185 error_setg(errp, "Expected key=value format, found %s.",
186 featurestr);
187 return;
188 }
189 featurestr = strtok(NULL, ",");
190 }
191 }
192
193 #ifdef CONFIG_PLUGIN
qemu_plugin_vcpu_init__async(CPUState * cpu,run_on_cpu_data unused)194 static void qemu_plugin_vcpu_init__async(CPUState *cpu, run_on_cpu_data unused)
195 {
196 qemu_plugin_vcpu_init_hook(cpu);
197 }
198 #endif
199
cpu_common_realizefn(DeviceState * dev,Error ** errp)200 static void cpu_common_realizefn(DeviceState *dev, Error **errp)
201 {
202 CPUState *cpu = CPU(dev);
203 Object *machine = qdev_get_machine();
204
205 /* qdev_get_machine() can return something that's not TYPE_MACHINE
206 * if this is one of the user-only emulators; in that case there's
207 * no need to check the ignore_memory_transaction_failures board flag.
208 */
209 if (object_dynamic_cast(machine, TYPE_MACHINE)) {
210 MachineClass *mc = MACHINE_GET_CLASS(machine);
211
212 if (mc) {
213 cpu->ignore_memory_transaction_failures =
214 mc->ignore_memory_transaction_failures;
215 }
216 }
217
218 if (dev->hotplugged) {
219 cpu_synchronize_post_init(cpu);
220 cpu_resume(cpu);
221 }
222
223 /* Plugin initialization must wait until the cpu start executing code */
224 #ifdef CONFIG_PLUGIN
225 if (tcg_enabled()) {
226 cpu->plugin_state = qemu_plugin_create_vcpu_state();
227 async_run_on_cpu(cpu, qemu_plugin_vcpu_init__async, RUN_ON_CPU_NULL);
228 }
229 #endif
230
231 /* NOTE: latest generic point where the cpu is fully realized */
232 }
233
cpu_common_unrealizefn(DeviceState * dev)234 static void cpu_common_unrealizefn(DeviceState *dev)
235 {
236 CPUState *cpu = CPU(dev);
237
238 /* Call the plugin hook before clearing the cpu is fully unrealized */
239 if (tcg_enabled()) {
240 qemu_plugin_vcpu_exit_hook(cpu);
241 }
242
243 /* NOTE: latest generic point before the cpu is fully unrealized */
244 cpu_exec_unrealizefn(cpu);
245 }
246
cpu_common_initfn(Object * obj)247 static void cpu_common_initfn(Object *obj)
248 {
249 CPUState *cpu = CPU(obj);
250
251 gdb_init_cpu(cpu);
252 cpu->cpu_index = UNASSIGNED_CPU_INDEX;
253 cpu->cluster_index = UNASSIGNED_CLUSTER_INDEX;
254 /* user-mode doesn't have configurable SMP topology */
255 /* the default value is changed by qemu_init_vcpu() for system-mode */
256 cpu->nr_cores = 1;
257 cpu->nr_threads = 1;
258 cpu->cflags_next_tb = -1;
259
260 qemu_mutex_init(&cpu->work_mutex);
261 qemu_lockcnt_init(&cpu->in_ioctl_lock);
262 QSIMPLEQ_INIT(&cpu->work_list);
263 QTAILQ_INIT(&cpu->breakpoints);
264 QTAILQ_INIT(&cpu->watchpoints);
265
266 cpu_exec_initfn(cpu);
267 }
268
cpu_common_finalize(Object * obj)269 static void cpu_common_finalize(Object *obj)
270 {
271 CPUState *cpu = CPU(obj);
272
273 g_array_free(cpu->gdb_regs, TRUE);
274 qemu_lockcnt_destroy(&cpu->in_ioctl_lock);
275 qemu_mutex_destroy(&cpu->work_mutex);
276 }
277
cpu_common_get_arch_id(CPUState * cpu)278 static int64_t cpu_common_get_arch_id(CPUState *cpu)
279 {
280 return cpu->cpu_index;
281 }
282
cpu_common_class_init(ObjectClass * klass,void * data)283 static void cpu_common_class_init(ObjectClass *klass, void *data)
284 {
285 DeviceClass *dc = DEVICE_CLASS(klass);
286 ResettableClass *rc = RESETTABLE_CLASS(klass);
287 CPUClass *k = CPU_CLASS(klass);
288
289 k->parse_features = cpu_common_parse_features;
290 k->get_arch_id = cpu_common_get_arch_id;
291 k->has_work = cpu_common_has_work;
292 k->gdb_read_register = cpu_common_gdb_read_register;
293 k->gdb_write_register = cpu_common_gdb_write_register;
294 set_bit(DEVICE_CATEGORY_CPU, dc->categories);
295 dc->realize = cpu_common_realizefn;
296 dc->unrealize = cpu_common_unrealizefn;
297 rc->phases.hold = cpu_common_reset_hold;
298 cpu_class_init_props(dc);
299 /*
300 * Reason: CPUs still need special care by board code: wiring up
301 * IRQs, adding reset handlers, halting non-first CPUs, ...
302 */
303 dc->user_creatable = false;
304 }
305
306 static const TypeInfo cpu_type_info = {
307 .name = TYPE_CPU,
308 .parent = TYPE_DEVICE,
309 .instance_size = sizeof(CPUState),
310 .instance_init = cpu_common_initfn,
311 .instance_finalize = cpu_common_finalize,
312 .abstract = true,
313 .class_size = sizeof(CPUClass),
314 .class_init = cpu_common_class_init,
315 };
316
cpu_register_types(void)317 static void cpu_register_types(void)
318 {
319 type_register_static(&cpu_type_info);
320 }
321
322 type_init(cpu_register_types)
323