1 /* Definitions for GCC. Part of the machine description for CRIS.
2 Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
3 Contributed by Axis Communications. Written by Hans-Peter Nilsson.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GCC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "rtl.h"
25 #include "regs.h"
26 #include "hard-reg-set.h"
27 #include "real.h"
28 #include "insn-config.h"
29 #include "conditions.h"
30 #include "insn-attr.h"
31 #include "flags.h"
32 #include "tree.h"
33 #include "expr.h"
34 #include "except.h"
35 #include "function.h"
36 #include "toplev.h"
37 #include "recog.h"
38 #include "tm_p.h"
39 #include "debug.h"
40 #include "output.h"
41 #include "target.h"
42 #include "target-def.h"
43 #include "ggc.h"
44
45 /* Usable when we have an amount to add or subtract, and want the
46 optimal size of the insn. */
47 #define ADDITIVE_SIZE_MODIFIER(size) \
48 ((size) <= 63 ? "q" : (size) <= 255 ? "u.b" : (size) <= 65535 ? "u.w" : ".d")
49
50 #define ASSERT_PLT_UNSPEC(x) \
51 do \
52 { \
53 if (XEXP (x, 1) != NULL_RTX \
54 || (GET_CODE (XVECEXP (x, 0, 0)) != SYMBOL_REF \
55 && GET_CODE (XVECEXP (x, 0, 0)) != LABEL_REF)) \
56 abort (); \
57 } while (0)
58
59 #define LOSE_AND_RETURN(msgid, x) \
60 do \
61 { \
62 cris_operand_lossage (msgid, x); \
63 return; \
64 } while (0)
65
66 /* Per-function machine data. */
67 struct machine_function GTY(())
68 {
69 int needs_return_address_on_stack;
70 };
71
72 /* This little fix suppresses the 'u' or 's' when '%e' in assembly
73 pattern. */
74 static char cris_output_insn_is_bound = 0;
75
76 /* This one suppresses printing out the "rPIC+" in
77 "rPIC+sym:GOTOFF+offset" when doing PIC. For a PLT symbol, it
78 suppresses outputting it as [rPIC+sym:GOTPLT] and outputs similarly
79 just the "sym:GOTOFF" part. */
80 static int cris_pic_sympart_only = 0;
81
82 /* Fix for reg_overlap_mentioned_p. */
83 static int cris_reg_overlap_mentioned_p PARAMS ((rtx, rtx));
84
85 static void cris_print_base PARAMS ((rtx, FILE *));
86
87 static void cris_print_index PARAMS ((rtx, FILE *));
88
89 static struct machine_function * cris_init_machine_status PARAMS ((void));
90
91 static int cris_initial_frame_pointer_offset PARAMS ((void));
92
93 static int saved_regs_mentioned PARAMS ((rtx));
94
95 static void cris_target_asm_function_prologue
96 PARAMS ((FILE *, HOST_WIDE_INT));
97
98 static void cris_target_asm_function_epilogue
99 PARAMS ((FILE *, HOST_WIDE_INT));
100
101 static void cris_encode_section_info PARAMS ((tree, int));
102 static void cris_operand_lossage PARAMS ((const char *, rtx));
103
104 static void cris_asm_output_mi_thunk
105 PARAMS ((FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree));
106
107
108 /* The function cris_target_asm_function_epilogue puts the last insn to
109 output here. It always fits; there won't be a symbol operand. Used in
110 delay_slots_for_epilogue and function_epilogue. */
111 static char save_last[80];
112
113 /* This is the argument from the "-max-stack-stackframe=" option. */
114 const char *cris_max_stackframe_str;
115
116 /* This is the argument from the "-march=" option. */
117 const char *cris_cpu_str;
118
119 /* This is the argument from the "-mtune=" option. */
120 const char *cris_tune_str;
121
122 /* This is the argument from the "-melinux-stacksize=" option. */
123 const char *cris_elinux_stacksize_str;
124
125 /* This is the parsed result of the "-max-stack-stackframe=" option. If
126 it (still) is zero, then there was no such option given. */
127 int cris_max_stackframe = 0;
128
129 /* This is the parsed result of the "-march=" option, if given. */
130 int cris_cpu_version = CRIS_DEFAULT_CPU_VERSION;
131
132 #undef TARGET_ASM_ALIGNED_HI_OP
133 #define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
134 #undef TARGET_ASM_ALIGNED_SI_OP
135 #define TARGET_ASM_ALIGNED_SI_OP "\t.dword\t"
136 #undef TARGET_ASM_ALIGNED_DI_OP
137 #define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t"
138
139 /* We need to define these, since the 2byte, 4byte, 8byte op:s are only
140 available in ELF. These "normal" pseudos do not have any alignment
141 constraints or side-effects. */
142 #undef TARGET_ASM_UNALIGNED_HI_OP
143 #define TARGET_ASM_UNALIGNED_HI_OP TARGET_ASM_ALIGNED_HI_OP
144
145 #undef TARGET_ASM_UNALIGNED_SI_OP
146 #define TARGET_ASM_UNALIGNED_SI_OP TARGET_ASM_ALIGNED_SI_OP
147
148 #undef TARGET_ASM_UNALIGNED_DI_OP
149 #define TARGET_ASM_UNALIGNED_DI_OP TARGET_ASM_ALIGNED_DI_OP
150
151 #undef TARGET_ASM_FUNCTION_PROLOGUE
152 #define TARGET_ASM_FUNCTION_PROLOGUE cris_target_asm_function_prologue
153
154 #undef TARGET_ASM_FUNCTION_EPILOGUE
155 #define TARGET_ASM_FUNCTION_EPILOGUE cris_target_asm_function_epilogue
156
157 #undef TARGET_ENCODE_SECTION_INFO
158 #define TARGET_ENCODE_SECTION_INFO cris_encode_section_info
159
160 #undef TARGET_ASM_OUTPUT_MI_THUNK
161 #define TARGET_ASM_OUTPUT_MI_THUNK cris_asm_output_mi_thunk
162 #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
163 #define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall
164
165 struct gcc_target targetm = TARGET_INITIALIZER;
166
167 /* Predicate functions. */
168
169 /* This checks a part of an address, the one that is not a plain register
170 for an addressing mode using BDAP.
171 Allowed operands is either:
172 a) a register
173 b) a CONST operand (but not a symbol when generating PIC)
174 c) a [r] or [r+] in SImode, or sign-extend from HI or QI. */
175
176 int
cris_bdap_operand(op,mode)177 cris_bdap_operand (op, mode)
178 rtx op;
179 enum machine_mode mode;
180 {
181 register enum rtx_code code = GET_CODE (op);
182
183 if (mode != SImode && (mode != VOIDmode || GET_MODE (op) != VOIDmode))
184 return 0;
185
186 /* Just return whether this is a simple register or constant. */
187 if (register_operand (op, mode)
188 || (CONSTANT_P (op) && !(flag_pic && cris_symbol (op))))
189 return 1;
190
191 /* Is it a [r] or possibly a [r+]? */
192 if (code == MEM)
193 {
194 rtx tem = XEXP (op, 0);
195
196 if (mode == SImode
197 && (register_operand (tem, SImode)
198 || (GET_CODE (tem) == POST_INC
199 && register_operand (XEXP (tem, 0), SImode))))
200 return 1;
201 else
202 return 0;
203 }
204
205 /* Perhaps a sign-extended mem: [r].(b|w) or [r+].(b|w)? */
206 if (code == SIGN_EXTEND)
207 {
208 rtx tem = XEXP (op, 0);
209
210 if (GET_CODE (tem) != MEM)
211 return 0;
212
213 tem = XEXP (tem, 0);
214 if (mode == SImode
215 && (register_operand (tem, SImode)
216 || (GET_CODE (tem) == POST_INC
217 && register_operand (XEXP (tem, 0), SImode))))
218 return 1;
219 else
220 return 0;
221 }
222
223 return 0;
224 }
225
226 /* This is similar to cris_bdap_operand:
227 It checks a part of an address, the one that is not a plain register
228 for an addressing mode using BDAP *or* BIAP.
229 Allowed operands is either:
230 a) a register
231 b) a CONST operand (but not a symbol when generating PIC)
232 c) a mult of (1, 2 or 4) and a register
233 d) a [r] or [r+] in SImode, or sign-extend from HI or QI. */
234
235 int
cris_bdap_biap_operand(op,mode)236 cris_bdap_biap_operand (op, mode)
237 rtx op;
238 enum machine_mode mode;
239 {
240 register enum rtx_code code = GET_CODE (op);
241 rtx reg;
242 rtx val;
243
244 /* Check for bdap operand. */
245 if (cris_bdap_operand (op, mode))
246 return 1;
247
248 if (mode != SImode && (mode != VOIDmode || GET_MODE (op) != VOIDmode))
249 return 0;
250
251 /* Check that we're looking at a BIAP operand. */
252 if (code != MULT)
253 return 0;
254
255 /* Canonicalize register and multiplicand. */
256 if (GET_CODE (XEXP (op, 0)) == CONST_INT)
257 {
258 val = XEXP (op, 0);
259 reg = XEXP (op, 1);
260 }
261 else
262 {
263 val = XEXP (op, 1);
264 reg = XEXP (op, 0);
265 }
266
267 /* Check that the operands are correct after canonicalization. */
268 if (! register_operand (reg, SImode) || GET_CODE (val) != CONST_INT)
269 return 0;
270
271 /* Check that the multiplicand has a valid value. */
272 if ((code == MULT
273 && (INTVAL (val) == 1 || INTVAL (val) == 2 || INTVAL (val) == 4)))
274 return 1;
275
276 return 0;
277 }
278
279 /* Check if MODE is same as mode for X, and X is PLUS, MINUS, IOR or
280 AND or UMIN. */
281
282 int
cris_orthogonal_operator(x,mode)283 cris_orthogonal_operator (x, mode)
284 rtx x;
285 enum machine_mode mode;
286 {
287 enum rtx_code code = GET_CODE (x);
288
289 if (mode == VOIDmode)
290 mode = GET_MODE (x);
291
292 return (GET_MODE (x) == mode
293 && (code == PLUS || code == MINUS
294 || code == IOR || code == AND || code == UMIN));
295 }
296
297 /* Check if MODE is same as mode for X, and X is PLUS, IOR or AND or
298 UMIN. */
299
300 int
cris_commutative_orth_op(x,mode)301 cris_commutative_orth_op (x, mode)
302 rtx x;
303 enum machine_mode mode;
304 {
305 enum rtx_code code = GET_CODE (x);
306
307 if (mode == VOIDmode)
308 mode = GET_MODE (x);
309
310 return (GET_MODE (x) == mode &&
311 (code == PLUS
312 || code == IOR || code == AND || code == UMIN));
313 }
314
315 /* Check if MODE is same as mode for X, and X is PLUS or MINUS or UMIN.
316 By the name, you might think we should include MULT. We don't because
317 it doesn't accept the same addressing modes as the others (ony
318 registers) and there's also the problem of handling TARGET_MUL_BUG. */
319
320 int
cris_operand_extend_operator(x,mode)321 cris_operand_extend_operator (x, mode)
322 rtx x;
323 enum machine_mode mode;
324 {
325 enum rtx_code code = GET_CODE (x);
326
327 if (mode == VOIDmode)
328 mode = GET_MODE (x);
329
330 return (GET_MODE (x) == mode
331 && (code == PLUS || code == MINUS || code == UMIN));
332 }
333
334 /* Check if MODE is same as mode for X, and X is PLUS or MINUS. */
335
336 int
cris_additive_operand_extend_operator(x,mode)337 cris_additive_operand_extend_operator (x, mode)
338 rtx x;
339 enum machine_mode mode;
340 {
341 enum rtx_code code = GET_CODE (x);
342
343 if (mode == VOIDmode)
344 mode = GET_MODE (x);
345
346 return (GET_MODE (x) == mode
347 && (code == PLUS || code == MINUS));
348 }
349
350 /* Check to see if MODE is same as mode for X, and X is SIGN_EXTEND or
351 ZERO_EXTEND. */
352
353 int
cris_extend_operator(x,mode)354 cris_extend_operator (x, mode)
355 rtx x;
356 enum machine_mode mode;
357 {
358 enum rtx_code code = GET_CODE (x);
359
360 if (mode == VOIDmode)
361 mode = GET_MODE (x);
362
363 return
364 (GET_MODE (x) == mode && (code == SIGN_EXTEND || code == ZERO_EXTEND));
365 }
366
367 /* Check to see if MODE is same as mode for X, and X is PLUS or BOUND. */
368
369 int
cris_plus_or_bound_operator(x,mode)370 cris_plus_or_bound_operator (x, mode)
371 rtx x;
372 enum machine_mode mode;
373 {
374 enum rtx_code code = GET_CODE (x);
375
376 if (mode == VOIDmode)
377 mode = GET_MODE (x);
378
379 return
380 (GET_MODE (x) == mode && (code == UMIN || code == PLUS));
381 }
382
383 /* Used as an operator to get a handle on a already-known-valid MEM rtx:es
384 (no need to validate the address), where some address expression parts
385 have their own match_operand. */
386
387 int
cris_mem_op(rtx x,enum machine_mode mode)388 cris_mem_op (rtx x, enum machine_mode mode)
389 {
390 if (mode == VOIDmode)
391 mode = GET_MODE (x);
392
393 return GET_MODE (x) == mode && GET_CODE (x) == MEM;
394 }
395
396 /* Since with -fPIC, not all symbols are valid PIC symbols or indeed
397 general_operands, we have to have a predicate that matches it for the
398 "movsi" expander. */
399
400 int
cris_general_operand_or_symbol(op,mode)401 cris_general_operand_or_symbol (op, mode)
402 rtx op;
403 enum machine_mode mode;
404 {
405 return general_operand (op, mode)
406 || (CONSTANT_P (op) && cris_symbol (op));
407 }
408
409 /* Since a PIC symbol without a GOT entry is not a general_operand, we
410 have to have a predicate that matches it. We use this in the expanded
411 "movsi" anonymous pattern for PIC symbols. */
412
413 int
cris_general_operand_or_gotless_symbol(op,mode)414 cris_general_operand_or_gotless_symbol (op, mode)
415 rtx op;
416 enum machine_mode mode;
417 {
418 return general_operand (op, mode)
419 || (CONSTANT_P (op) && cris_gotless_symbol (op));
420 }
421
422 /* Since a PLT symbol is not a general_operand, we have to have a
423 predicate that matches it when we need it. We use this in the expanded
424 "call" and "call_value" anonymous patterns. */
425
426 int
cris_general_operand_or_plt_symbol(op,mode)427 cris_general_operand_or_plt_symbol (op, mode)
428 rtx op;
429 enum machine_mode mode;
430 {
431 return general_operand (op, mode)
432 || (GET_CODE (op) == CONST
433 && GET_CODE (XEXP (op, 0)) == UNSPEC
434 && !TARGET_AVOID_GOTPLT);
435 }
436
437 /* This matches a (MEM (general_operand)) or
438 (MEM (cris_general_operand_or_symbol)). The second one isn't a valid
439 memory_operand, so we need this predicate to recognize call
440 destinations before we change them to a PLT operand (by wrapping in
441 UNSPEC 0). */
442
443 int
cris_mem_call_operand(op,mode)444 cris_mem_call_operand (op, mode)
445 rtx op;
446 enum machine_mode mode;
447 {
448 rtx xmem;
449
450 if (GET_CODE (op) != MEM)
451 return 0;
452
453 if (memory_operand (op, mode))
454 return 1;
455
456 xmem = XEXP (op, 0);
457
458 return cris_general_operand_or_symbol (xmem, GET_MODE (op));
459 }
460
461 /* The CONDITIONAL_REGISTER_USAGE worker. */
462
463 void
cris_conditional_register_usage()464 cris_conditional_register_usage ()
465 {
466 /* FIXME: This isn't nice. We should be able to use that register for
467 something else if the PIC table isn't needed. */
468 if (flag_pic)
469 fixed_regs[PIC_OFFSET_TABLE_REGNUM]
470 = call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
471 }
472
473 /* Return current_function_uses_pic_offset_table. For use in cris.md,
474 since some generated files do not include function.h. */
475
476 int
cris_cfun_uses_pic_table()477 cris_cfun_uses_pic_table ()
478 {
479 return current_function_uses_pic_offset_table;
480 }
481
482 /* Given an rtx, return the text string corresponding to the CODE of X.
483 Intended for use in the assembly language output section of a
484 define_insn. */
485
486 const char *
cris_op_str(x)487 cris_op_str (x)
488 rtx x;
489 {
490 cris_output_insn_is_bound = 0;
491 switch (GET_CODE (x))
492 {
493 case PLUS:
494 return "add";
495 break;
496
497 case MINUS:
498 return "sub";
499 break;
500
501 case MULT:
502 /* This function is for retrieving a part of an instruction name for
503 an operator, for immediate output. If that ever happens for
504 MULT, we need to apply TARGET_MUL_BUG in the caller. Make sure
505 we notice. */
506 abort ();
507 break;
508
509 case DIV:
510 return "div";
511 break;
512
513 case AND:
514 return "and";
515 break;
516
517 case IOR:
518 return "or";
519 break;
520
521 case XOR:
522 return "xor";
523 break;
524
525 case NOT:
526 return "not";
527 break;
528
529 case ASHIFT:
530 return "lsl";
531 break;
532
533 case LSHIFTRT:
534 return "lsr";
535 break;
536
537 case ASHIFTRT:
538 return "asr";
539 break;
540
541 case UMIN:
542 /* Used to control the sign/zero-extend character for the 'e' modifier.
543 BOUND has none. */
544 cris_output_insn_is_bound = 1;
545 return "bound";
546 break;
547
548 default:
549 return "Unknown operator";
550 break;
551 }
552 }
553
554 /* Emit an error message when we're in an asm, and a fatal error for
555 "normal" insns. Formatted output isn't easily implemented, since we
556 use output_operand_lossage to output the actual message and handle the
557 categorization of the error. */
558
559 static void
cris_operand_lossage(msgid,op)560 cris_operand_lossage (msgid, op)
561 const char *msgid;
562 rtx op;
563 {
564 debug_rtx (op);
565 output_operand_lossage ("%s", msgid);
566 }
567
568 /* Print an index part of an address to file. */
569
570 static void
cris_print_index(index,file)571 cris_print_index (index, file)
572 rtx index;
573 FILE * file;
574 {
575 rtx inner = XEXP (index, 0);
576
577 /* Make the index "additive" unless we'll output a negative number, in
578 which case the sign character is free (as in free beer). */
579 if (GET_CODE (index) != CONST_INT || INTVAL (index) >= 0)
580 putc ('+', file);
581
582 if (REG_P (index))
583 fprintf (file, "$%s.b", reg_names[REGNO (index)]);
584 else if (CONSTANT_P (index))
585 cris_output_addr_const (file, index);
586 else if (GET_CODE (index) == MULT)
587 {
588 fprintf (file, "$%s.",
589 reg_names[REGNO (XEXP (index, 0))]);
590
591 putc (INTVAL (XEXP (index, 1)) == 2 ? 'w' : 'd', file);
592 }
593 else if (GET_CODE (index) == SIGN_EXTEND &&
594 GET_CODE (inner) == MEM)
595 {
596 rtx inner_inner = XEXP (inner, 0);
597
598 if (GET_CODE (inner_inner) == POST_INC)
599 {
600 fprintf (file, "[$%s+].",
601 reg_names[REGNO (XEXP (inner_inner, 0))]);
602 putc (GET_MODE (inner) == HImode ? 'w' : 'b', file);
603 }
604 else
605 {
606 fprintf (file, "[$%s].", reg_names[REGNO (inner_inner)]);
607
608 putc (GET_MODE (inner) == HImode ? 'w' : 'b', file);
609 }
610 }
611 else if (GET_CODE (index) == MEM)
612 {
613 if (GET_CODE (inner) == POST_INC)
614 fprintf (file, "[$%s+].d", reg_names[REGNO (XEXP (inner, 0))]);
615 else
616 fprintf (file, "[$%s].d", reg_names[REGNO (inner)]);
617 }
618 else
619 cris_operand_lossage ("unexpected index-type in cris_print_index",
620 index);
621 }
622
623 /* Print a base rtx of an address to file. */
624
625 static void
cris_print_base(base,file)626 cris_print_base (base, file)
627 rtx base;
628 FILE *file;
629 {
630 if (REG_P (base))
631 fprintf (file, "$%s", reg_names[REGNO (base)]);
632 else if (GET_CODE (base) == POST_INC)
633 fprintf (file, "$%s+", reg_names[REGNO (XEXP (base, 0))]);
634 else
635 cris_operand_lossage ("unexpected base-type in cris_print_base",
636 base);
637 }
638
639 /* Usable as a guard in expressions. */
640
641 int
cris_fatal(arg)642 cris_fatal (arg)
643 char *arg;
644 {
645 internal_error (arg);
646
647 /* We'll never get here; this is just to appease compilers. */
648 return 0;
649 }
650
651 /* Textual function prologue. */
652
653 static void
cris_target_asm_function_prologue(file,size)654 cris_target_asm_function_prologue (file, size)
655 FILE *file;
656 HOST_WIDE_INT size;
657 {
658 int regno;
659
660 /* Shorten the used name for readability. */
661 int cfoa_size = current_function_outgoing_args_size;
662 int last_movem_reg = -1;
663 int doing_dwarf = dwarf2out_do_frame ();
664 int framesize;
665 int faked_args_size = 0;
666 int cfa_write_offset = 0;
667 char *cfa_label = NULL;
668 int return_address_on_stack
669 = regs_ever_live[CRIS_SRP_REGNUM]
670 || cfun->machine->needs_return_address_on_stack != 0;
671
672 /* Don't do anything if no prologues or epilogues are wanted. */
673 if (!TARGET_PROLOGUE_EPILOGUE)
674 return;
675
676 if (size < 0)
677 abort ();
678
679 /* Align the size to what's best for the CPU model. */
680 if (TARGET_STACK_ALIGN)
681 size = TARGET_ALIGN_BY_32 ? (size + 3) & ~3 : (size + 1) & ~1;
682
683 if (current_function_pretend_args_size)
684 {
685 int pretend = current_function_pretend_args_size;
686 for (regno = CRIS_FIRST_ARG_REG + CRIS_MAX_ARGS_IN_REGS - 1;
687 pretend > 0;
688 regno--, pretend -= 4)
689 {
690 fprintf (file, "\tpush $%s\n", reg_names[regno]);
691 faked_args_size += 4;
692 }
693 }
694
695 framesize = faked_args_size;
696
697 if (doing_dwarf)
698 {
699 /* FIXME: Slightly redundant calculation, as we do the same in
700 pieces below. This offset must be the total adjustment of the
701 stack-pointer. We can then def_cfa call at the end of this
702 function with the current implementation of execute_cfa_insn, but
703 that wouldn't really be clean. */
704
705 int cfa_offset
706 = faked_args_size
707 + (return_address_on_stack ? 4 : 0)
708 + (frame_pointer_needed ? 4 : 0);
709
710 int cfa_reg;
711
712 if (frame_pointer_needed)
713 cfa_reg = FRAME_POINTER_REGNUM;
714 else
715 {
716 cfa_reg = STACK_POINTER_REGNUM;
717 cfa_offset += cris_initial_frame_pointer_offset ();
718 }
719
720 cfa_label = dwarf2out_cfi_label ();
721 dwarf2out_def_cfa (cfa_label, cfa_reg, cfa_offset);
722
723 cfa_write_offset = - faked_args_size - 4;
724 }
725
726 /* Save SRP if not a leaf function. */
727 if (return_address_on_stack)
728 {
729 fprintf (file, "\tPush $srp\n");
730 framesize += 4;
731
732 if (doing_dwarf)
733 {
734 dwarf2out_return_save (cfa_label, cfa_write_offset);
735 cfa_write_offset -= 4;
736 }
737 }
738
739 /* Set up frame pointer if needed. */
740 if (frame_pointer_needed)
741 {
742 fprintf (file, "\tpush $%s\n\tmove.d $sp,$%s\n",
743 reg_names[FRAME_POINTER_REGNUM],
744 reg_names[FRAME_POINTER_REGNUM]);
745 framesize += 4;
746
747 if (doing_dwarf)
748 {
749 dwarf2out_reg_save (cfa_label, FRAME_POINTER_REGNUM,
750 cfa_write_offset);
751 cfa_write_offset -= 4;
752 }
753 }
754
755 /* Local vars are located above saved regs. */
756 cfa_write_offset -= size;
757
758 /* Get a contiguous sequence of registers, starting with r0, that need
759 to be saved. */
760 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
761 {
762 if ((((regs_ever_live[regno]
763 && !call_used_regs[regno])
764 || (regno == (int) PIC_OFFSET_TABLE_REGNUM
765 && (current_function_uses_pic_offset_table
766 /* It is saved anyway, if there would be a gap. */
767 || (flag_pic
768 && regs_ever_live[regno + 1]
769 && !call_used_regs[regno + 1]))))
770 && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed)
771 && regno != CRIS_SRP_REGNUM)
772 || (current_function_calls_eh_return
773 && (regno == EH_RETURN_DATA_REGNO (0)
774 || regno == EH_RETURN_DATA_REGNO (1)
775 || regno == EH_RETURN_DATA_REGNO (2)
776 || regno == EH_RETURN_DATA_REGNO (3))))
777 {
778 /* Check if movem may be used for registers so far. */
779 if (regno == last_movem_reg + 1)
780 /* Yes, update next expected register. */
781 last_movem_reg++;
782 else
783 {
784 /* We cannot use movem for all registers. We have to flush
785 any movem:ed registers we got so far. */
786 if (last_movem_reg != -1)
787 {
788 /* It is a win to use a side-effect assignment for
789 64 <= size <= 128. But side-effect on movem was
790 not usable for CRIS v0..3. Also only do it if
791 side-effects insns are allowed. */
792 if ((last_movem_reg + 1) * 4 + size >= 64
793 && (last_movem_reg + 1) * 4 + size <= 128
794 && cris_cpu_version >= CRIS_CPU_SVINTO
795 && TARGET_SIDE_EFFECT_PREFIXES)
796 fprintf (file, "\tmovem $%s,[$sp=$sp-%d]\n",
797 reg_names[last_movem_reg],
798 (last_movem_reg + 1) * 4 + size);
799 else
800 {
801 /* Avoid printing multiple subsequent sub:s for sp. */
802 fprintf (file, "\tsub%s %d,$sp\n",
803 ADDITIVE_SIZE_MODIFIER ((last_movem_reg + 1)
804 * 4 + size),
805 (last_movem_reg + 1) * 4 + size);
806
807 fprintf (file, "\tmovem $%s,[$sp]\n",
808 reg_names[last_movem_reg]);
809 }
810
811 framesize += (last_movem_reg + 1) * 4 + size;
812
813 if (TARGET_PDEBUG)
814 fprintf (file, "; frame %d, #regs %d, bytes %d args %d\n",
815 size,
816 last_movem_reg + 1,
817 (last_movem_reg + 1) * 4,
818 current_function_args_size);
819
820 last_movem_reg = -1;
821 size = 0;
822 }
823 else if (size > 0)
824 {
825 /* Local vars on stack, but there are no movem:s.
826 Just allocate space. */
827 fprintf (file, "\tSub%s %d,$sp\n",
828 ADDITIVE_SIZE_MODIFIER (size),
829 size);
830 framesize += size;
831 size = 0;
832 }
833
834 fprintf (file, "\tPush $%s\n", reg_names[regno]);
835 framesize += 4;
836 }
837
838 if (doing_dwarf)
839 {
840 /* Registers are stored lowest numbered at highest address,
841 which matches the loop order; we just need to update the
842 write-offset. */
843 dwarf2out_reg_save (cfa_label, regno, cfa_write_offset);
844 cfa_write_offset -= 4;
845 }
846 }
847 }
848
849 /* Check after, if we can movem all registers. This is the normal
850 case. */
851 if (last_movem_reg != -1)
852 {
853 /* Side-effect assignment on movem was not supported for CRIS v0..3,
854 and don't do it if we're asked not to.
855
856 The movem is already accounted for, for unwind. */
857
858 if ((last_movem_reg + 1) * 4 + size >= 64
859 && (last_movem_reg + 1) * 4 + size <= 128
860 && cris_cpu_version >= CRIS_CPU_SVINTO
861 && TARGET_SIDE_EFFECT_PREFIXES)
862 fprintf (file, "\tmovem $%s,[$sp=$sp-%d]\n",
863 reg_names[last_movem_reg],
864 (last_movem_reg+1) * 4 + size);
865 else
866 {
867 /* Avoid printing multiple subsequent sub:s for sp. FIXME:
868 Clean up the conditional expression. */
869 fprintf (file, "\tsub%s %d,$sp\n",
870 ADDITIVE_SIZE_MODIFIER ((last_movem_reg + 1) * 4 + size),
871 (last_movem_reg + 1) * 4 + size);
872 /* To be compatible with v0..v3 means we do not use an assignment
873 addressing mode with movem. We normally don't need that
874 anyway. It would only be slightly more efficient for 64..128
875 bytes frame size. */
876 fprintf (file, "\tmovem $%s,[$sp]\n", reg_names[last_movem_reg]);
877 }
878
879 framesize += (last_movem_reg + 1) * 4 + size;
880
881 if (TARGET_PDEBUG)
882 fprintf (file, "; frame %d, #regs %d, bytes %d args %d\n",
883 size,
884 last_movem_reg + 1,
885 (last_movem_reg + 1) * 4,
886 current_function_args_size);
887
888 /* We have to put outgoing argument space after regs. */
889 if (cfoa_size)
890 {
891 /* This does not need to be accounted for, for unwind. */
892
893 fprintf (file, "\tSub%s %d,$sp\n",
894 ADDITIVE_SIZE_MODIFIER (cfoa_size),
895 cfoa_size);
896 framesize += cfoa_size;
897 }
898 }
899 else if ((size + cfoa_size) > 0)
900 {
901 /* This does not need to be accounted for, for unwind. */
902
903 /* Local vars on stack, and we could not use movem. Add a sub here. */
904 fprintf (file, "\tSub%s %d,$sp\n",
905 ADDITIVE_SIZE_MODIFIER (size + cfoa_size),
906 cfoa_size + size);
907 framesize += size + cfoa_size;
908 }
909
910 /* Set up the PIC register. */
911 if (current_function_uses_pic_offset_table)
912 fprintf (file, "\tmove.d $pc,$%s\n\tsub.d .:GOTOFF,$%s\n",
913 reg_names[PIC_OFFSET_TABLE_REGNUM],
914 reg_names[PIC_OFFSET_TABLE_REGNUM]);
915
916 if (TARGET_PDEBUG)
917 fprintf (file,
918 "; parm #%d @ %d; frame %d, FP-SP is %d; leaf: %s%s; fp %s, outg: %d arg %d\n",
919 CRIS_MAX_ARGS_IN_REGS + 1, FIRST_PARM_OFFSET (0),
920 get_frame_size (),
921 cris_initial_frame_pointer_offset (),
922 leaf_function_p () ? "yes" : "no",
923 return_address_on_stack ? "no" :"yes",
924 frame_pointer_needed ? "yes" : "no",
925 cfoa_size, current_function_args_size);
926
927 if (cris_max_stackframe && framesize > cris_max_stackframe)
928 warning ("stackframe too big: %d bytes", framesize);
929 }
930
931 /* Return nonzero if there are regs mentioned in the insn that are not all
932 in the call_used regs. This is part of the decision whether an insn
933 can be put in the epilogue. */
934
935 static int
saved_regs_mentioned(x)936 saved_regs_mentioned (x)
937 rtx x;
938 {
939 int i;
940 const char *fmt;
941 RTX_CODE code;
942
943 /* Mainly stolen from refers_to_regno_p in rtlanal.c. */
944
945 code = GET_CODE (x);
946
947 switch (code)
948 {
949 case REG:
950 i = REGNO (x);
951 return !call_used_regs[i];
952
953 case SUBREG:
954 /* If this is a SUBREG of a hard reg, we can see exactly which
955 registers are being modified. Otherwise, handle normally. */
956 i = REGNO (SUBREG_REG (x));
957 return !call_used_regs[i];
958
959 default:
960 ;
961 }
962
963 fmt = GET_RTX_FORMAT (code);
964 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
965 {
966 if (fmt[i] == 'e')
967 {
968 if (saved_regs_mentioned (XEXP (x, i)))
969 return 1;
970 }
971 else if (fmt[i] == 'E')
972 {
973 int j;
974 for (j = XVECLEN (x, i) - 1; j >=0; j--)
975 if (saved_regs_mentioned (XEXP (x, i)))
976 return 1;
977 }
978 }
979
980 return 0;
981 }
982
983 /* Figure out if the insn may be put in the epilogue. */
984
985 int
cris_eligible_for_epilogue_delay(insn)986 cris_eligible_for_epilogue_delay (insn)
987 rtx insn;
988 {
989 /* First of all, it must be as slottable as for a delayed branch insn. */
990 if (get_attr_slottable (insn) != SLOTTABLE_YES)
991 return 0;
992
993 /* It must not refer to the stack pointer (may be valid for some cases
994 that I can't think of). */
995 if (reg_mentioned_p (stack_pointer_rtx, PATTERN (insn)))
996 return 0;
997
998 /* The frame pointer will be restored in the epilogue, before the
999 "ret", so it can't be referred to. */
1000 if (frame_pointer_needed
1001 && reg_mentioned_p (frame_pointer_rtx, PATTERN (insn)))
1002 return 0;
1003
1004 /* All saved regs are restored before the delayed insn.
1005 This means that we cannot have any instructions that mention the
1006 registers that are restored by the epilogue. */
1007 if (saved_regs_mentioned (PATTERN (insn)))
1008 return 0;
1009
1010 /* It seems to be ok. */
1011 return 1;
1012 }
1013
1014 /* Return the number of delay-slots in the epilogue: return 1 if it
1015 contains "ret", else 0. */
1016
1017 int
cris_delay_slots_for_epilogue()1018 cris_delay_slots_for_epilogue ()
1019 {
1020 /* Check if we use a return insn, which we only do for leaf functions.
1021 Else there is no slot to fill. */
1022 if (regs_ever_live[CRIS_SRP_REGNUM]
1023 || cfun->machine->needs_return_address_on_stack != 0)
1024 return 0;
1025
1026 /* By calling function_epilogue with the same parameters as from gcc
1027 we can get info about if the epilogue can fill the delay-slot by itself.
1028 If it is filled from the epilogue, then the corresponding string
1029 is in save_last.
1030 This depends on that the "size" argument to function_epilogue
1031 always is get_frame_size.
1032 FIXME: Kludgy. At least make it a separate function that is not
1033 misnamed or abuses the stream parameter. */
1034 cris_target_asm_function_epilogue (NULL, get_frame_size ());
1035
1036 if (*save_last)
1037 return 1;
1038 return 0;
1039 }
1040
1041 /* Textual function epilogue. When file is NULL, it serves doubly as
1042 a test for whether the epilogue can fill any "ret" delay-slots by
1043 itself by storing the delay insn in save_last. */
1044
1045 static void
cris_target_asm_function_epilogue(file,size)1046 cris_target_asm_function_epilogue (file, size)
1047 FILE *file;
1048 HOST_WIDE_INT size;
1049 {
1050 int regno;
1051 int last_movem_reg = -1;
1052 rtx insn = get_last_insn ();
1053 int argspace_offset = current_function_outgoing_args_size;
1054 int pretend = current_function_pretend_args_size;
1055 int return_address_on_stack
1056 = regs_ever_live[CRIS_SRP_REGNUM]
1057 || cfun->machine->needs_return_address_on_stack != 0;
1058
1059 save_last[0] = 0;
1060
1061 if (file && !TARGET_PROLOGUE_EPILOGUE)
1062 return;
1063
1064 if (TARGET_PDEBUG && file)
1065 fprintf (file, ";;\n");
1066
1067 /* Align byte count of stack frame. */
1068 if (TARGET_STACK_ALIGN)
1069 size = TARGET_ALIGN_BY_32 ? (size + 3) & ~3 : (size + 1) & ~1;
1070
1071 /* If the last insn was a BARRIER, we don't have to write any code,
1072 then all returns were covered by "return" insns. */
1073 if (GET_CODE (insn) == NOTE)
1074 insn = prev_nonnote_insn (insn);
1075 if (insn
1076 && (GET_CODE (insn) == BARRIER
1077 /* We must make sure that the insn really is a "return" and
1078 not a conditional branch. Try to match the return exactly,
1079 and if it doesn't match, assume it is a conditional branch
1080 (and output an epilogue). */
1081 || (GET_CODE (insn) == JUMP_INSN
1082 && GET_CODE (PATTERN (insn)) == RETURN)))
1083 {
1084 if (TARGET_PDEBUG && file)
1085 fprintf (file, ";;;;;\n");
1086 return;
1087 }
1088
1089 /* Check how many saved regs we can movem. They start at r0 and must
1090 be contiguous. */
1091 for (regno = 0;
1092 regno < FIRST_PSEUDO_REGISTER;
1093 regno++)
1094 if ((((regs_ever_live[regno]
1095 && !call_used_regs[regno])
1096 || (regno == (int) PIC_OFFSET_TABLE_REGNUM
1097 && (current_function_uses_pic_offset_table
1098 /* It is saved anyway, if there would be a gap. */
1099 || (flag_pic
1100 && regs_ever_live[regno + 1]
1101 && !call_used_regs[regno + 1]))))
1102 && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed)
1103 && regno != CRIS_SRP_REGNUM)
1104 || (current_function_calls_eh_return
1105 && (regno == EH_RETURN_DATA_REGNO (0)
1106 || regno == EH_RETURN_DATA_REGNO (1)
1107 || regno == EH_RETURN_DATA_REGNO (2)
1108 || regno == EH_RETURN_DATA_REGNO (3))))
1109
1110 {
1111 if (regno == last_movem_reg + 1)
1112 last_movem_reg++;
1113 else
1114 break;
1115 }
1116
1117 for (regno = FIRST_PSEUDO_REGISTER - 1;
1118 regno > last_movem_reg;
1119 regno--)
1120 if ((((regs_ever_live[regno]
1121 && !call_used_regs[regno])
1122 || (regno == (int) PIC_OFFSET_TABLE_REGNUM
1123 && (current_function_uses_pic_offset_table
1124 /* It is saved anyway, if there would be a gap. */
1125 || (flag_pic
1126 && regs_ever_live[regno + 1]
1127 && !call_used_regs[regno + 1]))))
1128 && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed)
1129 && regno != CRIS_SRP_REGNUM)
1130 || (current_function_calls_eh_return
1131 && (regno == EH_RETURN_DATA_REGNO (0)
1132 || regno == EH_RETURN_DATA_REGNO (1)
1133 || regno == EH_RETURN_DATA_REGNO (2)
1134 || regno == EH_RETURN_DATA_REGNO (3))))
1135 {
1136 if (argspace_offset)
1137 {
1138 /* There is an area for outgoing parameters located before
1139 the saved registers. We have to adjust for that. */
1140 if (file)
1141 fprintf (file, "\tAdd%s %d,$sp\n",
1142 ADDITIVE_SIZE_MODIFIER (argspace_offset),
1143 argspace_offset);
1144
1145 /* Make sure we only do this once. */
1146 argspace_offset = 0;
1147 }
1148
1149 /* Flush previous non-movem:ed registers. */
1150 if (*save_last && file)
1151 fprintf (file, save_last);
1152 sprintf (save_last, "\tPop $%s\n", reg_names[regno]);
1153 }
1154
1155 if (last_movem_reg != -1)
1156 {
1157 if (argspace_offset)
1158 {
1159 /* Adjust for the outgoing parameters area, if that's not
1160 handled yet. */
1161 if (*save_last && file)
1162 {
1163 fprintf (file, save_last);
1164 *save_last = 0;
1165 }
1166
1167 if (file)
1168 fprintf (file, "\tAdd%s %d,$sp\n",
1169 ADDITIVE_SIZE_MODIFIER (argspace_offset),
1170 argspace_offset);
1171 argspace_offset = 0;
1172 }
1173 /* Flush previous non-movem:ed registers. */
1174 else if (*save_last && file)
1175 fprintf (file, save_last);
1176 sprintf (save_last, "\tmovem [$sp+],$%s\n", reg_names[last_movem_reg]);
1177 }
1178
1179 /* Restore frame pointer if necessary. */
1180 if (frame_pointer_needed)
1181 {
1182 if (*save_last && file)
1183 fprintf (file, save_last);
1184
1185 if (file)
1186 fprintf (file, "\tmove.d $%s,$sp\n",
1187 reg_names[FRAME_POINTER_REGNUM]);
1188 sprintf (save_last, "\tPop $%s\n",
1189 reg_names[FRAME_POINTER_REGNUM]);
1190 }
1191 else
1192 {
1193 /* If there was no frame-pointer to restore sp from, we must
1194 explicitly deallocate local variables. */
1195
1196 /* Handle space for outgoing parameters that hasn't been handled
1197 yet. */
1198 size += argspace_offset;
1199
1200 if (size)
1201 {
1202 if (*save_last && file)
1203 fprintf (file, save_last);
1204
1205 sprintf (save_last, "\tadd%s %d,$sp\n",
1206 ADDITIVE_SIZE_MODIFIER (size), size);
1207 }
1208
1209 /* If the size was not in the range for a "quick", we must flush
1210 it here. */
1211 if (size > 63)
1212 {
1213 if (file)
1214 fprintf (file, save_last);
1215 *save_last = 0;
1216 }
1217 }
1218
1219 /* If this function has no pushed register parameters
1220 (stdargs/varargs), and if it is not a leaf function, then we can
1221 just jump-return here. */
1222 if (return_address_on_stack && pretend == 0)
1223 {
1224 if (*save_last && file)
1225 fprintf (file, save_last);
1226 *save_last = 0;
1227
1228 if (file)
1229 {
1230 if (current_function_calls_eh_return)
1231 {
1232 /* The installed EH-return address is in *this* frame, so we
1233 need to pop it before we return. */
1234 fprintf (file, "\tpop $srp\n");
1235 fprintf (file, "\tret\n");
1236 fprintf (file, "\tadd.d $%s,$sp\n", reg_names[CRIS_STACKADJ_REG]);
1237 }
1238 else
1239 fprintf (file, "\tJump [$sp+]\n");
1240
1241 /* Do a sanity check to avoid generating invalid code. */
1242 if (current_function_epilogue_delay_list)
1243 internal_error ("allocated but unused delay list in epilogue");
1244 }
1245 return;
1246 }
1247
1248 /* Rather than add current_function_calls_eh_return conditions
1249 everywhere in the following code (and not be able to test it
1250 thoroughly), assert the assumption that all usage of
1251 __builtin_eh_return are handled above. */
1252 if (current_function_calls_eh_return)
1253 internal_error ("unexpected function type needing stack adjustment for\
1254 __builtin_eh_return");
1255
1256 /* If we pushed some register parameters, then adjust the stack for
1257 them. */
1258 if (pretend)
1259 {
1260 /* Since srp is stored on the way, we need to restore it first. */
1261 if (return_address_on_stack)
1262 {
1263 if (*save_last && file)
1264 fprintf (file, save_last);
1265 *save_last = 0;
1266
1267 if (file)
1268 fprintf (file, "\tpop $srp\n");
1269 }
1270
1271 if (*save_last && file)
1272 fprintf (file, save_last);
1273
1274 sprintf (save_last, "\tadd%s %d,$sp\n",
1275 ADDITIVE_SIZE_MODIFIER (pretend), pretend);
1276 }
1277
1278 /* Here's where we have a delay-slot we need to fill. */
1279 if (file && current_function_epilogue_delay_list)
1280 {
1281 /* If gcc has allocated an insn for the epilogue delay slot, but
1282 things were arranged so we now thought we could do it
1283 ourselves, don't forget to flush that insn. */
1284 if (*save_last)
1285 fprintf (file, save_last);
1286
1287 fprintf (file, "\tRet\n");
1288
1289 /* Output the delay-slot-insn the mandated way. */
1290 final_scan_insn (XEXP (current_function_epilogue_delay_list, 0),
1291 file, 1, -2, 1);
1292 }
1293 else if (file)
1294 {
1295 fprintf (file, "\tRet\n");
1296
1297 /* If the GCC did not do it, we have to use whatever insn we have,
1298 or a nop. */
1299 if (*save_last)
1300 fprintf (file, save_last);
1301 else
1302 fprintf (file, "\tnOp\n");
1303 }
1304 }
1305
1306 /* The PRINT_OPERAND worker. */
1307
1308 void
cris_print_operand(file,x,code)1309 cris_print_operand (file, x, code)
1310 FILE *file;
1311 rtx x;
1312 int code;
1313 {
1314 rtx operand = x;
1315
1316 /* Size-strings corresponding to MULT expressions. */
1317 static const char *const mults[] = { "BAD:0", ".b", ".w", "BAD:3", ".d" };
1318
1319 /* New code entries should just be added to the switch below. If
1320 handling is finished, just return. If handling was just a
1321 modification of the operand, the modified operand should be put in
1322 "operand", and then do a break to let default handling
1323 (zero-modifier) output the operand. */
1324
1325 switch (code)
1326 {
1327 case 'b':
1328 /* Print the unsigned supplied integer as if it was signed
1329 and < 0, i.e print 255 or 65535 as -1, 254, 65534 as -2, etc. */
1330 if (GET_CODE (x) != CONST_INT
1331 || ! CONST_OK_FOR_LETTER_P (INTVAL (x), 'O'))
1332 LOSE_AND_RETURN ("invalid operand for 'b' modifier", x);
1333 fprintf (file, "%d", INTVAL (x)| (INTVAL (x) <= 255 ? ~255 : ~65535));
1334 return;
1335
1336 case 'x':
1337 /* Print assembler code for operator. */
1338 fprintf (file, "%s", cris_op_str (operand));
1339 return;
1340
1341 case 'v':
1342 /* Print the operand without the PIC register. */
1343 if (! flag_pic || ! CONSTANT_P (x) || ! cris_gotless_symbol (x))
1344 LOSE_AND_RETURN ("invalid operand for 'v' modifier", x);
1345 cris_pic_sympart_only++;
1346 cris_output_addr_const (file, x);
1347 cris_pic_sympart_only--;
1348 return;
1349
1350 case 'P':
1351 /* Print the PIC register. Applied to a GOT-less PIC symbol for
1352 sanity. */
1353 if (! flag_pic || ! CONSTANT_P (x) || ! cris_gotless_symbol (x))
1354 LOSE_AND_RETURN ("invalid operand for 'P' modifier", x);
1355 fprintf (file, "$%s", reg_names [PIC_OFFSET_TABLE_REGNUM]);
1356 return;
1357
1358 case 'p':
1359 /* Adjust a power of two to its log2. */
1360 if (GET_CODE (x) != CONST_INT || exact_log2 (INTVAL (x)) < 0 )
1361 LOSE_AND_RETURN ("invalid operand for 'p' modifier", x);
1362 fprintf (file, "%d", exact_log2 (INTVAL (x)));
1363 return;
1364
1365 case 's':
1366 /* For an integer, print 'b' or 'w' if <= 255 or <= 65535
1367 respectively. This modifier also terminates the inhibiting
1368 effects of the 'x' modifier. */
1369 cris_output_insn_is_bound = 0;
1370 if (GET_MODE (x) == VOIDmode && GET_CODE (x) == CONST_INT)
1371 {
1372 if (INTVAL (x) >= 0)
1373 {
1374 if (INTVAL (x) <= 255)
1375 putc ('b', file);
1376 else if (INTVAL (x) <= 65535)
1377 putc ('w', file);
1378 else
1379 putc ('d', file);
1380 }
1381 else
1382 putc ('d', file);
1383 return;
1384 }
1385
1386 /* For a non-integer, print the size of the operand. */
1387 putc ((GET_MODE (x) == SImode || GET_MODE (x) == SFmode)
1388 ? 'd' : GET_MODE (x) == HImode ? 'w'
1389 : GET_MODE (x) == QImode ? 'b'
1390 /* If none of the above, emit an erroneous size letter. */
1391 : 'X',
1392 file);
1393 return;
1394
1395 case 'z':
1396 /* Const_int: print b for -127 <= x <= 255,
1397 w for -32768 <= x <= 65535, else abort. */
1398 if (GET_CODE (x) != CONST_INT
1399 || INTVAL (x) < -32768 || INTVAL (x) > 65535)
1400 LOSE_AND_RETURN ("invalid operand for 'z' modifier", x);
1401 putc (INTVAL (x) >= -128 && INTVAL (x) <= 255 ? 'b' : 'w', file);
1402 return;
1403
1404 case '#':
1405 /* Output a 'nop' if there's nothing for the delay slot.
1406 This method stolen from the sparc files. */
1407 if (dbr_sequence_length () == 0)
1408 fputs ("\n\tnop", file);
1409 return;
1410
1411 case '!':
1412 /* Output directive for alignment padded with "nop" insns.
1413 Optimizing for size, it's plain 4-byte alignment, otherwise we
1414 align the section to a cache-line (32 bytes) and skip at max 2
1415 bytes, i.e. we skip if it's the last insn on a cache-line. The
1416 latter is faster by a small amount (for two test-programs 99.6%
1417 and 99.9%) and larger by a small amount (ditto 100.1% and
1418 100.2%). This is supposed to be the simplest yet performance-
1419 wise least intrusive way to make sure the immediately following
1420 (supposed) muls/mulu insn isn't located at the end of a
1421 cache-line. */
1422 if (TARGET_MUL_BUG)
1423 fputs (optimize_size
1424 ? ".p2alignw 2,0x050f\n\t"
1425 : ".p2alignw 5,0x050f,2\n\t", file);
1426 return;
1427
1428 case 'H':
1429 /* Print high (most significant) part of something. */
1430 switch (GET_CODE (operand))
1431 {
1432 case CONST_INT:
1433 if (HOST_BITS_PER_WIDE_INT == 32)
1434 /* Sign-extension from a normal int to a long long. */
1435 fprintf (file, INTVAL (operand) < 0 ? "-1" : "0");
1436 else
1437 fprintf (file, "0x%x", (unsigned int)(INTVAL (x) >> 31 >> 1));
1438 return;
1439
1440 case CONST_DOUBLE:
1441 /* High part of a long long constant. */
1442 if (GET_MODE (operand) == VOIDmode)
1443 {
1444 fprintf (file, "0x%x", CONST_DOUBLE_HIGH (x));
1445 return;
1446 }
1447 else
1448 LOSE_AND_RETURN ("invalid operand for 'H' modifier", x);
1449
1450 case REG:
1451 /* Print reg + 1. Check that there's not an attempt to print
1452 high-parts of registers like stack-pointer or higher. */
1453 if (REGNO (operand) > STACK_POINTER_REGNUM - 2)
1454 LOSE_AND_RETURN ("bad register", operand);
1455 fprintf (file, "$%s", reg_names[REGNO (operand) + 1]);
1456 return;
1457
1458 case MEM:
1459 /* Adjust memory address to high part. */
1460 {
1461 rtx adj_mem = operand;
1462 int size
1463 = GET_MODE_BITSIZE (GET_MODE (operand)) / BITS_PER_UNIT;
1464
1465 /* Adjust so we can use two SImode in DImode.
1466 Calling adj_offsettable_operand will make sure it is an
1467 offsettable address. Don't do this for a postincrement
1468 though; it should remain as it was. */
1469 if (GET_CODE (XEXP (adj_mem, 0)) != POST_INC)
1470 adj_mem
1471 = adjust_address (adj_mem, GET_MODE (adj_mem), size / 2);
1472
1473 output_address (XEXP (adj_mem, 0));
1474 return;
1475 }
1476
1477 default:
1478 LOSE_AND_RETURN ("invalid operand for 'H' modifier", x);
1479 }
1480
1481 case 'L':
1482 /* Strip the MEM expression. */
1483 operand = XEXP (operand, 0);
1484 break;
1485
1486 case 'e':
1487 /* Print 's' if operand is SIGN_EXTEND or 'u' if ZERO_EXTEND unless
1488 cris_output_insn_is_bound is nonzero. */
1489 if (GET_CODE (operand) != SIGN_EXTEND
1490 && GET_CODE (operand) != ZERO_EXTEND
1491 && GET_CODE (operand) != CONST_INT)
1492 LOSE_AND_RETURN ("invalid operand for 'e' modifier", x);
1493
1494 if (cris_output_insn_is_bound)
1495 {
1496 cris_output_insn_is_bound = 0;
1497 return;
1498 }
1499
1500 putc (GET_CODE (operand) == SIGN_EXTEND
1501 || (GET_CODE (operand) == CONST_INT && INTVAL (operand) < 0)
1502 ? 's' : 'u', file);
1503 return;
1504
1505 case 'm':
1506 /* Print the size letter of the inner element. We can do it by
1507 calling ourselves with the 's' modifier. */
1508 if (GET_CODE (operand) != SIGN_EXTEND && GET_CODE (operand) != ZERO_EXTEND)
1509 LOSE_AND_RETURN ("invalid operand for 'm' modifier", x);
1510 cris_print_operand (file, XEXP (operand, 0), 's');
1511 return;
1512
1513 case 'M':
1514 /* Print the least significant part of operand. */
1515 if (GET_CODE (operand) == CONST_DOUBLE)
1516 {
1517 fprintf (file, "0x%x", CONST_DOUBLE_LOW (x));
1518 return;
1519 }
1520 else if (HOST_BITS_PER_WIDE_INT > 32 && GET_CODE (operand) == CONST_INT)
1521 {
1522 fprintf (file, "0x%x",
1523 INTVAL (x) & ((unsigned int) 0x7fffffff * 2 + 1));
1524 return;
1525 }
1526 /* Otherwise the least significant part equals the normal part,
1527 so handle it normally. */
1528 break;
1529
1530 case 'A':
1531 /* When emitting an add for the high part of a DImode constant, we
1532 want to use addq for 0 and adds.w for -1. */
1533 if (GET_CODE (operand) != CONST_INT)
1534 LOSE_AND_RETURN ("invalid operand for 'A' modifier", x);
1535 fprintf (file, INTVAL (operand) < 0 ? "adds.w" : "addq");
1536 return;
1537
1538 case 'D':
1539 /* When emitting an sub for the high part of a DImode constant, we
1540 want to use subq for 0 and subs.w for -1. */
1541 if (GET_CODE (operand) != CONST_INT)
1542 LOSE_AND_RETURN ("invalid operand for 'D' modifier", x);
1543 fprintf (file, INTVAL (operand) < 0 ? "subs.w" : "subq");
1544 return;
1545
1546 case 'S':
1547 /* Print the operand as the index-part of an address.
1548 Easiest way out is to use cris_print_index. */
1549 cris_print_index (operand, file);
1550 return;
1551
1552 case 'T':
1553 /* Print the size letter for an operand to a MULT, which must be a
1554 const_int with a suitable value. */
1555 if (GET_CODE (operand) != CONST_INT || INTVAL (operand) > 4)
1556 LOSE_AND_RETURN ("invalid operand for 'T' modifier", x);
1557 fprintf (file, "%s", mults[INTVAL (operand)]);
1558 return;
1559
1560 case 0:
1561 /* No code, print as usual. */
1562 break;
1563
1564 default:
1565 LOSE_AND_RETURN ("invalid operand modifier letter", x);
1566 }
1567
1568 /* Print an operand as without a modifier letter. */
1569 switch (GET_CODE (operand))
1570 {
1571 case REG:
1572 if (REGNO (operand) > 15)
1573 internal_error ("internal error: bad register: %d", REGNO (operand));
1574 fprintf (file, "$%s", reg_names[REGNO (operand)]);
1575 return;
1576
1577 case MEM:
1578 output_address (XEXP (operand, 0));
1579 return;
1580
1581 case CONST_DOUBLE:
1582 if (GET_MODE (operand) == VOIDmode)
1583 /* A long long constant. */
1584 output_addr_const (file, operand);
1585 else
1586 {
1587 /* Only single precision is allowed as plain operands the
1588 moment. FIXME: REAL_VALUE_FROM_CONST_DOUBLE isn't
1589 documented. */
1590 REAL_VALUE_TYPE r;
1591 long l;
1592
1593 /* FIXME: Perhaps check overflow of the "single". */
1594 REAL_VALUE_FROM_CONST_DOUBLE (r, operand);
1595 REAL_VALUE_TO_TARGET_SINGLE (r, l);
1596
1597 fprintf (file, "0x%lx", l);
1598 }
1599 return;
1600
1601 case UNSPEC:
1602 ASSERT_PLT_UNSPEC (operand);
1603 /* Fall through. */
1604
1605 case CONST:
1606 cris_output_addr_const (file, operand);
1607 return;
1608
1609 case MULT:
1610 case ASHIFT:
1611 {
1612 /* For a (MULT (reg X) const_int) we output "rX.S". */
1613 int i = GET_CODE (XEXP (operand, 1)) == CONST_INT
1614 ? INTVAL (XEXP (operand, 1)) : INTVAL (XEXP (operand, 0));
1615 rtx reg = GET_CODE (XEXP (operand, 1)) == CONST_INT
1616 ? XEXP (operand, 0) : XEXP (operand, 1);
1617
1618 if (GET_CODE (reg) != REG
1619 || (GET_CODE (XEXP (operand, 0)) != CONST_INT
1620 && GET_CODE (XEXP (operand, 1)) != CONST_INT))
1621 LOSE_AND_RETURN ("unexpected multiplicative operand", x);
1622
1623 cris_print_base (reg, file);
1624 fprintf (file, ".%c",
1625 i == 0 || (i == 1 && GET_CODE (operand) == MULT) ? 'b'
1626 : i == 4 ? 'd'
1627 : (i == 2 && GET_CODE (operand) == MULT) || i == 1 ? 'w'
1628 : 'd');
1629 return;
1630 }
1631
1632 default:
1633 /* No need to handle all strange variants, let output_addr_const
1634 do it for us. */
1635 if (CONSTANT_P (operand))
1636 {
1637 cris_output_addr_const (file, operand);
1638 return;
1639 }
1640
1641 LOSE_AND_RETURN ("unexpected operand", x);
1642 }
1643 }
1644
1645 /* The PRINT_OPERAND_ADDRESS worker. */
1646
1647 void
cris_print_operand_address(file,x)1648 cris_print_operand_address (file, x)
1649 FILE *file;
1650 rtx x;
1651 {
1652 /* All these were inside MEM:s so output indirection characters. */
1653 putc ('[', file);
1654
1655 if (CONSTANT_ADDRESS_P (x))
1656 cris_output_addr_const (file, x);
1657 else if (BASE_OR_AUTOINCR_P (x))
1658 cris_print_base (x, file);
1659 else if (GET_CODE (x) == PLUS)
1660 {
1661 rtx x1, x2;
1662
1663 x1 = XEXP (x, 0);
1664 x2 = XEXP (x, 1);
1665 if (BASE_P (x1))
1666 {
1667 cris_print_base (x1, file);
1668 cris_print_index (x2, file);
1669 }
1670 else if (BASE_P (x2))
1671 {
1672 cris_print_base (x2, file);
1673 cris_print_index (x1, file);
1674 }
1675 else
1676 LOSE_AND_RETURN ("unrecognized address", x);
1677 }
1678 else if (GET_CODE (x) == MEM)
1679 {
1680 /* A DIP. Output more indirection characters. */
1681 putc ('[', file);
1682 cris_print_base (XEXP (x, 0), file);
1683 putc (']', file);
1684 }
1685 else
1686 LOSE_AND_RETURN ("unrecognized address", x);
1687
1688 putc (']', file);
1689 }
1690
1691 /* The RETURN_ADDR_RTX worker.
1692 We mark that the return address is used, either by EH or
1693 __builtin_return_address, for use by the function prologue and
1694 epilogue. FIXME: This isn't optimal; we just use the mark in the
1695 prologue and epilogue to say that the return address is to be stored
1696 in the stack frame. We could return SRP for leaf-functions and use the
1697 initial-value machinery. */
1698
1699 rtx
cris_return_addr_rtx(count,frameaddr)1700 cris_return_addr_rtx (count, frameaddr)
1701 int count;
1702 rtx frameaddr ATTRIBUTE_UNUSED;
1703 {
1704 cfun->machine->needs_return_address_on_stack = 1;
1705
1706 /* The return-address is stored just above the saved frame-pointer (if
1707 present). Apparently we can't eliminate from the frame-pointer in
1708 that direction, so use the incoming args (maybe pretended) pointer. */
1709 return count == 0
1710 ? gen_rtx_MEM (Pmode, plus_constant (virtual_incoming_args_rtx, -4))
1711 : NULL_RTX;
1712 }
1713
1714 /* This used to be the INITIAL_FRAME_POINTER_OFFSET worker; now only
1715 handles FP -> SP elimination offset. */
1716
1717 static int
cris_initial_frame_pointer_offset()1718 cris_initial_frame_pointer_offset ()
1719 {
1720 int regno;
1721
1722 /* Initial offset is 0 if we don't have a frame pointer. */
1723 int offs = 0;
1724
1725 /* And 4 for each register pushed. */
1726 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1727 if ((((regs_ever_live[regno]
1728 && !call_used_regs[regno])
1729 || (regno == (int) PIC_OFFSET_TABLE_REGNUM
1730 && (current_function_uses_pic_offset_table
1731 /* It is saved anyway, if there would be a gap. */
1732 || (flag_pic
1733 && regs_ever_live[regno + 1]
1734 && !call_used_regs[regno + 1]))))
1735 && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed)
1736 && regno != CRIS_SRP_REGNUM)
1737 || (current_function_calls_eh_return
1738 && (regno == EH_RETURN_DATA_REGNO (0)
1739 || regno == EH_RETURN_DATA_REGNO (1)
1740 || regno == EH_RETURN_DATA_REGNO (2)
1741 || regno == EH_RETURN_DATA_REGNO (3))))
1742 offs += 4;
1743
1744 /* And then, last, we add the locals allocated. */
1745 offs += get_frame_size ();
1746
1747 /* And more; the accumulated args size. */
1748 offs += current_function_outgoing_args_size;
1749
1750 /* Then round it off, in case we use aligned stack. */
1751 if (TARGET_STACK_ALIGN)
1752 offs = TARGET_ALIGN_BY_32 ? (offs + 3) & ~3 : (offs + 1) & ~1;
1753
1754 return offs;
1755 }
1756
1757 /* The INITIAL_ELIMINATION_OFFSET worker.
1758 Calculate the difference between imaginary registers such as frame
1759 pointer and the stack pointer. Used to eliminate the frame pointer
1760 and imaginary arg pointer. */
1761
1762 int
cris_initial_elimination_offset(fromreg,toreg)1763 cris_initial_elimination_offset (fromreg, toreg)
1764 int fromreg;
1765 int toreg;
1766 {
1767 int fp_sp_offset
1768 = cris_initial_frame_pointer_offset ();
1769
1770 /* We should be able to use regs_ever_live and related prologue
1771 information here, or alpha should not as well. */
1772 int return_address_on_stack
1773 = regs_ever_live[CRIS_SRP_REGNUM]
1774 || cfun->machine->needs_return_address_on_stack != 0;
1775
1776 /* Here we act as if the frame-pointer is needed. */
1777 int ap_fp_offset = 4 + (return_address_on_stack ? 4 : 0);
1778
1779 if (fromreg == ARG_POINTER_REGNUM
1780 && toreg == FRAME_POINTER_REGNUM)
1781 return ap_fp_offset;
1782
1783 /* Between the frame pointer and the stack are only "normal" stack
1784 variables and saved registers. */
1785 if (fromreg == FRAME_POINTER_REGNUM
1786 && toreg == STACK_POINTER_REGNUM)
1787 return fp_sp_offset;
1788
1789 /* We need to balance out the frame pointer here. */
1790 if (fromreg == ARG_POINTER_REGNUM
1791 && toreg == STACK_POINTER_REGNUM)
1792 return ap_fp_offset + fp_sp_offset - 4;
1793
1794 abort ();
1795 }
1796
1797 /* This function looks into the pattern to see how this insn affects
1798 condition codes.
1799
1800 Used when to eliminate test insns before a condition-code user,
1801 such as a "scc" insn or a conditional branch. This includes
1802 checking if the entities that cc was updated by, are changed by the
1803 operation.
1804
1805 Currently a jumble of the old peek-inside-the-insn and the newer
1806 check-cc-attribute methods. */
1807
1808 void
cris_notice_update_cc(exp,insn)1809 cris_notice_update_cc (exp, insn)
1810 rtx exp;
1811 rtx insn;
1812 {
1813 /* Check if user specified "-mcc-init" as a bug-workaround. FIXME:
1814 TARGET_CCINIT does not work; we must set CC_REVERSED as below.
1815 Several test-cases will otherwise fail, for example
1816 gcc.c-torture/execute/20000217-1.c -O0 and -O1. */
1817 if (TARGET_CCINIT)
1818 {
1819 CC_STATUS_INIT;
1820 return;
1821 }
1822
1823 /* Slowly, we're converting to using attributes to control the setting
1824 of condition-code status. */
1825 switch (get_attr_cc (insn))
1826 {
1827 case CC_NONE:
1828 /* Even if it is "none", a setting may clobber a previous
1829 cc-value, so check. */
1830 if (GET_CODE (exp) == SET)
1831 {
1832 if (cc_status.value1
1833 && cris_reg_overlap_mentioned_p (SET_DEST (exp),
1834 cc_status.value1))
1835 cc_status.value1 = 0;
1836
1837 if (cc_status.value2
1838 && cris_reg_overlap_mentioned_p (SET_DEST (exp),
1839 cc_status.value2))
1840 cc_status.value2 = 0;
1841 }
1842 return;
1843
1844 case CC_CLOBBER:
1845 CC_STATUS_INIT;
1846 break;
1847
1848 case CC_NORMAL:
1849 /* Which means, for:
1850 (set (cc0) (...)):
1851 CC is (...).
1852
1853 (set (reg) (...)):
1854 CC is (reg) and (...) - unless (...) is 0, then CC does not change.
1855 CC_NO_OVERFLOW unless (...) is reg or mem.
1856
1857 (set (mem) (...)):
1858 CC does not change.
1859
1860 (set (pc) (...)):
1861 CC does not change.
1862
1863 (parallel
1864 (set (reg1) (mem (bdap/biap)))
1865 (set (reg2) (bdap/biap))):
1866 CC is (reg1) and (mem (reg2))
1867
1868 (parallel
1869 (set (mem (bdap/biap)) (reg1)) [or 0]
1870 (set (reg2) (bdap/biap))):
1871 CC does not change.
1872
1873 (where reg and mem includes strict_low_parts variants thereof)
1874
1875 For all others, assume CC is clobbered.
1876 Note that we do not have to care about setting CC_NO_OVERFLOW,
1877 since the overflow flag is set to 0 (i.e. right) for
1878 instructions where it does not have any sane sense, but where
1879 other flags have meanings. (This includes shifts; the carry is
1880 not set by them).
1881
1882 Note that there are other parallel constructs we could match,
1883 but we don't do that yet. */
1884
1885 if (GET_CODE (exp) == SET)
1886 {
1887 /* FIXME: Check when this happens. It looks like we should
1888 actually do a CC_STATUS_INIT here to be safe. */
1889 if (SET_DEST (exp) == pc_rtx)
1890 return;
1891
1892 /* Record CC0 changes, so we do not have to output multiple
1893 test insns. */
1894 if (SET_DEST (exp) == cc0_rtx)
1895 {
1896 cc_status.value1 = SET_SRC (exp);
1897 cc_status.value2 = 0;
1898
1899 /* Handle flags for the special btstq on one bit. */
1900 if (GET_CODE (SET_SRC (exp)) == ZERO_EXTRACT
1901 && XEXP (SET_SRC (exp), 1) == const1_rtx)
1902 {
1903 if (GET_CODE (XEXP (SET_SRC (exp), 0)) == CONST_INT)
1904 /* Using cmpq. */
1905 cc_status.flags = CC_INVERTED;
1906 else
1907 /* A one-bit btstq. */
1908 cc_status.flags = CC_Z_IN_NOT_N;
1909 }
1910 else
1911 cc_status.flags = 0;
1912
1913 if (GET_CODE (SET_SRC (exp)) == COMPARE)
1914 {
1915 if (!REG_P (XEXP (SET_SRC (exp), 0))
1916 && XEXP (SET_SRC (exp), 1) != const0_rtx)
1917 /* For some reason gcc will not canonicalize compare
1918 operations, reversing the sign by itself if
1919 operands are in wrong order. */
1920 /* (But NOT inverted; eq is still eq.) */
1921 cc_status.flags = CC_REVERSED;
1922
1923 /* This seems to be overlooked by gcc. FIXME: Check again.
1924 FIXME: Is it really safe? */
1925 cc_status.value2
1926 = gen_rtx_MINUS (GET_MODE (SET_SRC (exp)),
1927 XEXP (SET_SRC (exp), 0),
1928 XEXP (SET_SRC (exp), 1));
1929 }
1930 return;
1931 }
1932 else if (REG_P (SET_DEST (exp))
1933 || (GET_CODE (SET_DEST (exp)) == STRICT_LOW_PART
1934 && REG_P (XEXP (SET_DEST (exp), 0))))
1935 {
1936 /* A register is set; normally CC is set to show that no
1937 test insn is needed. Catch the exceptions. */
1938
1939 /* If not to cc0, then no "set"s in non-natural mode give
1940 ok cc0... */
1941 if (GET_MODE_SIZE (GET_MODE (SET_DEST (exp))) > UNITS_PER_WORD
1942 || GET_MODE_CLASS (GET_MODE (SET_DEST (exp))) == MODE_FLOAT)
1943 {
1944 /* ... except add:s and sub:s in DImode. */
1945 if (GET_MODE (SET_DEST (exp)) == DImode
1946 && (GET_CODE (SET_SRC (exp)) == PLUS
1947 || GET_CODE (SET_SRC (exp)) == MINUS))
1948 {
1949 cc_status.flags = 0;
1950 cc_status.value1 = SET_DEST (exp);
1951 cc_status.value2 = SET_SRC (exp);
1952
1953 if (cris_reg_overlap_mentioned_p (cc_status.value1,
1954 cc_status.value2))
1955 cc_status.value2 = 0;
1956
1957 /* Add and sub may set V, which gets us
1958 unoptimizable results in "gt" and "le" condition
1959 codes. */
1960 cc_status.flags |= CC_NO_OVERFLOW;
1961
1962 return;
1963 }
1964 }
1965 else if (SET_SRC (exp) == const0_rtx)
1966 {
1967 /* There's no CC0 change when clearing a register or
1968 memory. Just check for overlap. */
1969 if ((cc_status.value1
1970 && cris_reg_overlap_mentioned_p (SET_DEST (exp),
1971 cc_status.value1)))
1972 cc_status.value1 = 0;
1973
1974 if ((cc_status.value2
1975 && cris_reg_overlap_mentioned_p (SET_DEST (exp),
1976 cc_status.value2)))
1977 cc_status.value2 = 0;
1978
1979 return;
1980 }
1981 else
1982 {
1983 cc_status.flags = 0;
1984 cc_status.value1 = SET_DEST (exp);
1985 cc_status.value2 = SET_SRC (exp);
1986
1987 if (cris_reg_overlap_mentioned_p (cc_status.value1,
1988 cc_status.value2))
1989 cc_status.value2 = 0;
1990
1991 /* Some operations may set V, which gets us
1992 unoptimizable results in "gt" and "le" condition
1993 codes. */
1994 if (GET_CODE (SET_SRC (exp)) == PLUS
1995 || GET_CODE (SET_SRC (exp)) == MINUS
1996 || GET_CODE (SET_SRC (exp)) == NEG)
1997 cc_status.flags |= CC_NO_OVERFLOW;
1998
1999 return;
2000 }
2001 }
2002 else if (GET_CODE (SET_DEST (exp)) == MEM
2003 || (GET_CODE (SET_DEST (exp)) == STRICT_LOW_PART
2004 && GET_CODE (XEXP (SET_DEST (exp), 0)) == MEM))
2005 {
2006 /* When SET to MEM, then CC is not changed (except for
2007 overlap). */
2008 if ((cc_status.value1
2009 && cris_reg_overlap_mentioned_p (SET_DEST (exp),
2010 cc_status.value1)))
2011 cc_status.value1 = 0;
2012
2013 if ((cc_status.value2
2014 && cris_reg_overlap_mentioned_p (SET_DEST (exp),
2015 cc_status.value2)))
2016 cc_status.value2 = 0;
2017
2018 return;
2019 }
2020 }
2021 else if (GET_CODE (exp) == PARALLEL)
2022 {
2023 if (GET_CODE (XVECEXP (exp, 0, 0)) == SET
2024 && GET_CODE (XVECEXP (exp, 0, 1)) == SET
2025 && REG_P (XEXP (XVECEXP (exp, 0, 1), 0)))
2026 {
2027 if (REG_P (XEXP (XVECEXP (exp, 0, 0), 0))
2028 && GET_CODE (XEXP (XVECEXP (exp, 0, 0), 1)) == MEM)
2029 {
2030 /* For "move.S [rx=ry+o],rz", say CC reflects
2031 value1=rz and value2=[rx] */
2032 cc_status.value1 = XEXP (XVECEXP (exp, 0, 0), 0);
2033 cc_status.value2
2034 = replace_equiv_address (XEXP (XVECEXP (exp, 0, 0), 1),
2035 XEXP (XVECEXP (exp, 0, 1), 0));
2036 cc_status.flags = 0;
2037
2038 /* Huh? A side-effect cannot change the destination
2039 register. */
2040 if (cris_reg_overlap_mentioned_p (cc_status.value1,
2041 cc_status.value2))
2042 internal_error ("internal error: sideeffect-insn affecting main effect");
2043 return;
2044 }
2045 else if ((REG_P (XEXP (XVECEXP (exp, 0, 0), 1))
2046 || XEXP (XVECEXP (exp, 0, 0), 1) == const0_rtx)
2047 && GET_CODE (XEXP (XVECEXP (exp, 0, 0), 0)) == MEM)
2048 {
2049 /* For "move.S rz,[rx=ry+o]" and "clear.S [rx=ry+o]",
2050 say flags are not changed, except for overlap. */
2051 if (cc_status.value1
2052 && cris_reg_overlap_mentioned_p (XEXP
2053 (XVECEXP
2054 (exp, 0, 0), 0),
2055 cc_status.value1))
2056 cc_status.value1 = 0;
2057
2058 if (cc_status.value1
2059 && cris_reg_overlap_mentioned_p (XEXP
2060 (XVECEXP
2061 (exp, 0, 1), 0),
2062 cc_status.value1))
2063 cc_status.value1 = 0;
2064
2065 if (cc_status.value2
2066 && cris_reg_overlap_mentioned_p (XEXP
2067 (XVECEXP
2068 (exp, 0, 0), 0),
2069 cc_status.value2))
2070 cc_status.value2 = 0;
2071
2072 if (cc_status.value2
2073 && cris_reg_overlap_mentioned_p (XEXP
2074 (XVECEXP
2075 (exp, 0, 1), 0),
2076 cc_status.value2))
2077 cc_status.value2 = 0;
2078
2079 return;
2080 }
2081 }
2082 }
2083 break;
2084
2085 default:
2086 /* Unknown cc_attr value. */
2087 abort ();
2088 }
2089
2090 CC_STATUS_INIT;
2091 }
2092
2093 /* Return != 0 if the return sequence for the current function is short,
2094 like "ret" or "jump [sp+]". Prior to reloading, we can't tell how
2095 many registers must be saved, so return 0 then. */
2096
2097 int
cris_simple_epilogue()2098 cris_simple_epilogue ()
2099 {
2100 int regno;
2101 int reglimit = STACK_POINTER_REGNUM;
2102 int lastreg = -1;
2103
2104 if (! reload_completed
2105 || frame_pointer_needed
2106 || get_frame_size () != 0
2107 || current_function_pretend_args_size
2108 || current_function_args_size
2109 || current_function_outgoing_args_size
2110 || current_function_calls_eh_return
2111
2112 /* If we're not supposed to emit prologue and epilogue, we must
2113 not emit return-type instructions. */
2114 || !TARGET_PROLOGUE_EPILOGUE)
2115 return 0;
2116
2117 /* We allow a "movem [sp+],rN" to sit in front if the "jump [sp+]" or
2118 in the delay-slot of the "ret". */
2119 for (regno = 0; regno < reglimit; regno++)
2120 if ((regs_ever_live[regno] && ! call_used_regs[regno])
2121 || (regno == (int) PIC_OFFSET_TABLE_REGNUM
2122 && (current_function_uses_pic_offset_table
2123 /* It is saved anyway, if there would be a gap. */
2124 || (flag_pic
2125 && regs_ever_live[regno + 1]
2126 && !call_used_regs[regno + 1]))))
2127 {
2128 if (lastreg != regno - 1)
2129 return 0;
2130 lastreg = regno;
2131 }
2132
2133 return 1;
2134 }
2135
2136 /* The ADDRESS_COST worker. */
2137
2138 int
cris_address_cost(x)2139 cris_address_cost (x)
2140 rtx x;
2141 {
2142 /* The metric to use for the cost-macros is unclear.
2143 The metric used here is (the number of cycles needed) / 2,
2144 where we consider equal a cycle for a word of code and a cycle to
2145 read memory. */
2146
2147 /* The cheapest addressing modes get 0, since nothing extra is needed. */
2148 if (BASE_OR_AUTOINCR_P (x))
2149 return 0;
2150
2151 /* An indirect mem must be a DIP. This means two bytes extra for code,
2152 and 4 bytes extra for memory read, i.e. (2 + 4) / 2. */
2153 if (GET_CODE (x) == MEM)
2154 return (2 + 4) / 2;
2155
2156 /* Assume (2 + 4) / 2 for a single constant; a dword, since it needs
2157 an extra DIP prefix and 4 bytes of constant in most cases.
2158 For PIC and a symbol with a GOT entry, we double the cost since we
2159 add a [rPIC+...] offset. A GOT-less symbol uses a BDAP prefix
2160 equivalent to the DIP prefix for non-PIC, hence the same cost. */
2161 if (CONSTANT_P (x))
2162 return flag_pic && cris_got_symbol (x) ? 2 * (2 + 4) / 2 : (2 + 4) / 2;
2163
2164 /* Handle BIAP and BDAP prefixes. */
2165 if (GET_CODE (x) == PLUS)
2166 {
2167 rtx tem1 = XEXP (x, 0);
2168 rtx tem2 = XEXP (x, 1);
2169
2170 /* A BIAP is 2 extra bytes for the prefix insn, nothing more. We
2171 recognize the typical MULT which is always in tem1 because of
2172 insn canonicalization. */
2173 if ((GET_CODE (tem1) == MULT && BIAP_INDEX_P (tem1))
2174 || REG_P (tem1))
2175 return 2 / 2;
2176
2177 /* A BDAP (quick) is 2 extra bytes. Any constant operand to the
2178 PLUS is always found in tem2. */
2179 if (GET_CODE (tem2) == CONST_INT
2180 && INTVAL (tem2) < 128 && INTVAL (tem2) >= -128)
2181 return 2 / 2;
2182
2183 /* A BDAP -32768 .. 32767 is like BDAP quick, but with 2 extra
2184 bytes. */
2185 if (GET_CODE (tem2) == CONST_INT
2186 && CONST_OK_FOR_LETTER_P (INTVAL (tem2), 'L'))
2187 return (2 + 2) / 2;
2188
2189 /* A BDAP with some other constant is 2 bytes extra. */
2190 if (CONSTANT_P (tem2))
2191 return (2 + 2 + 2) / 2;
2192
2193 /* BDAP with something indirect should have a higher cost than
2194 BIAP with register. FIXME: Should it cost like a MEM or more? */
2195 /* Don't need to check it, it's the only one left.
2196 FIXME: There was a REG test missing, perhaps there are others.
2197 Think more. */
2198 return (2 + 2 + 2) / 2;
2199 }
2200
2201 /* What else? Return a high cost. It matters only for valid
2202 addressing modes. */
2203 return 10;
2204 }
2205
2206 /* Check various objections to the side-effect. Used in the test-part
2207 of an anonymous insn describing an insn with a possible side-effect.
2208 Returns nonzero if the implied side-effect is ok.
2209
2210 code : PLUS or MULT
2211 ops : An array of rtx:es. lreg, rreg, rval,
2212 The variables multop and other_op are indexes into this,
2213 or -1 if they are not applicable.
2214 lreg : The register that gets assigned in the side-effect.
2215 rreg : One register in the side-effect expression
2216 rval : The other register, or an int.
2217 multop : An integer to multiply rval with.
2218 other_op : One of the entities of the main effect,
2219 whose mode we must consider. */
2220
2221 int
cris_side_effect_mode_ok(code,ops,lreg,rreg,rval,multop,other_op)2222 cris_side_effect_mode_ok (code, ops, lreg, rreg, rval, multop, other_op)
2223 enum rtx_code code;
2224 rtx *ops;
2225 int lreg, rreg, rval, multop, other_op;
2226 {
2227 /* Find what value to multiply with, for rx =ry + rz * n. */
2228 int mult = multop < 0 ? 1 : INTVAL (ops[multop]);
2229
2230 rtx reg_rtx = ops[rreg];
2231 rtx val_rtx = ops[rval];
2232
2233 /* The operands may be swapped. Canonicalize them in reg_rtx and
2234 val_rtx, where reg_rtx always is a reg (for this constraint to
2235 match). */
2236 if (! BASE_P (reg_rtx))
2237 reg_rtx = val_rtx, val_rtx = ops[rreg];
2238
2239 /* Don't forget to check that reg_rtx really is a reg. If it isn't,
2240 we have no business. */
2241 if (! BASE_P (reg_rtx))
2242 return 0;
2243
2244 /* Don't do this when -mno-split. */
2245 if (!TARGET_SIDE_EFFECT_PREFIXES)
2246 return 0;
2247
2248 /* The mult expression may be hidden in lreg. FIXME: Add more
2249 commentary about that. */
2250 if (GET_CODE (val_rtx) == MULT)
2251 {
2252 mult = INTVAL (XEXP (val_rtx, 1));
2253 val_rtx = XEXP (val_rtx, 0);
2254 code = MULT;
2255 }
2256
2257 /* First check the "other operand". */
2258 if (other_op >= 0)
2259 {
2260 if (GET_MODE_SIZE (GET_MODE (ops[other_op])) > UNITS_PER_WORD)
2261 return 0;
2262
2263 /* Check if the lvalue register is the same as the "other
2264 operand". If so, the result is undefined and we shouldn't do
2265 this. FIXME: Check again. */
2266 if ((BASE_P (ops[lreg])
2267 && BASE_P (ops[other_op])
2268 && REGNO (ops[lreg]) == REGNO (ops[other_op]))
2269 || rtx_equal_p (ops[other_op], ops[lreg]))
2270 return 0;
2271 }
2272
2273 /* Do not accept frame_pointer_rtx as any operand. */
2274 if (ops[lreg] == frame_pointer_rtx || ops[rreg] == frame_pointer_rtx
2275 || ops[rval] == frame_pointer_rtx
2276 || (other_op >= 0 && ops[other_op] == frame_pointer_rtx))
2277 return 0;
2278
2279 if (code == PLUS
2280 && ! BASE_P (val_rtx))
2281 {
2282
2283 /* Do not allow rx = rx + n if a normal add or sub with same size
2284 would do. */
2285 if (rtx_equal_p (ops[lreg], reg_rtx)
2286 && GET_CODE (val_rtx) == CONST_INT
2287 && (INTVAL (val_rtx) <= 63 && INTVAL (val_rtx) >= -63))
2288 return 0;
2289
2290 /* Check allowed cases, like [r(+)?].[bwd] and const.
2291 A symbol is not allowed with PIC. */
2292 if (CONSTANT_P (val_rtx))
2293 return flag_pic == 0 || cris_symbol (val_rtx) == 0;
2294
2295 if (GET_CODE (val_rtx) == MEM
2296 && BASE_OR_AUTOINCR_P (XEXP (val_rtx, 0)))
2297 return 1;
2298
2299 if (GET_CODE (val_rtx) == SIGN_EXTEND
2300 && GET_CODE (XEXP (val_rtx, 0)) == MEM
2301 && BASE_OR_AUTOINCR_P (XEXP (XEXP (val_rtx, 0), 0)))
2302 return 1;
2303
2304 /* If we got here, it's not a valid addressing mode. */
2305 return 0;
2306 }
2307 else if (code == MULT
2308 || (code == PLUS && BASE_P (val_rtx)))
2309 {
2310 /* Do not allow rx = rx + ry.S, since it doesn't give better code. */
2311 if (rtx_equal_p (ops[lreg], reg_rtx)
2312 || (mult == 1 && rtx_equal_p (ops[lreg], val_rtx)))
2313 return 0;
2314
2315 /* Do not allow bad multiply-values. */
2316 if (mult != 1 && mult != 2 && mult != 4)
2317 return 0;
2318
2319 /* Only allow r + ... */
2320 if (! BASE_P (reg_rtx))
2321 return 0;
2322
2323 /* If we got here, all seems ok.
2324 (All checks need to be done above). */
2325 return 1;
2326 }
2327
2328 /* If we get here, the caller got its initial tests wrong. */
2329 internal_error ("internal error: cris_side_effect_mode_ok with bad operands");
2330 }
2331
2332 /* The function reg_overlap_mentioned_p in CVS (still as of 2001-05-16)
2333 does not handle the case where the IN operand is strict_low_part; it
2334 does handle it for X. Test-case in Axis-20010516. This function takes
2335 care of that for THIS port. FIXME: strict_low_part is going away
2336 anyway. */
2337
2338 static int
cris_reg_overlap_mentioned_p(x,in)2339 cris_reg_overlap_mentioned_p (x, in)
2340 rtx x, in;
2341 {
2342 /* The function reg_overlap_mentioned now handles when X is
2343 strict_low_part, but not when IN is a STRICT_LOW_PART. */
2344 if (GET_CODE (in) == STRICT_LOW_PART)
2345 in = XEXP (in, 0);
2346
2347 return reg_overlap_mentioned_p (x, in);
2348 }
2349
2350 /* The TARGET_ASM_NAMED_SECTION worker.
2351 We just dispatch to the functions for ELF and a.out. */
2352
2353 void
cris_target_asm_named_section(name,flags)2354 cris_target_asm_named_section (name, flags)
2355 const char *name;
2356 unsigned int flags;
2357 {
2358 if (! TARGET_ELF)
2359 default_no_named_section (name, flags);
2360 else
2361 default_elf_asm_named_section (name, flags);
2362 }
2363
2364 /* The LEGITIMATE_PIC_OPERAND_P worker. */
2365
2366 int
cris_legitimate_pic_operand(x)2367 cris_legitimate_pic_operand (x)
2368 rtx x;
2369 {
2370 /* The PIC representation of a symbol with a GOT entry will be (for
2371 example; relocations differ):
2372 sym => [rPIC+sym:GOT]
2373 and for a GOT-less symbol it will be (for example, relocation differ):
2374 sym => rPIC+sym:GOTOFF
2375 so only a symbol with a GOT is by itself a valid operand, and it
2376 can't be a sum of a symbol and an offset. */
2377 return ! cris_symbol (x) || cris_got_symbol (x);
2378 }
2379
2380 /* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this
2381 CONSTANT_P. */
2382
2383 int
cris_symbol(x)2384 cris_symbol (x)
2385 rtx x;
2386 {
2387 switch (GET_CODE (x))
2388 {
2389 case SYMBOL_REF:
2390 case LABEL_REF:
2391 return 1;
2392
2393 case UNSPEC:
2394 /* A PLT reference. */
2395 ASSERT_PLT_UNSPEC (x);
2396 return 1;
2397
2398 case CONST:
2399 return cris_symbol (XEXP (x, 0));
2400
2401 case PLUS:
2402 case MINUS:
2403 return cris_symbol (XEXP (x, 0)) || cris_symbol (XEXP (x, 1));
2404
2405 case CONST_INT:
2406 case CONST_DOUBLE:
2407 case CONSTANT_P_RTX:
2408 return 0;
2409
2410 default:
2411 fatal_insn ("unrecognized supposed constant", x);
2412 }
2413
2414 return 1;
2415 }
2416
2417 /* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this
2418 CONSTANT_P, and the symbol does not need a GOT entry. Also set
2419 current_function_uses_pic_offset_table if we're generating PIC and ever
2420 see something that would need one. */
2421
2422 int
cris_gotless_symbol(x)2423 cris_gotless_symbol (x)
2424 rtx x;
2425 {
2426 switch (GET_CODE (x))
2427 {
2428 case UNSPEC:
2429 ASSERT_PLT_UNSPEC (x);
2430 return 1;
2431
2432 case SYMBOL_REF:
2433 if (flag_pic && cfun != NULL)
2434 current_function_uses_pic_offset_table = 1;
2435 return SYMBOL_REF_FLAG (x);
2436
2437 case LABEL_REF:
2438 /* We don't set current_function_uses_pic_offset_table for
2439 LABEL_REF:s in here, since they are almost always originating
2440 from some branch. The only time it does not come from a label is
2441 when GCC does something like __builtin_setjmp. Then we get the
2442 LABEL_REF from the movsi expander, so we mark it there as a
2443 special case. */
2444 return 1;
2445
2446 case CONST:
2447 return cris_gotless_symbol (XEXP (x, 0));
2448
2449 case PLUS:
2450 case MINUS:
2451 {
2452 int x0 = cris_gotless_symbol (XEXP (x, 0)) != 0;
2453 int x1 = cris_gotless_symbol (XEXP (x, 1)) != 0;
2454
2455 /* One and only one of them must be a local symbol. Neither must
2456 be some other, more general kind of symbol. */
2457 return
2458 (x0 ^ x1)
2459 && ! (x0 == 0 && cris_symbol (XEXP (x, 0)))
2460 && ! (x1 == 0 && cris_symbol (XEXP (x, 1)));
2461 }
2462
2463 case CONST_INT:
2464 case CONST_DOUBLE:
2465 case CONSTANT_P_RTX:
2466 return 0;
2467
2468 default:
2469 fatal_insn ("unrecognized supposed constant", x);
2470 }
2471
2472 return 1;
2473 }
2474
2475 /* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this
2476 CONSTANT_P, and the symbol needs a GOT entry. */
2477
2478 int
cris_got_symbol(x)2479 cris_got_symbol (x)
2480 rtx x;
2481 {
2482 switch (GET_CODE (x))
2483 {
2484 case UNSPEC:
2485 ASSERT_PLT_UNSPEC (x);
2486 return 0;
2487
2488 case SYMBOL_REF:
2489 if (flag_pic && cfun != NULL)
2490 current_function_uses_pic_offset_table = 1;
2491 return ! SYMBOL_REF_FLAG (x);
2492
2493 case CONST:
2494 return cris_got_symbol (XEXP (x, 0));
2495
2496 case LABEL_REF:
2497 /* A LABEL_REF is never visible as a symbol outside the local
2498 function. */
2499 case PLUS:
2500 case MINUS:
2501 /* Nope, can't access the GOT for "symbol + offset". */
2502 return 0;
2503
2504 case CONST_INT:
2505 case CONST_DOUBLE:
2506 case CONSTANT_P_RTX:
2507 return 0;
2508
2509 default:
2510 fatal_insn ("unrecognized supposed constant in cris_global_pic_symbol",
2511 x);
2512 }
2513
2514 return 1;
2515 }
2516
2517 /* The OVERRIDE_OPTIONS worker.
2518 As is the norm, this also parses -mfoo=bar type parameters. */
2519
2520 void
cris_override_options()2521 cris_override_options ()
2522 {
2523 if (cris_max_stackframe_str)
2524 {
2525 cris_max_stackframe = atoi (cris_max_stackframe_str);
2526
2527 /* Do some sanity checking. */
2528 if (cris_max_stackframe < 0 || cris_max_stackframe > 0x20000000)
2529 internal_error ("-max-stackframe=%d is not usable, not between 0 and %d",
2530 cris_max_stackframe, 0x20000000);
2531 }
2532
2533 /* Let "-metrax4" and "-metrax100" change the cpu version. */
2534 if (TARGET_SVINTO && cris_cpu_version < CRIS_CPU_SVINTO)
2535 cris_cpu_version = CRIS_CPU_SVINTO;
2536 else if (TARGET_ETRAX4_ADD && cris_cpu_version < CRIS_CPU_ETRAX4)
2537 cris_cpu_version = CRIS_CPU_ETRAX4;
2538
2539 /* Parse -march=... and its synonym, the deprecated -mcpu=... */
2540 if (cris_cpu_str)
2541 {
2542 cris_cpu_version
2543 = (*cris_cpu_str == 'v' ? atoi (cris_cpu_str + 1) : -1);
2544
2545 if (strcmp ("etrax4", cris_cpu_str) == 0)
2546 cris_cpu_version = 3;
2547
2548 if (strcmp ("svinto", cris_cpu_str) == 0
2549 || strcmp ("etrax100", cris_cpu_str) == 0)
2550 cris_cpu_version = 8;
2551
2552 if (strcmp ("ng", cris_cpu_str) == 0
2553 || strcmp ("etrax100lx", cris_cpu_str) == 0)
2554 cris_cpu_version = 10;
2555
2556 if (cris_cpu_version < 0 || cris_cpu_version > 10)
2557 error ("unknown CRIS version specification in -march= or -mcpu= : %s",
2558 cris_cpu_str);
2559
2560 /* Set the target flags. */
2561 if (cris_cpu_version >= CRIS_CPU_ETRAX4)
2562 target_flags |= TARGET_MASK_ETRAX4_ADD;
2563
2564 /* If this is Svinto or higher, align for 32 bit accesses. */
2565 if (cris_cpu_version >= CRIS_CPU_SVINTO)
2566 target_flags
2567 |= (TARGET_MASK_SVINTO | TARGET_MASK_ALIGN_BY_32
2568 | TARGET_MASK_STACK_ALIGN | TARGET_MASK_CONST_ALIGN
2569 | TARGET_MASK_DATA_ALIGN);
2570
2571 /* Note that we do not add new flags when it can be completely
2572 described with a macro that uses -mcpu=X. So
2573 TARGET_HAS_MUL_INSNS is (cris_cpu_version >= CRIS_CPU_NG). */
2574 }
2575
2576 if (cris_tune_str)
2577 {
2578 int cris_tune
2579 = (*cris_tune_str == 'v' ? atoi (cris_tune_str + 1) : -1);
2580
2581 if (strcmp ("etrax4", cris_tune_str) == 0)
2582 cris_tune = 3;
2583
2584 if (strcmp ("svinto", cris_tune_str) == 0
2585 || strcmp ("etrax100", cris_tune_str) == 0)
2586 cris_tune = 8;
2587
2588 if (strcmp ("ng", cris_tune_str) == 0
2589 || strcmp ("etrax100lx", cris_tune_str) == 0)
2590 cris_tune = 10;
2591
2592 if (cris_tune < 0 || cris_tune > 10)
2593 error ("unknown CRIS cpu version specification in -mtune= : %s",
2594 cris_tune_str);
2595
2596 if (cris_tune >= CRIS_CPU_SVINTO)
2597 /* We have currently nothing more to tune than alignment for
2598 memory accesses. */
2599 target_flags
2600 |= (TARGET_MASK_STACK_ALIGN | TARGET_MASK_CONST_ALIGN
2601 | TARGET_MASK_DATA_ALIGN | TARGET_MASK_ALIGN_BY_32);
2602 }
2603
2604 if (flag_pic)
2605 {
2606 /* Use error rather than warning, so invalid use is easily
2607 detectable. Still change to the values we expect, to avoid
2608 further errors. */
2609 if (! TARGET_LINUX)
2610 {
2611 error ("-fPIC and -fpic are not supported in this configuration");
2612 flag_pic = 0;
2613 }
2614
2615 /* Turn off function CSE. We need to have the addresses reach the
2616 call expanders to get PLT-marked, as they could otherwise be
2617 compared against zero directly or indirectly. After visiting the
2618 call expanders they will then be cse:ed, as the call expanders
2619 force_reg the addresses, effectively forcing flag_no_function_cse
2620 to 0. */
2621 flag_no_function_cse = 1;
2622 }
2623
2624 if ((write_symbols == DWARF_DEBUG
2625 || write_symbols == DWARF2_DEBUG) && ! TARGET_ELF)
2626 {
2627 warning ("that particular -g option is invalid with -maout and -melinux");
2628 write_symbols = DBX_DEBUG;
2629 }
2630
2631 /* Set the per-function-data initializer. */
2632 init_machine_status = cris_init_machine_status;
2633 }
2634
2635 /* The TARGET_ASM_OUTPUT_MI_THUNK worker. */
2636
2637 static void
cris_asm_output_mi_thunk(stream,thunkdecl,delta,vcall_offset,funcdecl)2638 cris_asm_output_mi_thunk (stream, thunkdecl, delta, vcall_offset, funcdecl)
2639 FILE *stream;
2640 tree thunkdecl ATTRIBUTE_UNUSED;
2641 HOST_WIDE_INT delta;
2642 HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED;
2643 tree funcdecl;
2644 {
2645 if (delta > 0)
2646 {
2647 fprintf (stream, "\tadd%s ", ADDITIVE_SIZE_MODIFIER (delta));
2648 fprintf (stream, HOST_WIDE_INT_PRINT_DEC, delta);
2649 fprintf (stream, ",$%s\n", reg_names[CRIS_FIRST_ARG_REG]);
2650 }
2651 else if (delta < 0)
2652 {
2653 fprintf (stream, "\tsub%s ", ADDITIVE_SIZE_MODIFIER (-delta));
2654 fprintf (stream, HOST_WIDE_INT_PRINT_DEC, -delta);
2655 fprintf (stream, ",$%s\n", reg_names[CRIS_FIRST_ARG_REG]);
2656 }
2657
2658 if (flag_pic)
2659 {
2660 const char *name = XSTR (XEXP (DECL_RTL (funcdecl), 0), 0);
2661
2662 /* We have no other relative (to either PC or GOT) reloc than one
2663 that requests a PLT entry. Since we don't set up the GOT
2664 register, the jump absolutely must not be redirected through a
2665 PLT entry. We manage anyway by going through a local symbol.
2666 This depends on the assembler to not short-circuit equalities
2667 set by the ".set" directive (at least not for PIC relocs) and
2668 on the linker to direct R_CRIS_32_PLT_PCREL relocs *directly*
2669 to the symbol for local symbols, instead of through a PLT
2670 entry. */
2671 name = (* targetm.strip_name_encoding) (name);
2672 fprintf (stream, "\tadd.d ");
2673 assemble_name (stream, name);
2674 fprintf (stream, "..xth%s,$pc\n", CRIS_PLT_PCOFFSET_SUFFIX);
2675 fprintf (stream, "\t.set ");
2676 assemble_name (stream, name);
2677 fprintf (stream, "..xth,");
2678 assemble_name (stream, name);
2679 fprintf (stream, "\n");
2680 }
2681 else
2682 {
2683 fprintf (stream, "jump ");
2684 assemble_name (stream, XSTR (XEXP (DECL_RTL (funcdecl), 0), 0));
2685 fprintf (stream, "\n");
2686 }
2687 }
2688
2689 /* The EXPAND_BUILTIN_VA_ARG worker. This is modified from the
2690 "standard" implementation of va_arg: read the value from the current
2691 address and increment by the size of one or two registers. The
2692 important difference for CRIS is that if the type is
2693 pass-by-reference, then perform an indirection. */
2694
2695 rtx
cris_expand_builtin_va_arg(valist,type)2696 cris_expand_builtin_va_arg (valist, type)
2697 tree valist;
2698 tree type;
2699 {
2700 tree addr_tree, t;
2701 rtx addr;
2702 tree passed_size = size_zero_node;
2703 tree type_size = NULL;
2704 tree size3 = size_int (3);
2705 tree size4 = size_int (4);
2706 tree size8 = size_int (8);
2707 tree rounded_size;
2708
2709 /* Get AP. */
2710 addr_tree = valist;
2711
2712 if (type == error_mark_node
2713 || (type_size = TYPE_SIZE_UNIT (TYPE_MAIN_VARIANT (type))) == NULL
2714 || TREE_OVERFLOW (type_size))
2715 /* Presumably an error; the size isn't computable. A message has
2716 supposedly been emitted elsewhere. */
2717 rounded_size = size_zero_node;
2718 else
2719 rounded_size
2720 = fold (build (MULT_EXPR, sizetype,
2721 fold (build (TRUNC_DIV_EXPR, sizetype,
2722 fold (build (PLUS_EXPR, sizetype,
2723 type_size, size3)),
2724 size4)),
2725 size4));
2726
2727 if (!integer_zerop (rounded_size))
2728 {
2729 /* Check if the type is passed by value or by reference. Values up
2730 to 8 bytes are passed by-value, padded to register-size (4
2731 bytes). Larger values and varying-size types are passed
2732 by reference. */
2733 passed_size
2734 = (!really_constant_p (type_size)
2735 ? size4
2736 : fold (build (COND_EXPR, sizetype,
2737 fold (build (GT_EXPR, sizetype,
2738 rounded_size,
2739 size8)),
2740 size4,
2741 rounded_size)));
2742
2743 addr_tree
2744 = (!really_constant_p (type_size)
2745 ? build1 (INDIRECT_REF, build_pointer_type (type), addr_tree)
2746 : fold (build (COND_EXPR, TREE_TYPE (addr_tree),
2747 fold (build (GT_EXPR, sizetype,
2748 rounded_size,
2749 size8)),
2750 build1 (INDIRECT_REF, build_pointer_type (type),
2751 addr_tree),
2752 addr_tree)));
2753 }
2754
2755 addr = expand_expr (addr_tree, NULL_RTX, Pmode, EXPAND_NORMAL);
2756 addr = copy_to_reg (addr);
2757
2758 if (!integer_zerop (rounded_size))
2759 {
2760 /* Compute new value for AP. */
2761 t = build (MODIFY_EXPR, TREE_TYPE (valist), valist,
2762 build (PLUS_EXPR, TREE_TYPE (valist), valist,
2763 passed_size));
2764 TREE_SIDE_EFFECTS (t) = 1;
2765 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
2766 }
2767
2768 return addr;
2769 }
2770
2771 /* The INIT_EXPANDERS worker sets the per-function-data initializer and
2772 mark functions. */
2773
2774 void
cris_init_expanders()2775 cris_init_expanders ()
2776 {
2777 /* Nothing here at the moment. */
2778 }
2779
2780 /* Zero initialization is OK for all current fields. */
2781
2782 static struct machine_function *
cris_init_machine_status()2783 cris_init_machine_status ()
2784 {
2785 return ggc_alloc_cleared (sizeof (struct machine_function));
2786 }
2787
2788 /* Split a 2 word move (DI or presumably DF) into component parts.
2789 Originally a copy of gen_split_move_double in m32r.c. */
2790
2791 rtx
cris_split_movdx(operands)2792 cris_split_movdx (operands)
2793 rtx *operands;
2794 {
2795 enum machine_mode mode = GET_MODE (operands[0]);
2796 rtx dest = operands[0];
2797 rtx src = operands[1];
2798 rtx val;
2799
2800 /* We used to have to handle (SUBREG (MEM)) here, but that should no
2801 longer happen; after reload there are no SUBREGs any more, and we're
2802 only called after reload. */
2803 if (GET_CODE (dest) == SUBREG || GET_CODE (src) == SUBREG)
2804 abort ();
2805
2806 start_sequence ();
2807 if (GET_CODE (dest) == REG)
2808 {
2809 int dregno = REGNO (dest);
2810
2811 /* Reg-to-reg copy. */
2812 if (GET_CODE (src) == REG)
2813 {
2814 int sregno = REGNO (src);
2815
2816 int reverse = (dregno == sregno + 1);
2817
2818 /* We normally copy the low-numbered register first. However, if
2819 the first register operand 0 is the same as the second register of
2820 operand 1, we must copy in the opposite order. */
2821 emit_insn (gen_rtx_SET (VOIDmode,
2822 operand_subword (dest, reverse, TRUE, mode),
2823 operand_subword (src, reverse, TRUE, mode)));
2824
2825 emit_insn (gen_rtx_SET (VOIDmode,
2826 operand_subword (dest, !reverse, TRUE, mode),
2827 operand_subword (src, !reverse, TRUE, mode)));
2828 }
2829 /* Constant-to-reg copy. */
2830 else if (GET_CODE (src) == CONST_INT || GET_CODE (src) == CONST_DOUBLE)
2831 {
2832 rtx words[2];
2833 split_double (src, &words[0], &words[1]);
2834 emit_insn (gen_rtx_SET (VOIDmode,
2835 operand_subword (dest, 0, TRUE, mode),
2836 words[0]));
2837
2838 emit_insn (gen_rtx_SET (VOIDmode,
2839 operand_subword (dest, 1, TRUE, mode),
2840 words[1]));
2841 }
2842 /* Mem-to-reg copy. */
2843 else if (GET_CODE (src) == MEM)
2844 {
2845 /* If the high-address word is used in the address, we must load it
2846 last. Otherwise, load it first. */
2847 rtx addr = XEXP (src, 0);
2848 int reverse
2849 = (refers_to_regno_p (dregno, dregno + 1, addr, NULL) != 0);
2850
2851 /* The original code imples that we can't do
2852 move.x [rN+],rM move.x [rN],rM+1
2853 when rN is dead, because of REG_NOTES damage. That is
2854 consistent with what I've seen, so don't try it.
2855
2856 We have two different cases here; if the addr is POST_INC,
2857 just pass it through, otherwise add constants. */
2858
2859 if (GET_CODE (addr) == POST_INC)
2860 {
2861 emit_insn (gen_rtx_SET (VOIDmode,
2862 operand_subword (dest, 0, TRUE, mode),
2863 change_address (src, SImode, addr)));
2864 emit_insn (gen_rtx_SET (VOIDmode,
2865 operand_subword (dest, 1, TRUE, mode),
2866 change_address (src, SImode, addr)));
2867 }
2868 else
2869 {
2870 /* Make sure we don't get any other addresses with
2871 embedded postincrements. They should be stopped in
2872 GO_IF_LEGITIMATE_ADDRESS, but we're here for your
2873 safety. */
2874 if (side_effects_p (addr))
2875 fatal_insn ("unexpected side-effects in address", addr);
2876
2877 emit_insn (gen_rtx_SET
2878 (VOIDmode,
2879 operand_subword (dest, reverse, TRUE, mode),
2880 change_address
2881 (src, SImode,
2882 plus_constant (addr,
2883 reverse * UNITS_PER_WORD))));
2884 emit_insn (gen_rtx_SET
2885 (VOIDmode,
2886 operand_subword (dest, ! reverse, TRUE, mode),
2887 change_address
2888 (src, SImode,
2889 plus_constant (addr,
2890 (! reverse) *
2891 UNITS_PER_WORD))));
2892 }
2893 }
2894 else
2895 abort ();
2896 }
2897 /* Reg-to-mem copy or clear mem. */
2898 else if (GET_CODE (dest) == MEM
2899 && (GET_CODE (src) == REG
2900 || src == const0_rtx
2901 || src == CONST0_RTX (DFmode)))
2902 {
2903 rtx addr = XEXP (dest, 0);
2904
2905 if (GET_CODE (addr) == POST_INC)
2906 {
2907 emit_insn (gen_rtx_SET (VOIDmode,
2908 change_address (dest, SImode, addr),
2909 operand_subword (src, 0, TRUE, mode)));
2910 emit_insn (gen_rtx_SET (VOIDmode,
2911 change_address (dest, SImode, addr),
2912 operand_subword (src, 1, TRUE, mode)));
2913 }
2914 else
2915 {
2916 /* Make sure we don't get any other addresses with embedded
2917 postincrements. They should be stopped in
2918 GO_IF_LEGITIMATE_ADDRESS, but we're here for your safety. */
2919 if (side_effects_p (addr))
2920 fatal_insn ("unexpected side-effects in address", addr);
2921
2922 emit_insn (gen_rtx_SET
2923 (VOIDmode,
2924 change_address (dest, SImode, addr),
2925 operand_subword (src, 0, TRUE, mode)));
2926
2927 emit_insn (gen_rtx_SET
2928 (VOIDmode,
2929 change_address (dest, SImode,
2930 plus_constant (addr,
2931 UNITS_PER_WORD)),
2932 operand_subword (src, 1, TRUE, mode)));
2933 }
2934 }
2935
2936 else
2937 abort ();
2938
2939 val = get_insns ();
2940 end_sequence ();
2941 return val;
2942 }
2943
2944 /* This is in essence a copy of output_addr_const altered to output
2945 symbolic operands as PIC.
2946
2947 FIXME: Add hooks similar to ASM_OUTPUT_SYMBOL_REF to get this effect in
2948 the "real" output_addr_const. All we need is one for LABEL_REF (and
2949 one for CODE_LABEL?). */
2950
2951 void
cris_output_addr_const(file,x)2952 cris_output_addr_const (file, x)
2953 FILE *file;
2954 rtx x;
2955 {
2956 int is_plt = 0;
2957
2958 restart:
2959 switch (GET_CODE (x))
2960 {
2961 case UNSPEC:
2962 ASSERT_PLT_UNSPEC (x);
2963 x = XVECEXP (x, 0, 0);
2964 is_plt = 1;
2965
2966 /* Fall through. */
2967 case SYMBOL_REF:
2968 if (flag_pic)
2969 {
2970 const char *origstr = XSTR (x, 0);
2971 const char *str;
2972
2973 str = (* targetm.strip_name_encoding) (origstr);
2974
2975 if (is_plt)
2976 {
2977 if (cris_pic_sympart_only)
2978 {
2979 assemble_name (file, str);
2980 fprintf (file, ":PLTG");
2981 }
2982 else
2983 {
2984 if (TARGET_AVOID_GOTPLT)
2985 /* We shouldn't get here. */
2986 abort ();
2987
2988 fprintf (file, "[$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]);
2989 assemble_name (file, XSTR (x, 0));
2990
2991 if (flag_pic == 1)
2992 fprintf (file, ":GOTPLT16]");
2993 else
2994 fprintf (file, ":GOTPLT]");
2995 }
2996 }
2997 else if (cris_gotless_symbol (x))
2998 {
2999 if (! cris_pic_sympart_only)
3000 fprintf (file, "$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]);
3001 assemble_name (file, str);
3002 fprintf (file, ":GOTOFF");
3003 }
3004 else if (cris_got_symbol (x))
3005 {
3006 if (cris_pic_sympart_only)
3007 abort ();
3008 fprintf (file, "[$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]);
3009 assemble_name (file, XSTR (x, 0));
3010
3011 if (flag_pic == 1)
3012 fprintf (file, ":GOT16]");
3013 else
3014 fprintf (file, ":GOT]");
3015 }
3016 else
3017 LOSE_AND_RETURN ("unexpected PIC symbol", x);
3018
3019 /* Sanity check. */
3020 if (! current_function_uses_pic_offset_table)
3021 output_operand_lossage ("PIC register isn't set up");
3022 }
3023 else
3024 assemble_name (file, XSTR (x, 0));
3025 break;
3026
3027 case LABEL_REF:
3028 /* If we get one of those here, it should be dressed as PIC. Branch
3029 labels are normally output with the 'l' specifier, which means it
3030 will go directly to output_asm_label and not end up here. */
3031 if (GET_CODE (XEXP (x, 0)) != CODE_LABEL
3032 && (GET_CODE (XEXP (x, 0)) != NOTE
3033 || NOTE_LINE_NUMBER (XEXP (x, 0)) != NOTE_INSN_DELETED_LABEL))
3034 fatal_insn ("unexpected address expression", x);
3035
3036 if (flag_pic)
3037 {
3038 if (cris_gotless_symbol (x))
3039 {
3040 if (! cris_pic_sympart_only)
3041 fprintf (file, "$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]);
3042 cris_output_addr_const (file, XEXP (x, 0));
3043
3044 fprintf (file, ":GOTOFF");
3045 }
3046 else
3047 /* Labels are never marked as global symbols. */
3048 fatal_insn ("unexpected PIC symbol", x);
3049
3050 /* Sanity check. */
3051 if (! current_function_uses_pic_offset_table)
3052 internal_error ("emitting PIC operand, but PIC register isn't set up");
3053 break;
3054 }
3055
3056 output_addr_const (file, x);
3057 break;
3058
3059 case NOTE:
3060 if (NOTE_LINE_NUMBER (x) != NOTE_INSN_DELETED_LABEL)
3061 fatal_insn ("unexpected NOTE as addr_const:", x);
3062 case CODE_LABEL:
3063 case CONST_INT:
3064 case CONST_DOUBLE:
3065 case ZERO_EXTEND:
3066 case SIGN_EXTEND:
3067 output_addr_const (file, x);
3068 break;
3069
3070 case CONST:
3071 /* This used to output parentheses around the expression,
3072 but that does not work on the 386 (either ATT or BSD assembler). */
3073 cris_output_addr_const (file, XEXP (x, 0));
3074 break;
3075
3076 case PLUS:
3077 /* Some assemblers need integer constants to appear last (eg masm). */
3078 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3079 {
3080 cris_output_addr_const (file, XEXP (x, 1));
3081 if (INTVAL (XEXP (x, 0)) >= 0)
3082 fprintf (file, "+");
3083 output_addr_const (file, XEXP (x, 0));
3084 }
3085 else
3086 {
3087 cris_output_addr_const (file, XEXP (x, 0));
3088 if (GET_CODE (XEXP (x, 1)) != CONST_INT
3089 || INTVAL (XEXP (x, 1)) >= 0)
3090 fprintf (file, "+");
3091 cris_output_addr_const (file, XEXP (x, 1));
3092 }
3093 break;
3094
3095 case MINUS:
3096 /* Avoid outputting things like x-x or x+5-x,
3097 since some assemblers can't handle that. */
3098 x = simplify_subtraction (x);
3099 if (GET_CODE (x) != MINUS)
3100 goto restart;
3101
3102 cris_output_addr_const (file, XEXP (x, 0));
3103 fprintf (file, "-");
3104 if ((GET_CODE (XEXP (x, 1)) == CONST_INT
3105 && INTVAL (XEXP (x, 1)) < 0)
3106 || GET_CODE (XEXP (x, 1)) != CONST_INT)
3107 {
3108 fprintf (file, "%s", targetm.asm_out.open_paren);
3109 cris_output_addr_const (file, XEXP (x, 1));
3110 fprintf (file, "%s", targetm.asm_out.close_paren);
3111 }
3112 else
3113 output_addr_const (file, XEXP (x, 1));
3114 break;
3115
3116 default:
3117 LOSE_AND_RETURN ("unexpected address expression", x);
3118 }
3119 }
3120
3121 /* Code-in whether we can get away without a GOT entry (needed for
3122 externally visible objects but not for functions) into
3123 SYMBOL_REF_FLAG and add the PLT suffix for global functions. */
3124
3125 static void
cris_encode_section_info(exp,first)3126 cris_encode_section_info (exp, first)
3127 tree exp;
3128 int first ATTRIBUTE_UNUSED;
3129 {
3130 if (flag_pic)
3131 {
3132 rtx rtl = DECL_P (exp) ? DECL_RTL (exp) : TREE_CST_RTL (exp);
3133
3134 if (GET_CODE (rtl) == MEM && GET_CODE (XEXP (rtl, 0)) == SYMBOL_REF)
3135 SYMBOL_REF_FLAG (XEXP (rtl, 0)) = (*targetm.binds_local_p) (exp);
3136 }
3137 }
3138
3139 #if 0
3140 /* Various small functions to replace macros. Only called from a
3141 debugger. They might collide with gcc functions or system functions,
3142 so only emit them when '#if 1' above. */
3143
3144 enum rtx_code Get_code PARAMS ((rtx));
3145
3146 enum rtx_code
3147 Get_code (x)
3148 rtx x;
3149 {
3150 return GET_CODE (x);
3151 }
3152
3153 const char *Get_mode PARAMS ((rtx));
3154
3155 const char *
3156 Get_mode (x)
3157 rtx x;
3158 {
3159 return GET_MODE_NAME (GET_MODE (x));
3160 }
3161
3162 rtx Xexp PARAMS ((rtx, int));
3163
3164 rtx
3165 Xexp (x, n)
3166 rtx x;
3167 int n;
3168 {
3169 return XEXP (x, n);
3170 }
3171
3172 rtx Xvecexp PARAMS ((rtx, int, int));
3173
3174 rtx
3175 Xvecexp (x, n, m)
3176 rtx x;
3177 int n;
3178 {
3179 return XVECEXP (x, n, m);
3180 }
3181
3182 int Get_rtx_len PARAMS ((rtx));
3183
3184 int
3185 Get_rtx_len (x)
3186 rtx x;
3187 {
3188 return GET_RTX_LENGTH (GET_CODE (x));
3189 }
3190
3191 /* Use upper-case to distinguish from local variables that are sometimes
3192 called next_insn and prev_insn. */
3193
3194 rtx Next_insn PARAMS ((rtx));
3195
3196 rtx
3197 Next_insn (insn)
3198 rtx insn;
3199 {
3200 return NEXT_INSN (insn);
3201 }
3202
3203 rtx Prev_insn PARAMS ((rtx));
3204
3205 rtx
3206 Prev_insn (insn)
3207 rtx insn;
3208 {
3209 return PREV_INSN (insn);
3210 }
3211 #endif
3212
3213 #include "gt-cris.h"
3214
3215 /*
3216 * Local variables:
3217 * eval: (c-set-style "gnu")
3218 * indent-tabs-mode: t
3219 * End:
3220 */
3221