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/dports/sysutils/u-boot-rock64/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_px30.c291 struct px30_cru *cru = priv->cru; in px30_i2c_get_clk() local
321 struct px30_cru *cru = priv->cru; in px30_i2c_set_clk() local
425 struct px30_cru *cru = priv->cru; in px30_i2s_get_clk() local
451 struct px30_cru *cru = priv->cru; in px30_i2s_set_clk() local
482 struct px30_cru *cru = priv->cru; in px30_nandc_get_clk() local
494 struct px30_cru *cru = priv->cru; in px30_nandc_set_clk() local
514 struct px30_cru *cru = priv->cru; in px30_mmc_get_clk() local
544 struct px30_cru *cru = priv->cru; in px30_mmc_set_clk() local
586 struct px30_cru *cru = priv->cru; in px30_pwm_get_clk() local
608 struct px30_cru *cru = priv->cru; in px30_pwm_set_clk() local
[all …]
/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3128.c42 static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll()
144 static void rkclk_init(struct rk3128_cru *cru) in rkclk_init()
242 static u32 rkclk_pll_get_rate(struct rk3128_cru *cru, in rkclk_pll_get_rate()
282 static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_get_clk()
311 static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_set_clk()
350 static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id) in rk3128_peri_get_pclk()
371 static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_peri_set_pclk()
395 static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru) in rk3128_saradc_get_clk()
406 static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz) in rk3128_saradc_set_clk()
420 static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_vop_set_clk()
[all …]
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/clk/rockchip/
H A Dclk_rk3128.c38 static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll()
140 static void rkclk_init(struct rk3128_cru *cru) in rkclk_init()
238 static u32 rkclk_pll_get_rate(struct rk3128_cru *cru, in rkclk_pll_get_rate()
278 static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_get_clk()
307 static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_set_clk()
346 static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id) in rk3128_peri_get_pclk()
367 static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_peri_set_pclk()
391 static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru) in rk3128_saradc_get_clk()
402 static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz) in rk3128_saradc_set_clk()
416 static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_vop_set_clk()
[all …]
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/clk/rockchip/
H A Dclk_rk3128.c38 static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll()
140 static void rkclk_init(struct rk3128_cru *cru) in rkclk_init()
238 static u32 rkclk_pll_get_rate(struct rk3128_cru *cru, in rkclk_pll_get_rate()
278 static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_get_clk()
307 static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_set_clk()
346 static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id) in rk3128_peri_get_pclk()
367 static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_peri_set_pclk()
391 static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru) in rk3128_saradc_get_clk()
402 static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz) in rk3128_saradc_set_clk()
416 static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_vop_set_clk()
[all …]
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3128.c42 static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll()
144 static void rkclk_init(struct rk3128_cru *cru) in rkclk_init()
242 static u32 rkclk_pll_get_rate(struct rk3128_cru *cru, in rkclk_pll_get_rate()
282 static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_get_clk()
311 static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_set_clk()
350 static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id) in rk3128_peri_get_pclk()
371 static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_peri_set_pclk()
395 static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru) in rk3128_saradc_get_clk()
406 static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz) in rk3128_saradc_set_clk()
420 static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_vop_set_clk()
[all …]
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3128.c42 static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll()
144 static void rkclk_init(struct rk3128_cru *cru) in rkclk_init()
242 static u32 rkclk_pll_get_rate(struct rk3128_cru *cru, in rkclk_pll_get_rate()
282 static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_get_clk()
311 static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_set_clk()
350 static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id) in rk3128_peri_get_pclk()
371 static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_peri_set_pclk()
395 static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru) in rk3128_saradc_get_clk()
406 static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz) in rk3128_saradc_set_clk()
420 static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_vop_set_clk()
[all …]
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3128.c42 static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll()
144 static void rkclk_init(struct rk3128_cru *cru) in rkclk_init()
242 static u32 rkclk_pll_get_rate(struct rk3128_cru *cru, in rkclk_pll_get_rate()
282 static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_get_clk()
311 static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_set_clk()
350 static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id) in rk3128_peri_get_pclk()
371 static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_peri_set_pclk()
395 static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru) in rk3128_saradc_get_clk()
406 static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz) in rk3128_saradc_set_clk()
420 static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_vop_set_clk()
[all …]
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3128.c42 static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll()
144 static void rkclk_init(struct rk3128_cru *cru) in rkclk_init()
242 static u32 rkclk_pll_get_rate(struct rk3128_cru *cru, in rkclk_pll_get_rate()
282 static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_get_clk()
311 static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_set_clk()
350 static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id) in rk3128_peri_get_pclk()
371 static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_peri_set_pclk()
395 static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru) in rk3128_saradc_get_clk()
406 static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz) in rk3128_saradc_set_clk()
420 static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_vop_set_clk()
[all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/clk/rockchip/
H A Dclk_rk3128.c38 static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll()
140 static void rkclk_init(struct rk3128_cru *cru) in rkclk_init()
238 static u32 rkclk_pll_get_rate(struct rk3128_cru *cru, in rkclk_pll_get_rate()
278 static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_get_clk()
307 static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_set_clk()
346 static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id) in rk3128_peri_get_pclk()
367 static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_peri_set_pclk()
391 static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru) in rk3128_saradc_get_clk()
402 static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz) in rk3128_saradc_set_clk()
416 static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_vop_set_clk()
[all …]
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3128.c42 static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll()
144 static void rkclk_init(struct rk3128_cru *cru) in rkclk_init()
242 static u32 rkclk_pll_get_rate(struct rk3128_cru *cru, in rkclk_pll_get_rate()
282 static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_get_clk()
311 static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_set_clk()
350 static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id) in rk3128_peri_get_pclk()
371 static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_peri_set_pclk()
395 static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru) in rk3128_saradc_get_clk()
406 static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz) in rk3128_saradc_set_clk()
420 static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_vop_set_clk()
[all …]
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3128.c42 static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll()
144 static void rkclk_init(struct rk3128_cru *cru) in rkclk_init()
242 static u32 rkclk_pll_get_rate(struct rk3128_cru *cru, in rkclk_pll_get_rate()
282 static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_get_clk()
311 static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_set_clk()
350 static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id) in rk3128_peri_get_pclk()
371 static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_peri_set_pclk()
395 static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru) in rk3128_saradc_get_clk()
406 static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz) in rk3128_saradc_set_clk()
420 static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_vop_set_clk()
[all …]
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3128.c42 static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll()
144 static void rkclk_init(struct rk3128_cru *cru) in rkclk_init()
242 static u32 rkclk_pll_get_rate(struct rk3128_cru *cru, in rkclk_pll_get_rate()
282 static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_get_clk()
311 static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_set_clk()
350 static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id) in rk3128_peri_get_pclk()
371 static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_peri_set_pclk()
395 static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru) in rk3128_saradc_get_clk()
406 static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz) in rk3128_saradc_set_clk()
420 static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_vop_set_clk()
[all …]
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3128.c42 static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll()
144 static void rkclk_init(struct rk3128_cru *cru) in rkclk_init()
242 static u32 rkclk_pll_get_rate(struct rk3128_cru *cru, in rkclk_pll_get_rate()
282 static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_get_clk()
311 static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_set_clk()
350 static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id) in rk3128_peri_get_pclk()
371 static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_peri_set_pclk()
395 static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru) in rk3128_saradc_get_clk()
406 static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz) in rk3128_saradc_set_clk()
420 static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_vop_set_clk()
[all …]
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3128.c42 static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll()
144 static void rkclk_init(struct rk3128_cru *cru) in rkclk_init()
242 static u32 rkclk_pll_get_rate(struct rk3128_cru *cru, in rkclk_pll_get_rate()
282 static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_get_clk()
311 static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_set_clk()
350 static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id) in rk3128_peri_get_pclk()
371 static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_peri_set_pclk()
395 static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru) in rk3128_saradc_get_clk()
406 static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz) in rk3128_saradc_set_clk()
420 static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_vop_set_clk()
[all …]
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3128.c42 static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll()
144 static void rkclk_init(struct rk3128_cru *cru) in rkclk_init()
242 static u32 rkclk_pll_get_rate(struct rk3128_cru *cru, in rkclk_pll_get_rate()
282 static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_get_clk()
311 static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_set_clk()
350 static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id) in rk3128_peri_get_pclk()
371 static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_peri_set_pclk()
395 static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru) in rk3128_saradc_get_clk()
406 static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz) in rk3128_saradc_set_clk()
420 static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_vop_set_clk()
[all …]
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3128.c42 static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll()
144 static void rkclk_init(struct rk3128_cru *cru) in rkclk_init()
242 static u32 rkclk_pll_get_rate(struct rk3128_cru *cru, in rkclk_pll_get_rate()
282 static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_get_clk()
311 static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_set_clk()
350 static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id) in rk3128_peri_get_pclk()
371 static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_peri_set_pclk()
395 static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru) in rk3128_saradc_get_clk()
406 static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz) in rk3128_saradc_set_clk()
420 static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_vop_set_clk()
[all …]
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3128.c42 static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll()
144 static void rkclk_init(struct rk3128_cru *cru) in rkclk_init()
242 static u32 rkclk_pll_get_rate(struct rk3128_cru *cru, in rkclk_pll_get_rate()
282 static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_get_clk()
311 static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_set_clk()
350 static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id) in rk3128_peri_get_pclk()
371 static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_peri_set_pclk()
395 static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru) in rk3128_saradc_get_clk()
406 static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz) in rk3128_saradc_set_clk()
420 static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_vop_set_clk()
[all …]
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3128.c42 static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll()
144 static void rkclk_init(struct rk3128_cru *cru) in rkclk_init()
242 static u32 rkclk_pll_get_rate(struct rk3128_cru *cru, in rkclk_pll_get_rate()
282 static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_get_clk()
311 static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_set_clk()
350 static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id) in rk3128_peri_get_pclk()
371 static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_peri_set_pclk()
395 static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru) in rk3128_saradc_get_clk()
406 static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz) in rk3128_saradc_set_clk()
420 static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_vop_set_clk()
[all …]
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3128.c42 static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll()
144 static void rkclk_init(struct rk3128_cru *cru) in rkclk_init()
242 static u32 rkclk_pll_get_rate(struct rk3128_cru *cru, in rkclk_pll_get_rate()
282 static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_get_clk()
311 static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_set_clk()
350 static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id) in rk3128_peri_get_pclk()
371 static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_peri_set_pclk()
395 static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru) in rk3128_saradc_get_clk()
406 static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz) in rk3128_saradc_set_clk()
420 static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_vop_set_clk()
[all …]
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3128.c42 static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll()
144 static void rkclk_init(struct rk3128_cru *cru) in rkclk_init()
242 static u32 rkclk_pll_get_rate(struct rk3128_cru *cru, in rkclk_pll_get_rate()
282 static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_get_clk()
311 static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_set_clk()
350 static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id) in rk3128_peri_get_pclk()
371 static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_peri_set_pclk()
395 static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru) in rk3128_saradc_get_clk()
406 static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz) in rk3128_saradc_set_clk()
420 static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_vop_set_clk()
[all …]
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3128.c42 static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll()
144 static void rkclk_init(struct rk3128_cru *cru) in rkclk_init()
242 static u32 rkclk_pll_get_rate(struct rk3128_cru *cru, in rkclk_pll_get_rate()
282 static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_get_clk()
311 static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_set_clk()
350 static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id) in rk3128_peri_get_pclk()
371 static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_peri_set_pclk()
395 static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru) in rk3128_saradc_get_clk()
406 static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz) in rk3128_saradc_set_clk()
420 static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_vop_set_clk()
[all …]
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3128.c42 static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll()
144 static void rkclk_init(struct rk3128_cru *cru) in rkclk_init()
242 static u32 rkclk_pll_get_rate(struct rk3128_cru *cru, in rkclk_pll_get_rate()
282 static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_get_clk()
311 static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_set_clk()
350 static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id) in rk3128_peri_get_pclk()
371 static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_peri_set_pclk()
395 static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru) in rk3128_saradc_get_clk()
406 static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz) in rk3128_saradc_set_clk()
420 static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_vop_set_clk()
[all …]
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3128.c42 static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll()
144 static void rkclk_init(struct rk3128_cru *cru) in rkclk_init()
242 static u32 rkclk_pll_get_rate(struct rk3128_cru *cru, in rkclk_pll_get_rate()
282 static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_get_clk()
311 static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_set_clk()
350 static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id) in rk3128_peri_get_pclk()
371 static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_peri_set_pclk()
395 static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru) in rk3128_saradc_get_clk()
406 static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz) in rk3128_saradc_set_clk()
420 static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_vop_set_clk()
[all …]
/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3128.c42 static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll()
144 static void rkclk_init(struct rk3128_cru *cru) in rkclk_init()
242 static u32 rkclk_pll_get_rate(struct rk3128_cru *cru, in rkclk_pll_get_rate()
282 static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_get_clk()
311 static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_set_clk()
350 static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id) in rk3128_peri_get_pclk()
371 static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_peri_set_pclk()
395 static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru) in rk3128_saradc_get_clk()
406 static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz) in rk3128_saradc_set_clk()
420 static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_vop_set_clk()
[all …]
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3128.c42 static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll()
144 static void rkclk_init(struct rk3128_cru *cru) in rkclk_init()
242 static u32 rkclk_pll_get_rate(struct rk3128_cru *cru, in rkclk_pll_get_rate()
282 static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_get_clk()
311 static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_set_clk()
350 static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id) in rk3128_peri_get_pclk()
371 static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_peri_set_pclk()
395 static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru) in rk3128_saradc_get_clk()
406 static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz) in rk3128_saradc_set_clk()
420 static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_vop_set_clk()
[all …]

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