1 /*
2 * UAE - The Un*x Amiga Emulator
3 *
4 * Memory management
5 *
6 * (c) 1995 Bernd Schmidt
7 */
8
9 #define DEBUG_STUPID 0
10
11 #include "sysconfig.h"
12 #include "sysdeps.h"
13
14 #include "options.h"
15 #include "uae.h"
16 #include "memory_uae.h"
17 #include "rommgr.h"
18 #include "ersatz.h"
19 #include "zfile.h"
20 #include "custom.h"
21 #include "events.h"
22 #include "newcpu.h"
23 #include "autoconf.h"
24 #include "savestate.h"
25 #include "ar.h"
26 #include "crc32.h"
27 #include "gui.h"
28 #include "cdtv.h"
29 #include "akiko.h"
30 #include "arcadia.h"
31 #include "enforcer.h"
32 #include "a2091.h"
33 #include "gayle.h"
34 #include "debug.h"
35 #include "misc.h"
36 #include "zfile.h"
37
38 extern uae_u8 *natmem_offset, *natmem_offset_end;
39
40 #ifdef USE_MAPPED_MEMORY
41 #include <sys/mman.h>
42 #endif
43
44 bool canbang;
45 int candirect = -1;
46 static bool rom_write_enabled;
47 #ifdef JIT
48 /* Set by each memory handler that does not simply access real memory. */
49 int special_mem;
50 #endif
51 static int mem_hardreset;
52
53 #define IPC_PRIVATE 1
54 #define IPC_RMID 2
55 #define IPC_CREAT 4
56 #define IPC_STAT 8
57
58 /* internal prototypes */
59 #ifdef AGA
60 uae_u32 REGPARAM2 chipmem_lget_ce2 (uaecptr addr);
61 uae_u32 REGPARAM2 chipmem_wget_ce2 (uaecptr addr);
62 uae_u32 REGPARAM2 chipmem_bget_ce2 (uaecptr addr);
63 void REGPARAM2 chipmem_lput_ce2 (uaecptr addr, uae_u32 l);
64 void REGPARAM2 chipmem_wput_ce2 (uaecptr addr, uae_u32 w);
65 void REGPARAM2 chipmem_bput_ce2 (uaecptr addr, uae_u32 b);
66 #endif
67 uae_u32 REGPARAM2 chipmem_lget (uaecptr addr);
68 uae_u32 REGPARAM2 chipmem_wget (uaecptr addr);
69 uae_u32 REGPARAM2 chipmem_bget (uaecptr addr);
70 void REGPARAM2 chipmem_dummy_bput (uaecptr addr, uae_u32 b);
71 void REGPARAM2 chipmem_dummy_wput (uaecptr addr, uae_u32 b);
72 void REGPARAM2 chipmem_dummy_lput (uaecptr addr, uae_u32 b);
73 uae_u32 REGPARAM2 chipmem_agnus_lget (uaecptr addr);
74 uae_u32 REGPARAM2 chipmem_agnus_bget (uaecptr addr);
75 void REGPARAM2 chipmem_agnus_lput (uaecptr addr, uae_u32 l);
76 void REGPARAM2 chipmem_agnus_bput (uaecptr addr, uae_u32 b);
77 static uae_u32 REGPARAM3 kickmem_lget (uaecptr) REGPARAM;
78 static uae_u32 REGPARAM3 kickmem_wget (uaecptr) REGPARAM;
79 static uae_u32 REGPARAM3 kickmem_bget (uaecptr) REGPARAM;
80 static void REGPARAM3 kickmem_lput (uaecptr, uae_u32) REGPARAM;
81 static void REGPARAM3 kickmem_wput (uaecptr, uae_u32) REGPARAM;
82 static void REGPARAM3 kickmem_bput (uaecptr, uae_u32) REGPARAM;
83 static int REGPARAM3 kickmem_check (uaecptr addr, uae_u32 size) REGPARAM;
84 void REGPARAM2 kickmem2_lput (uaecptr addr, uae_u32 l);
85 void REGPARAM2 kickmem2_wput (uaecptr addr, uae_u32 w);
86 void REGPARAM2 kickmem2_bput (uaecptr addr, uae_u32 b);
87 static uae_u8 *REGPARAM3 kickmem_xlate (uaecptr addr) REGPARAM;
88 void memcpyha (uaecptr dst, const uae_u8 *src, int size);
89
90
91 /* external prototypes */
92 uae_u32 uaerand (void);
93
94
isdirectjit(void)95 static bool isdirectjit (void)
96 {
97 #ifdef JIT
98 return currprefs.cachesize && !currprefs.comptrustbyte;
99 #else
100 return 0;
101 #endif
102 }
103
canjit(void)104 static bool canjit (void)
105 {
106 #ifdef JIT
107 if (currprefs.cpu_model < 68020 || currprefs.address_space_24)
108 return false;
109 return true;
110 #else
111 return false;
112 #endif
113 }
needmman(void)114 static bool needmman (void)
115 {
116 if (canjit ())
117 return true;
118 return false;
119 }
120
nocanbang(void)121 static void nocanbang (void)
122 {
123 canbang = 0;
124 }
125
126 uae_u32 allocated_chipmem;
127 uae_u32 allocated_fastmem;
128 uae_u32 allocated_bogomem;
129 uae_u32 allocated_gfxmem;
130 uae_u32 allocated_z3fastmem, allocated_z3fastmem2, allocated_z3chipmem;
131 uae_u32 allocated_a3000lmem;
132 uae_u32 allocated_a3000hmem;
133 uae_u32 allocated_cardmem;
134 uae_u8 ce_banktype[65536];
135 uae_u8 ce_cachable[65536];
136
137 static size_t bootrom_filepos, chip_filepos, bogo_filepos, rom_filepos, a3000lmem_filepos, a3000hmem_filepos;
138
139 /* Set if we notice during initialization that settings changed,
140 and we must clear all memory to prevent bogus contents from confusing
141 the Kickstart. */
142 static bool need_hardreset;
143 static bool bogomem_aliasing;
144
145 /* The address space setting used during the last reset. */
146 static bool last_address_space_24;
147
148 addrbank *mem_banks[MEMORY_BANKS];
149
150 /* This has two functions. It either holds a host address that, when added
151 to the 68k address, gives the host address corresponding to that 68k
152 address (in which case the value in this array is even), OR it holds the
153 same value as mem_banks, for those banks that have baseaddr==0. In that
154 case, bit 0 is set (the memory access routines will take care of it). */
155
156 uae_u8 *baseaddr[MEMORY_BANKS];
157
158 #ifdef NO_INLINE_MEMORY_ACCESS
longget(uaecptr addr)159 __inline__ uae_u32 longget (uaecptr addr)
160 {
161 return call_mem_get_func (get_mem_bank (addr).lget, addr);
162 }
wordget(uaecptr addr)163 __inline__ uae_u32 wordget (uaecptr addr)
164 {
165 return call_mem_get_func (get_mem_bank (addr).wget, addr);
166 }
byteget(uaecptr addr)167 __inline__ uae_u32 byteget (uaecptr addr)
168 {
169 return call_mem_get_func (get_mem_bank (addr).bget, addr);
170 }
longput(uaecptr addr,uae_u32 l)171 __inline__ void longput (uaecptr addr, uae_u32 l)
172 {
173 call_mem_put_func (get_mem_bank (addr).lput, addr, l);
174 }
wordput(uaecptr addr,uae_u32 w)175 __inline__ void wordput (uaecptr addr, uae_u32 w)
176 {
177 call_mem_put_func (get_mem_bank (addr).wput, addr, w);
178 }
byteput(uaecptr addr,uae_u32 b)179 __inline__ void byteput (uaecptr addr, uae_u32 b)
180 {
181 call_mem_put_func (get_mem_bank (addr).bput, addr, b);
182 }
183 #endif
184
addr_valid(const TCHAR * txt,uaecptr addr,uae_u32 len)185 int addr_valid (const TCHAR *txt, uaecptr addr, uae_u32 len)
186 {
187 addrbank *ab = &get_mem_bank(addr);
188 if (ab == 0 || !(ab->flags & (ABFLAG_RAM | ABFLAG_ROM)) || addr < 0x100 || len > 16777215 || !valid_address (addr, len)) {
189 write_log (_T("corrupt %s pointer %x (%d) detected!\n"), txt, addr, len);
190 return 0;
191 }
192 return 1;
193 }
194
195 uae_u32 chipmem_mask, chipmem_full_mask, chipmem_full_size;
196 uae_u32 kickmem_mask, extendedkickmem_mask, extendedkickmem2_mask, bogomem_mask;
197 uae_u32 a3000lmem_mask, a3000hmem_mask, cardmem_mask;
198
199 static int illegal_count;
200 /* A dummy bank that only contains zeros */
201
202 static uae_u32 REGPARAM3 dummy_lget (uaecptr) REGPARAM;
203 static uae_u32 REGPARAM3 dummy_wget (uaecptr) REGPARAM;
204 static uae_u32 REGPARAM3 dummy_bget (uaecptr) REGPARAM;
205 static void REGPARAM3 dummy_lput (uaecptr, uae_u32) REGPARAM;
206 static void REGPARAM3 dummy_wput (uaecptr, uae_u32) REGPARAM;
207 static void REGPARAM3 dummy_bput (uaecptr, uae_u32) REGPARAM;
208 static int REGPARAM3 dummy_check (uaecptr addr, uae_u32 size) REGPARAM;
209
210 #define MAX_ILG 200
211 #define NONEXISTINGDATA 0
212 //#define NONEXISTINGDATA 0xffffffff
213
dummylog(int rw,uaecptr addr,int size,uae_u32 val,int ins)214 static void dummylog (int rw, uaecptr addr, int size, uae_u32 val, int ins)
215 {
216 if (illegal_count >= MAX_ILG && MAX_ILG > 0)
217 return;
218 /* ignore Zorro3 expansion space */
219 if (addr >= 0xff000000 && addr <= 0xff000200)
220 return;
221 /* autoconfig and extended rom */
222 if (addr >= 0xe00000 && addr <= 0xf7ffff)
223 return;
224 /* motherboard ram */
225 if (addr >= 0x08000000 && addr <= 0x08000007)
226 return;
227 if (addr >= 0x07f00000 && addr <= 0x07f00007)
228 return;
229 if (addr >= 0x07f7fff0 && addr <= 0x07ffffff)
230 return;
231 if (MAX_ILG >= 0)
232 illegal_count++;
233 if (ins) {
234 write_log (_T("WARNING: Illegal opcode %cget at %08x PC=%x\n"),
235 size == 2 ? 'w' : 'l', addr, M68K_GETPC);
236 } else if (rw) {
237 write_log (_T("Illegal %cput at %08x=%08x PC=%x\n"),
238 size == 1 ? 'b' : size == 2 ? 'w' : 'l', addr, val, M68K_GETPC);
239 } else {
240 write_log (_T("Illegal %cget at %08x PC=%x\n"),
241 size == 1 ? 'b' : size == 2 ? 'w' : 'l', addr, M68K_GETPC);
242 }
243 }
244
dummy_get(uaecptr addr,int size)245 static uae_u32 dummy_get (uaecptr addr, int size)
246 {
247 uae_u32 v;
248 if (currprefs.cpu_model >= 68020)
249 return NONEXISTINGDATA;
250 v = (regs.irc << 16) | regs.irc;
251 if (size == 4) {
252 ;
253 } else if (size == 2) {
254 v &= 0xffff;
255 } else {
256 v = (addr & 1) ? (v & 0xff) : ((v >> 8) & 0xff);
257 }
258 #if 0
259 if (addr >= 0x10000000)
260 write_log (_T("%08X %d = %08x\n"), addr, size, v);
261 #endif
262 return v;
263 }
264
dummy_lget(uaecptr addr)265 static uae_u32 REGPARAM2 dummy_lget (uaecptr addr)
266 {
267 #ifdef JIT
268 special_mem |= S_READ;
269 #endif
270 if (currprefs.illegal_mem)
271 dummylog (0, addr, 4, 0, 0);
272 return dummy_get (addr, 4);
273 }
dummy_lgeti(uaecptr addr)274 uae_u32 REGPARAM2 dummy_lgeti (uaecptr addr)
275 {
276 #ifdef JIT
277 special_mem |= S_READ;
278 #endif
279 if (currprefs.illegal_mem)
280 dummylog (0, addr, 4, 0, 1);
281 return dummy_get (addr, 4);
282 }
283
dummy_wget(uaecptr addr)284 static uae_u32 REGPARAM2 dummy_wget (uaecptr addr)
285 {
286 #ifdef JIT
287 special_mem |= S_READ;
288 #endif
289 if (currprefs.illegal_mem)
290 dummylog (0, addr, 2, 0, 0);
291 return dummy_get (addr, 2);
292 }
dummy_wgeti(uaecptr addr)293 uae_u32 REGPARAM2 dummy_wgeti (uaecptr addr)
294 {
295 #ifdef JIT
296 special_mem |= S_READ;
297 #endif
298 if (currprefs.illegal_mem)
299 dummylog (0, addr, 2, 0, 1);
300 return dummy_get (addr, 2);
301 }
302
dummy_bget(uaecptr addr)303 static uae_u32 REGPARAM2 dummy_bget (uaecptr addr)
304 {
305 #ifdef JIT
306 special_mem |= S_READ;
307 #endif
308 if (currprefs.illegal_mem)
309 dummylog (0, addr, 1, 0, 0);
310 return dummy_get (addr, 1);
311 }
312
dummy_lput(uaecptr addr,uae_u32 l)313 static void REGPARAM2 dummy_lput (uaecptr addr, uae_u32 l)
314 {
315 #ifdef JIT
316 special_mem |= S_WRITE;
317 #endif
318 if (currprefs.illegal_mem)
319 dummylog (1, addr, 4, l, 0);
320 }
dummy_wput(uaecptr addr,uae_u32 w)321 static void REGPARAM2 dummy_wput (uaecptr addr, uae_u32 w)
322 {
323 #ifdef JIT
324 special_mem |= S_WRITE;
325 #endif
326 if (currprefs.illegal_mem)
327 dummylog (1, addr, 2, w, 0);
328 }
dummy_bput(uaecptr addr,uae_u32 b)329 static void REGPARAM2 dummy_bput (uaecptr addr, uae_u32 b)
330 {
331 #ifdef JIT
332 special_mem |= S_WRITE;
333 #endif
334 if (currprefs.illegal_mem)
335 dummylog (1, addr, 1, b, 0);
336 }
337
dummy_check(uaecptr addr,uae_u32 size)338 static int REGPARAM2 dummy_check (uaecptr addr, uae_u32 size)
339 {
340 #ifdef JIT
341 special_mem |= S_READ;
342 #endif
343 return 0;
344 }
345
none_put(uaecptr addr,uae_u32 v)346 static void REGPARAM2 none_put (uaecptr addr, uae_u32 v)
347 {
348 #ifdef JIT
349 special_mem |= S_WRITE;
350 #endif
351 }
ones_get(uaecptr addr)352 static uae_u32 REGPARAM2 ones_get (uaecptr addr)
353 {
354 #ifdef JIT
355 special_mem |= S_READ;
356 #endif
357 return 0xffffffff;
358 }
359
360 /* Chip memory */
361
362 uae_u8 *chipmemory;
363
364 static int REGPARAM3 chipmem_check (uaecptr addr, uae_u32 size) REGPARAM;
365 static uae_u8 *REGPARAM3 chipmem_xlate (uaecptr addr) REGPARAM;
366
367 #ifdef AGA
368
369 /* AGA ce-chipram access */
370
ce2_timeout(void)371 static void ce2_timeout (void)
372 {
373 wait_cpu_cycle_read (0, -1);
374 }
375
chipmem_lget_ce2(uaecptr addr)376 uae_u32 REGPARAM2 chipmem_lget_ce2 (uaecptr addr)
377 {
378 uae_u32 *m;
379
380 #ifdef JIT
381 special_mem |= S_READ;
382 #endif
383 addr &= chipmem_mask;
384 m = (uae_u32 *)(chipmemory + addr);
385 ce2_timeout ();
386 return do_get_mem_long (m);
387 }
388
chipmem_wget_ce2(uaecptr addr)389 uae_u32 REGPARAM2 chipmem_wget_ce2 (uaecptr addr)
390 {
391 uae_u16 *m, v;
392
393 #ifdef JIT
394 special_mem |= S_READ;
395 #endif
396 addr &= chipmem_mask;
397 m = (uae_u16 *)(chipmemory + addr);
398 ce2_timeout ();
399 v = do_get_mem_word (m);
400 return v;
401 }
402
chipmem_bget_ce2(uaecptr addr)403 uae_u32 REGPARAM2 chipmem_bget_ce2 (uaecptr addr)
404 {
405 #ifdef JIT
406 special_mem |= S_READ;
407 #endif
408 addr &= chipmem_mask;
409 ce2_timeout ();
410 return chipmemory[addr];
411 }
412
chipmem_lput_ce2(uaecptr addr,uae_u32 l)413 void REGPARAM2 chipmem_lput_ce2 (uaecptr addr, uae_u32 l)
414 {
415 uae_u32 *m;
416
417 #ifdef JIT
418 special_mem |= S_WRITE;
419 #endif
420 addr &= chipmem_mask;
421 m = (uae_u32 *)(chipmemory + addr);
422 ce2_timeout ();
423 do_put_mem_long (m, l);
424 }
425
chipmem_wput_ce2(uaecptr addr,uae_u32 w)426 void REGPARAM2 chipmem_wput_ce2 (uaecptr addr, uae_u32 w)
427 {
428 uae_u16 *m;
429
430 #ifdef JIT
431 special_mem |= S_WRITE;
432 #endif
433 addr &= chipmem_mask;
434 m = (uae_u16 *)(chipmemory + addr);
435 ce2_timeout ();
436 do_put_mem_word (m, w);
437 }
438
chipmem_bput_ce2(uaecptr addr,uae_u32 b)439 void REGPARAM2 chipmem_bput_ce2 (uaecptr addr, uae_u32 b)
440 {
441 #ifdef JIT
442 special_mem |= S_WRITE;
443 #endif
444 addr &= chipmem_mask;
445 ce2_timeout ();
446 chipmemory[addr] = b;
447 }
448
449 #endif
450
chipmem_lget(uaecptr addr)451 uae_u32 REGPARAM2 chipmem_lget (uaecptr addr)
452 {
453 uae_u32 *m;
454
455 addr &= chipmem_mask;
456 m = (uae_u32 *)(chipmemory + addr);
457 return do_get_mem_long (m);
458 }
459
chipmem_wget(uaecptr addr)460 uae_u32 REGPARAM2 chipmem_wget (uaecptr addr)
461 {
462 uae_u16 *m, v;
463
464 addr &= chipmem_mask;
465 m = (uae_u16 *)(chipmemory + addr);
466 v = do_get_mem_word (m);
467 return v;
468 }
469
chipmem_bget(uaecptr addr)470 uae_u32 REGPARAM2 chipmem_bget (uaecptr addr)
471 {
472 uae_u8 v;
473 addr &= chipmem_mask;
474 v = chipmemory[addr];
475 return v;
476 }
477
chipmem_lput(uaecptr addr,uae_u32 l)478 void REGPARAM2 chipmem_lput (uaecptr addr, uae_u32 l)
479 {
480 uae_u32 *m;
481
482 addr &= chipmem_mask;
483 m = (uae_u32 *)(chipmemory + addr);
484 do_put_mem_long (m, l);
485 }
486
chipmem_wput(uaecptr addr,uae_u32 w)487 void REGPARAM2 chipmem_wput (uaecptr addr, uae_u32 w)
488 {
489 uae_u16 *m;
490
491 addr &= chipmem_mask;
492 m = (uae_u16 *)(chipmemory + addr);
493 do_put_mem_word (m, w);
494 }
495
chipmem_bput(uaecptr addr,uae_u32 b)496 void REGPARAM2 chipmem_bput (uaecptr addr, uae_u32 b)
497 {
498 addr &= chipmem_mask;
499 chipmemory[addr] = b;
500 }
501
502 /* cpu chipmem access inside agnus addressable ram but no ram available */
chipmem_dummy(void)503 static uae_u32 chipmem_dummy (void)
504 {
505 /* not really right but something random that has more ones than zeros.. */
506 return 0xffff & ~((1 << (uaerand () & 31)) | (1 << (uaerand () & 31)));
507 }
508
chipmem_dummy_bput(uaecptr addr,uae_u32 b)509 void REGPARAM2 chipmem_dummy_bput (uaecptr addr, uae_u32 b)
510 {
511 #ifdef JIT
512 special_mem |= S_WRITE;
513 #endif
514 }
515
chipmem_dummy_wput(uaecptr addr,uae_u32 b)516 void REGPARAM2 chipmem_dummy_wput (uaecptr addr, uae_u32 b)
517 {
518 #ifdef JIT
519 special_mem |= S_WRITE;
520 #endif
521 }
522
chipmem_dummy_lput(uaecptr addr,uae_u32 b)523 void REGPARAM2 chipmem_dummy_lput (uaecptr addr, uae_u32 b)
524 {
525 #ifdef JIT
526 special_mem |= S_WRITE;
527 #endif
528 }
529
chipmem_dummy_bget(uaecptr addr)530 static uae_u32 REGPARAM2 chipmem_dummy_bget (uaecptr addr)
531 {
532 #ifdef JIT
533 special_mem |= S_READ;
534 #endif
535 return chipmem_dummy ();
536 }
537
chipmem_dummy_wget(uaecptr addr)538 static uae_u32 REGPARAM2 chipmem_dummy_wget (uaecptr addr)
539 {
540 #ifdef JIT
541 special_mem |= S_READ;
542 #endif
543 return chipmem_dummy ();
544 }
545
chipmem_dummy_lget(uaecptr addr)546 static uae_u32 REGPARAM2 chipmem_dummy_lget (uaecptr addr)
547 {
548 #ifdef JIT
549 special_mem |= S_READ;
550 #endif
551 return (chipmem_dummy () << 16) | chipmem_dummy ();
552 }
553
chipmem_agnus_lget(uaecptr addr)554 uae_u32 REGPARAM2 chipmem_agnus_lget (uaecptr addr)
555 {
556 uae_u32 *m;
557
558 addr &= chipmem_full_mask;
559 m = (uae_u32 *)(chipmemory + addr);
560 return do_get_mem_long (m);
561 }
562
chipmem_agnus_wget(uaecptr addr)563 uae_u32 REGPARAM2 chipmem_agnus_wget (uaecptr addr)
564 {
565 uae_u16 *m;
566
567 addr &= chipmem_full_mask;
568 m = (uae_u16 *)(chipmemory + addr);
569 return do_get_mem_word (m);
570 }
571
chipmem_agnus_bget(uaecptr addr)572 uae_u32 REGPARAM2 chipmem_agnus_bget (uaecptr addr)
573 {
574 addr &= chipmem_full_mask;
575 return chipmemory[addr];
576 }
577
chipmem_agnus_lput(uaecptr addr,uae_u32 l)578 void REGPARAM2 chipmem_agnus_lput (uaecptr addr, uae_u32 l)
579 {
580 uae_u32 *m;
581
582 addr &= chipmem_full_mask;
583 if (addr >= chipmem_full_size)
584 return;
585 m = (uae_u32 *)(chipmemory + addr);
586 do_put_mem_long (m, l);
587 }
588
chipmem_agnus_wput(uaecptr addr,uae_u32 w)589 void REGPARAM2 chipmem_agnus_wput (uaecptr addr, uae_u32 w)
590 {
591 uae_u16 *m;
592
593 addr &= chipmem_full_mask;
594 if (addr >= chipmem_full_size)
595 return;
596 m = (uae_u16 *)(chipmemory + addr);
597 do_put_mem_word (m, w);
598 }
599
chipmem_agnus_bput(uaecptr addr,uae_u32 b)600 void REGPARAM2 chipmem_agnus_bput (uaecptr addr, uae_u32 b)
601 {
602 addr &= chipmem_full_mask;
603 if (addr >= chipmem_full_size)
604 return;
605 chipmemory[addr] = b;
606 }
607
chipmem_check(uaecptr addr,uae_u32 size)608 static int REGPARAM2 chipmem_check (uaecptr addr, uae_u32 size)
609 {
610 addr &= chipmem_mask;
611 return (addr + size) <= chipmem_full_size;
612 }
613
chipmem_xlate(uaecptr addr)614 static uae_u8 *REGPARAM2 chipmem_xlate (uaecptr addr)
615 {
616 addr &= chipmem_mask;
617 return chipmemory + addr;
618 }
619
chipmem_lput_bigmem(uaecptr addr,uae_u32 v)620 STATIC_INLINE void REGPARAM2 chipmem_lput_bigmem (uaecptr addr, uae_u32 v)
621 {
622 put_long (addr, v);
623 }
chipmem_wput_bigmem(uaecptr addr,uae_u32 v)624 STATIC_INLINE void REGPARAM2 chipmem_wput_bigmem (uaecptr addr, uae_u32 v)
625 {
626 put_word (addr, v);
627 }
chipmem_bput_bigmem(uaecptr addr,uae_u32 v)628 STATIC_INLINE void REGPARAM2 chipmem_bput_bigmem (uaecptr addr, uae_u32 v)
629 {
630 put_byte (addr, v);
631 }
chipmem_lget_bigmem(uaecptr addr)632 STATIC_INLINE uae_u32 REGPARAM2 chipmem_lget_bigmem (uaecptr addr)
633 {
634 return get_long (addr);
635 }
chipmem_wget_bigmem(uaecptr addr)636 STATIC_INLINE uae_u32 REGPARAM2 chipmem_wget_bigmem (uaecptr addr)
637 {
638 return get_word (addr);
639 }
chipmem_bget_bigmem(uaecptr addr)640 STATIC_INLINE uae_u32 REGPARAM2 chipmem_bget_bigmem (uaecptr addr)
641 {
642 return get_byte (addr);
643 }
chipmem_check_bigmem(uaecptr addr,uae_u32 size)644 STATIC_INLINE int REGPARAM2 chipmem_check_bigmem (uaecptr addr, uae_u32 size)
645 {
646 return valid_address (addr, size);
647 }
chipmem_xlate_bigmem(uaecptr addr)648 STATIC_INLINE uae_u8* REGPARAM2 chipmem_xlate_bigmem (uaecptr addr)
649 {
650 return get_real_address (addr);
651 }
652
653 uae_u32 (REGPARAM2 *chipmem_lget_indirect)(uaecptr);
654 uae_u32 (REGPARAM2 *chipmem_wget_indirect)(uaecptr);
655 uae_u32 (REGPARAM2 *chipmem_bget_indirect)(uaecptr);
656 void (REGPARAM2 *chipmem_lput_indirect)(uaecptr, uae_u32);
657 void (REGPARAM2 *chipmem_wput_indirect)(uaecptr, uae_u32);
658 void (REGPARAM2 *chipmem_bput_indirect)(uaecptr, uae_u32);
659 int (REGPARAM2 *chipmem_check_indirect)(uaecptr, uae_u32);
660 uae_u8 *(REGPARAM2 *chipmem_xlate_indirect)(uaecptr);
661
chipmem_setindirect(void)662 static void chipmem_setindirect (void)
663 {
664 if (currprefs.z3chipmem_size) {
665 chipmem_lget_indirect = chipmem_lget_bigmem;
666 chipmem_wget_indirect = chipmem_wget_bigmem;
667 chipmem_bget_indirect = chipmem_bget_bigmem;
668 chipmem_lput_indirect = chipmem_lput_bigmem;
669 chipmem_wput_indirect = chipmem_wput_bigmem;
670 chipmem_bput_indirect = chipmem_bput_bigmem;
671 chipmem_check_indirect = chipmem_check_bigmem;
672 chipmem_xlate_indirect = chipmem_xlate_bigmem;
673 } else {
674 chipmem_lget_indirect = chipmem_lget;
675 chipmem_wget_indirect = chipmem_agnus_wget;
676 chipmem_bget_indirect = chipmem_agnus_bget;
677 chipmem_lput_indirect = chipmem_lput;
678 chipmem_wput_indirect = chipmem_agnus_wput;
679 chipmem_bput_indirect = chipmem_agnus_bput;
680 chipmem_check_indirect = chipmem_check;
681 chipmem_xlate_indirect = chipmem_xlate;
682 }
683 }
684
685 /* Slow memory */
686
687 static uae_u8 *bogomemory;
688 static int bogomemory_allocated;
689
690 static uae_u32 REGPARAM3 bogomem_lget (uaecptr) REGPARAM;
691 static uae_u32 REGPARAM3 bogomem_wget (uaecptr) REGPARAM;
692 static uae_u32 REGPARAM3 bogomem_bget (uaecptr) REGPARAM;
693 static void REGPARAM3 bogomem_lput (uaecptr, uae_u32) REGPARAM;
694 static void REGPARAM3 bogomem_wput (uaecptr, uae_u32) REGPARAM;
695 static void REGPARAM3 bogomem_bput (uaecptr, uae_u32) REGPARAM;
696 static int REGPARAM3 bogomem_check (uaecptr addr, uae_u32 size) REGPARAM;
697 static uae_u8 *REGPARAM3 bogomem_xlate (uaecptr addr) REGPARAM;
698
bogomem_lget(uaecptr addr)699 static uae_u32 REGPARAM2 bogomem_lget (uaecptr addr)
700 {
701 uae_u32 *m;
702 addr &= bogomem_mask;
703 m = (uae_u32 *)(bogomemory + addr);
704 return do_get_mem_long (m);
705 }
706
bogomem_wget(uaecptr addr)707 static uae_u32 REGPARAM2 bogomem_wget (uaecptr addr)
708 {
709 uae_u16 *m;
710 addr &= bogomem_mask;
711 m = (uae_u16 *)(bogomemory + addr);
712 return do_get_mem_word (m);
713 }
714
bogomem_bget(uaecptr addr)715 static uae_u32 REGPARAM2 bogomem_bget (uaecptr addr)
716 {
717 addr &= bogomem_mask;
718 return bogomemory[addr];
719 }
720
bogomem_lput(uaecptr addr,uae_u32 l)721 static void REGPARAM2 bogomem_lput (uaecptr addr, uae_u32 l)
722 {
723 uae_u32 *m;
724 addr &= bogomem_mask;
725 m = (uae_u32 *)(bogomemory + addr);
726 do_put_mem_long (m, l);
727 }
728
bogomem_wput(uaecptr addr,uae_u32 w)729 static void REGPARAM2 bogomem_wput (uaecptr addr, uae_u32 w)
730 {
731 uae_u16 *m;
732 addr &= bogomem_mask;
733 m = (uae_u16 *)(bogomemory + addr);
734 do_put_mem_word (m, w);
735 }
736
bogomem_bput(uaecptr addr,uae_u32 b)737 static void REGPARAM2 bogomem_bput (uaecptr addr, uae_u32 b)
738 {
739 addr &= bogomem_mask;
740 bogomemory[addr] = b;
741 }
742
bogomem_check(uaecptr addr,uae_u32 size)743 static int REGPARAM2 bogomem_check (uaecptr addr, uae_u32 size)
744 {
745 addr &= bogomem_mask;
746 return (addr + size) <= allocated_bogomem;
747 }
748
bogomem_xlate(uaecptr addr)749 static uae_u8 *REGPARAM2 bogomem_xlate (uaecptr addr)
750 {
751 addr &= bogomem_mask;
752 return bogomemory + addr;
753 }
754
755 /* CDTV expension memory card memory */
756
757 uae_u8 *cardmemory;
758
759 static uae_u32 REGPARAM3 cardmem_lget (uaecptr) REGPARAM;
760 static uae_u32 REGPARAM3 cardmem_wget (uaecptr) REGPARAM;
761 static uae_u32 REGPARAM3 cardmem_bget (uaecptr) REGPARAM;
762 static void REGPARAM3 cardmem_lput (uaecptr, uae_u32) REGPARAM;
763 static void REGPARAM3 cardmem_wput (uaecptr, uae_u32) REGPARAM;
764 static void REGPARAM3 cardmem_bput (uaecptr, uae_u32) REGPARAM;
765 static int REGPARAM3 cardmem_check (uaecptr addr, uae_u32 size) REGPARAM;
766 static uae_u8 *REGPARAM3 cardmem_xlate (uaecptr addr) REGPARAM;
767
cardmem_lget(uaecptr addr)768 static uae_u32 REGPARAM2 cardmem_lget (uaecptr addr)
769 {
770 uae_u32 *m;
771 addr &= cardmem_mask;
772 m = (uae_u32 *)(cardmemory + addr);
773 return do_get_mem_long (m);
774 }
775
cardmem_wget(uaecptr addr)776 static uae_u32 REGPARAM2 cardmem_wget (uaecptr addr)
777 {
778 uae_u16 *m;
779 addr &= cardmem_mask;
780 m = (uae_u16 *)(cardmemory + addr);
781 return do_get_mem_word (m);
782 }
783
cardmem_bget(uaecptr addr)784 static uae_u32 REGPARAM2 cardmem_bget (uaecptr addr)
785 {
786 addr &= cardmem_mask;
787 return cardmemory[addr];
788 }
789
cardmem_lput(uaecptr addr,uae_u32 l)790 static void REGPARAM2 cardmem_lput (uaecptr addr, uae_u32 l)
791 {
792 uae_u32 *m;
793 addr &= cardmem_mask;
794 m = (uae_u32 *)(cardmemory + addr);
795 do_put_mem_long (m, l);
796 }
797
cardmem_wput(uaecptr addr,uae_u32 w)798 static void REGPARAM2 cardmem_wput (uaecptr addr, uae_u32 w)
799 {
800 uae_u16 *m;
801 addr &= cardmem_mask;
802 m = (uae_u16 *)(cardmemory + addr);
803 do_put_mem_word (m, w);
804 }
805
cardmem_bput(uaecptr addr,uae_u32 b)806 static void REGPARAM2 cardmem_bput (uaecptr addr, uae_u32 b)
807 {
808 addr &= cardmem_mask;
809 cardmemory[addr] = b;
810 }
811
cardmem_check(uaecptr addr,uae_u32 size)812 static int REGPARAM2 cardmem_check (uaecptr addr, uae_u32 size)
813 {
814 addr &= cardmem_mask;
815 return (addr + size) <= allocated_cardmem;
816 }
817
cardmem_xlate(uaecptr addr)818 static uae_u8 *REGPARAM2 cardmem_xlate (uaecptr addr)
819 {
820 addr &= cardmem_mask;
821 return cardmemory + addr;
822 }
823
824 /* A3000 motherboard fast memory */
825 static uae_u8 *a3000lmemory, *a3000hmemory;
826 uaecptr a3000lmem_start, a3000hmem_start;
827
828 static uae_u32 REGPARAM3 a3000lmem_lget (uaecptr) REGPARAM;
829 static uae_u32 REGPARAM3 a3000lmem_wget (uaecptr) REGPARAM;
830 static uae_u32 REGPARAM3 a3000lmem_bget (uaecptr) REGPARAM;
831 static void REGPARAM3 a3000lmem_lput (uaecptr, uae_u32) REGPARAM;
832 static void REGPARAM3 a3000lmem_wput (uaecptr, uae_u32) REGPARAM;
833 static void REGPARAM3 a3000lmem_bput (uaecptr, uae_u32) REGPARAM;
834 static int REGPARAM3 a3000lmem_check (uaecptr addr, uae_u32 size) REGPARAM;
835 static uae_u8 *REGPARAM3 a3000lmem_xlate (uaecptr addr) REGPARAM;
836
a3000lmem_lget(uaecptr addr)837 static uae_u32 REGPARAM2 a3000lmem_lget (uaecptr addr)
838 {
839 uae_u32 *m;
840 addr &= a3000lmem_mask;
841 m = (uae_u32 *)(a3000lmemory + addr);
842 return do_get_mem_long (m);
843 }
844
a3000lmem_wget(uaecptr addr)845 static uae_u32 REGPARAM2 a3000lmem_wget (uaecptr addr)
846 {
847 uae_u16 *m;
848 addr &= a3000lmem_mask;
849 m = (uae_u16 *)(a3000lmemory + addr);
850 return do_get_mem_word (m);
851 }
852
a3000lmem_bget(uaecptr addr)853 static uae_u32 REGPARAM2 a3000lmem_bget (uaecptr addr)
854 {
855 addr &= a3000lmem_mask;
856 return a3000lmemory[addr];
857 }
858
a3000lmem_lput(uaecptr addr,uae_u32 l)859 static void REGPARAM2 a3000lmem_lput (uaecptr addr, uae_u32 l)
860 {
861 uae_u32 *m;
862 addr &= a3000lmem_mask;
863 m = (uae_u32 *)(a3000lmemory + addr);
864 do_put_mem_long (m, l);
865 }
866
a3000lmem_wput(uaecptr addr,uae_u32 w)867 static void REGPARAM2 a3000lmem_wput (uaecptr addr, uae_u32 w)
868 {
869 uae_u16 *m;
870 addr &= a3000lmem_mask;
871 m = (uae_u16 *)(a3000lmemory + addr);
872 do_put_mem_word (m, w);
873 }
874
a3000lmem_bput(uaecptr addr,uae_u32 b)875 static void REGPARAM2 a3000lmem_bput (uaecptr addr, uae_u32 b)
876 {
877 addr &= a3000lmem_mask;
878 a3000lmemory[addr] = b;
879 }
880
a3000lmem_check(uaecptr addr,uae_u32 size)881 static int REGPARAM2 a3000lmem_check (uaecptr addr, uae_u32 size)
882 {
883 addr &= a3000lmem_mask;
884 return (addr + size) <= allocated_a3000lmem;
885 }
886
a3000lmem_xlate(uaecptr addr)887 static uae_u8 *REGPARAM2 a3000lmem_xlate (uaecptr addr)
888 {
889 addr &= a3000lmem_mask;
890 return a3000lmemory + addr;
891 }
892
893 static uae_u32 REGPARAM3 a3000hmem_lget (uaecptr) REGPARAM;
894 static uae_u32 REGPARAM3 a3000hmem_wget (uaecptr) REGPARAM;
895 static uae_u32 REGPARAM3 a3000hmem_bget (uaecptr) REGPARAM;
896 static void REGPARAM3 a3000hmem_lput (uaecptr, uae_u32) REGPARAM;
897 static void REGPARAM3 a3000hmem_wput (uaecptr, uae_u32) REGPARAM;
898 static void REGPARAM3 a3000hmem_bput (uaecptr, uae_u32) REGPARAM;
899 static int REGPARAM3 a3000hmem_check (uaecptr addr, uae_u32 size) REGPARAM;
900 static uae_u8 *REGPARAM3 a3000hmem_xlate (uaecptr addr) REGPARAM;
901
a3000hmem_lget(uaecptr addr)902 static uae_u32 REGPARAM2 a3000hmem_lget (uaecptr addr)
903 {
904 uae_u32 *m;
905 addr &= a3000hmem_mask;
906 m = (uae_u32 *)(a3000hmemory + addr);
907 return do_get_mem_long (m);
908 }
909
a3000hmem_wget(uaecptr addr)910 static uae_u32 REGPARAM2 a3000hmem_wget (uaecptr addr)
911 {
912 uae_u16 *m;
913 addr &= a3000hmem_mask;
914 m = (uae_u16 *)(a3000hmemory + addr);
915 return do_get_mem_word (m);
916 }
917
a3000hmem_bget(uaecptr addr)918 static uae_u32 REGPARAM2 a3000hmem_bget (uaecptr addr)
919 {
920 addr &= a3000hmem_mask;
921 return a3000hmemory[addr];
922 }
923
a3000hmem_lput(uaecptr addr,uae_u32 l)924 static void REGPARAM2 a3000hmem_lput (uaecptr addr, uae_u32 l)
925 {
926 uae_u32 *m;
927 addr &= a3000hmem_mask;
928 m = (uae_u32 *)(a3000hmemory + addr);
929 do_put_mem_long (m, l);
930 }
931
a3000hmem_wput(uaecptr addr,uae_u32 w)932 static void REGPARAM2 a3000hmem_wput (uaecptr addr, uae_u32 w)
933 {
934 uae_u16 *m;
935 addr &= a3000hmem_mask;
936 m = (uae_u16 *)(a3000hmemory + addr);
937 do_put_mem_word (m, w);
938 }
939
a3000hmem_bput(uaecptr addr,uae_u32 b)940 static void REGPARAM2 a3000hmem_bput (uaecptr addr, uae_u32 b)
941 {
942 addr &= a3000hmem_mask;
943 a3000hmemory[addr] = b;
944 }
945
a3000hmem_check(uaecptr addr,uae_u32 size)946 static int REGPARAM2 a3000hmem_check (uaecptr addr, uae_u32 size)
947 {
948 addr &= a3000hmem_mask;
949 return (addr + size) <= allocated_a3000hmem;
950 }
951
a3000hmem_xlate(uaecptr addr)952 static uae_u8 *REGPARAM2 a3000hmem_xlate (uaecptr addr)
953 {
954 addr &= a3000hmem_mask;
955 return a3000hmemory + addr;
956 }
957
958 /* Kick memory */
959
960 uae_u8 *kickmemory;
961 uae_u16 kickstart_version;
962 uae_u32 kickmem_size;
963
964 /*
965 * A1000 kickstart RAM handling
966 *
967 * RESET instruction unhides boot ROM and disables write protection
968 * write access to boot ROM hides boot ROM and enables write protection
969 *
970 */
971 static int a1000_kickstart_mode;
972 static uae_u8 *a1000_bootrom;
a1000_handle_kickstart(int mode)973 static void a1000_handle_kickstart (int mode)
974 {
975 if (!a1000_bootrom)
976 return;
977 #ifdef NATMEM_OFFSET
978 protect_roms (false);
979 #endif
980 if (mode == 0) {
981 a1000_kickstart_mode = 0;
982 memcpy (kickmemory, kickmemory + 262144, 262144);
983 kickstart_version = (kickmemory[262144 + 12] << 8) | kickmemory[262144 + 13];
984 } else {
985 a1000_kickstart_mode = 1;
986 memcpy (kickmemory, a1000_bootrom, 262144);
987 kickstart_version = 0;
988 }
989 if (kickstart_version == 0xffff)
990 kickstart_version = 0;
991 }
992
a1000_reset(void)993 void a1000_reset (void)
994 {
995 a1000_handle_kickstart (1);
996 }
997
998
kickmem_lget(uaecptr addr)999 uae_u32 REGPARAM2 kickmem_lget (uaecptr addr)
1000 {
1001 uae_u32 *m;
1002 addr &= kickmem_mask;
1003 m = (uae_u32 *)(kickmemory + addr);
1004 return do_get_mem_long (m);
1005 }
1006
kickmem_wget(uaecptr addr)1007 static uae_u32 REGPARAM2 kickmem_wget (uaecptr addr)
1008 {
1009 uae_u16 *m;
1010 addr &= kickmem_mask;
1011 m = (uae_u16 *)(kickmemory + addr);
1012 return do_get_mem_word (m);
1013 }
1014
kickmem_bget(uaecptr addr)1015 static uae_u32 REGPARAM2 kickmem_bget (uaecptr addr)
1016 {
1017 addr &= kickmem_mask;
1018 return kickmemory[addr];
1019 }
1020
kickmem_lput(uaecptr addr,uae_u32 b)1021 static void REGPARAM2 kickmem_lput (uaecptr addr, uae_u32 b)
1022 {
1023 uae_u32 *m;
1024 #ifdef JIT
1025 special_mem |= S_WRITE;
1026 #endif
1027 if (currprefs.rom_readwrite && rom_write_enabled) {
1028 addr &= kickmem_mask;
1029 m = (uae_u32 *)(kickmemory + addr);
1030 do_put_mem_long (m, b);
1031 if (addr == 524288-4) {
1032 rom_write_enabled = false;
1033 write_log (_T("ROM write disabled\n"));
1034 }
1035 } else if (a1000_kickstart_mode) {
1036 if (addr >= 0xfc0000) {
1037 addr &= kickmem_mask;
1038 m = (uae_u32 *)(kickmemory + addr);
1039 do_put_mem_long (m, b);
1040 return;
1041 } else
1042 a1000_handle_kickstart (0);
1043 } else if (currprefs.illegal_mem) {
1044 write_log (_T("Illegal kickmem lput at %08x\n"), addr);
1045 }
1046 }
1047
kickmem_wput(uaecptr addr,uae_u32 b)1048 void REGPARAM2 kickmem_wput (uaecptr addr, uae_u32 b)
1049 {
1050 uae_u16 *m;
1051 #ifdef JIT
1052 special_mem |= S_WRITE;
1053 #endif
1054 if (currprefs.rom_readwrite && rom_write_enabled) {
1055 addr &= kickmem_mask;
1056 m = (uae_u16 *)(kickmemory + addr);
1057 do_put_mem_word (m, b);
1058 } else if (a1000_kickstart_mode) {
1059 if (addr >= 0xfc0000) {
1060 addr &= kickmem_mask;
1061 m = (uae_u16 *)(kickmemory + addr);
1062 do_put_mem_word (m, b);
1063 return;
1064 } else
1065 a1000_handle_kickstart (0);
1066 } else if (currprefs.illegal_mem) {
1067 write_log (_T("Illegal kickmem wput at %08x\n"), addr);
1068 }
1069 }
1070
kickmem_bput(uaecptr addr,uae_u32 b)1071 void REGPARAM2 kickmem_bput (uaecptr addr, uae_u32 b)
1072 {
1073 #ifdef JIT
1074 special_mem |= S_WRITE;
1075 #endif
1076 if (currprefs.rom_readwrite && rom_write_enabled) {
1077 addr &= kickmem_mask;
1078 kickmemory[addr] = b;
1079 } else if (a1000_kickstart_mode) {
1080 if (addr >= 0xfc0000) {
1081 addr &= kickmem_mask;
1082 kickmemory[addr] = b;
1083 return;
1084 } else
1085 a1000_handle_kickstart (0);
1086 } else if (currprefs.illegal_mem) {
1087 write_log (_T("Illegal kickmem bput at %08x\n"), addr);
1088 }
1089 }
1090
kickmem2_lput(uaecptr addr,uae_u32 l)1091 void REGPARAM2 kickmem2_lput (uaecptr addr, uae_u32 l)
1092 {
1093 uae_u32 *m;
1094 #ifdef JIT
1095 special_mem |= S_WRITE;
1096 #endif
1097 addr &= kickmem_mask;
1098 m = (uae_u32 *)(kickmemory + addr);
1099 do_put_mem_long (m, l);
1100 }
1101
kickmem2_wput(uaecptr addr,uae_u32 w)1102 void REGPARAM2 kickmem2_wput (uaecptr addr, uae_u32 w)
1103 {
1104 uae_u16 *m;
1105 #ifdef JIT
1106 special_mem |= S_WRITE;
1107 #endif
1108 addr &= kickmem_mask;
1109 m = (uae_u16 *)(kickmemory + addr);
1110 do_put_mem_word (m, w);
1111 }
1112
kickmem2_bput(uaecptr addr,uae_u32 b)1113 void REGPARAM2 kickmem2_bput (uaecptr addr, uae_u32 b)
1114 {
1115 #ifdef JIT
1116 special_mem |= S_WRITE;
1117 #endif
1118 addr &= kickmem_mask;
1119 kickmemory[addr] = b;
1120 }
1121
kickmem_check(uaecptr addr,uae_u32 size)1122 int REGPARAM2 kickmem_check (uaecptr addr, uae_u32 size)
1123 {
1124 addr &= kickmem_mask;
1125 return (addr + size) <= kickmem_size;
1126 }
1127
kickmem_xlate(uaecptr addr)1128 uae_u8 *REGPARAM2 kickmem_xlate (uaecptr addr)
1129 {
1130 addr &= kickmem_mask;
1131 return kickmemory + addr;
1132 }
1133
1134 /* CD32/CDTV extended kick memory */
1135
1136 uae_u8 *extendedkickmemory, *extendedkickmemory2;
1137 static uae_u32 extendedkickmem_size, extendedkickmem2_size;
1138 static uae_u32 extendedkickmem_start, extendedkickmem2_start;
1139 static int extendedkickmem_type;
1140
1141 #define EXTENDED_ROM_CD32 1
1142 #define EXTENDED_ROM_CDTV 2
1143 #define EXTENDED_ROM_KS 3
1144 #define EXTENDED_ROM_ARCADIA 4
1145
1146 static uae_u32 REGPARAM3 extendedkickmem_lget (uaecptr) REGPARAM;
1147 static uae_u32 REGPARAM3 extendedkickmem_wget (uaecptr) REGPARAM;
1148 static uae_u32 REGPARAM3 extendedkickmem_bget (uaecptr) REGPARAM;
1149 static void REGPARAM3 extendedkickmem_lput (uaecptr, uae_u32) REGPARAM;
1150 static void REGPARAM3 extendedkickmem_wput (uaecptr, uae_u32) REGPARAM;
1151 static void REGPARAM3 extendedkickmem_bput (uaecptr, uae_u32) REGPARAM;
1152 static int REGPARAM3 extendedkickmem_check (uaecptr addr, uae_u32 size) REGPARAM;
1153 static uae_u8 *REGPARAM3 extendedkickmem_xlate (uaecptr addr) REGPARAM;
extendedkickmem_lget(uaecptr addr)1154 static uae_u32 REGPARAM2 extendedkickmem_lget (uaecptr addr)
1155 {
1156 uae_u32 *m;
1157 addr -= extendedkickmem_start & extendedkickmem_mask;
1158 addr &= extendedkickmem_mask;
1159 m = (uae_u32 *)(extendedkickmemory + addr);
1160 return do_get_mem_long (m);
1161 }
extendedkickmem_wget(uaecptr addr)1162 uae_u32 REGPARAM2 extendedkickmem_wget (uaecptr addr)
1163 {
1164 uae_u16 *m;
1165 addr -= extendedkickmem_start & extendedkickmem_mask;
1166 addr &= extendedkickmem_mask;
1167 m = (uae_u16 *)(extendedkickmemory + addr);
1168 return do_get_mem_word (m);
1169 }
extendedkickmem_bget(uaecptr addr)1170 uae_u32 REGPARAM2 extendedkickmem_bget (uaecptr addr)
1171 {
1172 addr -= extendedkickmem_start & extendedkickmem_mask;
1173 addr &= extendedkickmem_mask;
1174 return extendedkickmemory[addr];
1175 }
extendedkickmem_lput(uaecptr addr,uae_u32 b)1176 void REGPARAM2 extendedkickmem_lput (uaecptr addr, uae_u32 b)
1177 {
1178 #ifdef JIT
1179 special_mem |= S_WRITE;
1180 #endif
1181 if (currprefs.illegal_mem)
1182 write_log (_T("Illegal extendedkickmem lput at %08lx\n"), addr);
1183 }
extendedkickmem_wput(uaecptr addr,uae_u32 b)1184 void REGPARAM2 extendedkickmem_wput (uaecptr addr, uae_u32 b)
1185 {
1186 #ifdef JIT
1187 special_mem |= S_WRITE;
1188 #endif
1189 if (currprefs.illegal_mem)
1190 write_log (_T("Illegal extendedkickmem wput at %08lx\n"), addr);
1191 }
extendedkickmem_bput(uaecptr addr,uae_u32 b)1192 void REGPARAM2 extendedkickmem_bput (uaecptr addr, uae_u32 b)
1193 {
1194 #ifdef JIT
1195 special_mem |= S_WRITE;
1196 #endif
1197 if (currprefs.illegal_mem)
1198 write_log (_T("Illegal extendedkickmem lput at %08lx\n"), addr);
1199 }
extendedkickmem_check(uaecptr addr,uae_u32 size)1200 int REGPARAM2 extendedkickmem_check (uaecptr addr, uae_u32 size)
1201 {
1202 addr -= extendedkickmem_start & extendedkickmem_mask;
1203 addr &= extendedkickmem_mask;
1204 return (addr + size) <= extendedkickmem_size;
1205 }
extendedkickmem_xlate(uaecptr addr)1206 uae_u8 *REGPARAM2 extendedkickmem_xlate (uaecptr addr)
1207 {
1208 addr -= extendedkickmem_start & extendedkickmem_mask;
1209 addr &= extendedkickmem_mask;
1210 return extendedkickmemory + addr;
1211 }
1212
1213 static uae_u32 REGPARAM3 extendedkickmem2_lget (uaecptr) REGPARAM;
1214 static uae_u32 REGPARAM3 extendedkickmem2_wget (uaecptr) REGPARAM;
1215 static uae_u32 REGPARAM3 extendedkickmem2_bget (uaecptr) REGPARAM;
1216 static void REGPARAM3 extendedkickmem2_lput (uaecptr, uae_u32) REGPARAM;
1217 static void REGPARAM3 extendedkickmem2_wput (uaecptr, uae_u32) REGPARAM;
1218 static void REGPARAM3 extendedkickmem2_bput (uaecptr, uae_u32) REGPARAM;
1219 static int REGPARAM3 extendedkickmem2_check (uaecptr addr, uae_u32 size) REGPARAM;
1220 static uae_u8 *REGPARAM3 extendedkickmem2_xlate (uaecptr addr) REGPARAM;
extendedkickmem2_lget(uaecptr addr)1221 static uae_u32 REGPARAM2 extendedkickmem2_lget (uaecptr addr)
1222 {
1223 uae_u32 *m;
1224 addr -= extendedkickmem2_start & extendedkickmem2_mask;
1225 addr &= extendedkickmem2_mask;
1226 m = (uae_u32 *)(extendedkickmemory2 + addr);
1227 return do_get_mem_long (m);
1228 }
extendedkickmem2_wget(uaecptr addr)1229 static uae_u32 REGPARAM2 extendedkickmem2_wget (uaecptr addr)
1230 {
1231 uae_u16 *m;
1232 addr -= extendedkickmem2_start & extendedkickmem2_mask;
1233 addr &= extendedkickmem2_mask;
1234 m = (uae_u16 *)(extendedkickmemory2 + addr);
1235 return do_get_mem_word (m);
1236 }
extendedkickmem2_bget(uaecptr addr)1237 static uae_u32 REGPARAM2 extendedkickmem2_bget (uaecptr addr)
1238 {
1239 addr -= extendedkickmem2_start & extendedkickmem2_mask;
1240 addr &= extendedkickmem2_mask;
1241 return extendedkickmemory2[addr];
1242 }
extendedkickmem2_lput(uaecptr addr,uae_u32 b)1243 static void REGPARAM2 extendedkickmem2_lput (uaecptr addr, uae_u32 b)
1244 {
1245 #ifdef JIT
1246 special_mem |= S_WRITE;
1247 #endif
1248 if (currprefs.illegal_mem)
1249 write_log (_T("Illegal extendedkickmem2 lput at %08x\n"), addr);
1250 }
extendedkickmem2_wput(uaecptr addr,uae_u32 b)1251 static void REGPARAM2 extendedkickmem2_wput (uaecptr addr, uae_u32 b)
1252 {
1253 #ifdef JIT
1254 special_mem |= S_WRITE;
1255 #endif
1256 if (currprefs.illegal_mem)
1257 write_log (_T("Illegal extendedkickmem2 wput at %08x\n"), addr);
1258 }
extendedkickmem2_bput(uaecptr addr,uae_u32 b)1259 static void REGPARAM2 extendedkickmem2_bput (uaecptr addr, uae_u32 b)
1260 {
1261 #ifdef JIT
1262 special_mem |= S_WRITE;
1263 #endif
1264 if (currprefs.illegal_mem)
1265 write_log (_T("Illegal extendedkickmem2 lput at %08x\n"), addr);
1266 }
extendedkickmem2_check(uaecptr addr,uae_u32 size)1267 static int REGPARAM2 extendedkickmem2_check (uaecptr addr, uae_u32 size)
1268 {
1269 addr -= extendedkickmem2_start & extendedkickmem2_mask;
1270 addr &= extendedkickmem2_mask;
1271 return (addr + size) <= extendedkickmem2_size;
1272 }
extendedkickmem2_xlate(uaecptr addr)1273 static uae_u8 *REGPARAM2 extendedkickmem2_xlate (uaecptr addr)
1274 {
1275 addr -= extendedkickmem2_start & extendedkickmem2_mask;
1276 addr &= extendedkickmem2_mask;
1277 return extendedkickmemory2 + addr;
1278 }
1279
1280
1281 /* Default memory access functions */
1282
default_check(uaecptr a,uae_u32 b)1283 int REGPARAM2 default_check (uaecptr a, uae_u32 b)
1284 {
1285 return 0;
1286 }
1287
1288 static int be_cnt;
1289
default_xlate(uaecptr a)1290 uae_u8 *REGPARAM2 default_xlate (uaecptr a)
1291 {
1292 if (quit_program == 0) {
1293 /* do this only in 68010+ mode, there are some tricky A500 programs.. */
1294 if ((currprefs.cpu_model > 68000 || !currprefs.cpu_compatible) && !currprefs.mmu_model) {
1295 #if defined(ENFORCER)
1296 enforcer_disable ();
1297 #endif
1298
1299 if (be_cnt < 3) {
1300 int i, j;
1301 uaecptr a2 = a - 32;
1302 uaecptr a3 = m68k_getpc () - 32;
1303 write_log (_T("Your Amiga program just did something terribly stupid %08X PC=%08X\n"), a, M68K_GETPC);
1304 if (debugging || DEBUG_STUPID) {
1305 //activate_debugger ();
1306 m68k_dumpstate (0);
1307 }
1308 for (i = 0; i < 10; i++) {
1309 write_log (_T("%08X "), i >= 5 ? a3 : a2);
1310 for (j = 0; j < 16; j += 2) {
1311 write_log (_T(" %04X"), get_word (i >= 5 ? a3 : a2));
1312 if (i >= 5) a3 += 2; else a2 += 2;
1313 }
1314 write_log (_T("\n"));
1315 }
1316 memory_map_dump ();
1317 }
1318 be_cnt++;
1319 if (regs.s || be_cnt > 1000) {
1320 cpu_halt (3);
1321 be_cnt = 0;
1322 } else {
1323 regs.panic = 4;
1324 regs.panic_pc = m68k_getpc ();
1325 regs.panic_addr = a;
1326 set_special (SPCFLAG_BRK);
1327 }
1328 }
1329 }
1330 return kickmem_xlate (2); /* So we don't crash. */
1331 }
1332
1333 /* Address banks */
1334
1335 addrbank dummy_bank = {
1336 dummy_lget, dummy_wget, dummy_bget,
1337 dummy_lput, dummy_wput, dummy_bput,
1338 default_xlate, dummy_check, NULL, NULL,
1339 dummy_lgeti, dummy_wgeti, ABFLAG_NONE
1340 };
1341
1342 addrbank ones_bank = {
1343 ones_get, ones_get, ones_get,
1344 none_put, none_put, none_put,
1345 default_xlate, dummy_check, NULL, _T("Ones"),
1346 dummy_lgeti, dummy_wgeti, ABFLAG_NONE
1347 };
1348
1349 addrbank chipmem_bank = {
1350 chipmem_lget, chipmem_wget, chipmem_bget,
1351 chipmem_lput, chipmem_wput, chipmem_bput,
1352 chipmem_xlate, chipmem_check, NULL, _T("Chip memory"),
1353 chipmem_lget, chipmem_wget, ABFLAG_RAM
1354 };
1355
1356 addrbank chipmem_dummy_bank = {
1357 chipmem_dummy_lget, chipmem_dummy_wget, chipmem_dummy_bget,
1358 chipmem_dummy_lput, chipmem_dummy_wput, chipmem_dummy_bput,
1359 default_xlate, dummy_check, NULL, _T("Dummy Chip memory"),
1360 dummy_lgeti, dummy_wgeti, ABFLAG_IO
1361 };
1362
1363
1364 #ifdef AGA
1365 addrbank chipmem_bank_ce2 = {
1366 chipmem_lget_ce2, chipmem_wget_ce2, chipmem_bget_ce2,
1367 chipmem_lput_ce2, chipmem_wput_ce2, chipmem_bput_ce2,
1368 chipmem_xlate, chipmem_check, NULL, _T("Chip memory (68020 'ce')"),
1369 chipmem_lget_ce2, chipmem_wget_ce2, ABFLAG_RAM
1370 };
1371 #endif
1372
1373 addrbank bogomem_bank = {
1374 bogomem_lget, bogomem_wget, bogomem_bget,
1375 bogomem_lput, bogomem_wput, bogomem_bput,
1376 bogomem_xlate, bogomem_check, NULL, _T("Slow memory"),
1377 bogomem_lget, bogomem_wget, ABFLAG_RAM
1378 };
1379
1380 addrbank cardmem_bank = {
1381 cardmem_lget, cardmem_wget, cardmem_bget,
1382 cardmem_lput, cardmem_wput, cardmem_bput,
1383 cardmem_xlate, cardmem_check, NULL, _T("CDTV memory card"),
1384 cardmem_lget, cardmem_wget, ABFLAG_RAM
1385 };
1386
1387 addrbank a3000lmem_bank = {
1388 a3000lmem_lget, a3000lmem_wget, a3000lmem_bget,
1389 a3000lmem_lput, a3000lmem_wput, a3000lmem_bput,
1390 a3000lmem_xlate, a3000lmem_check, NULL, _T("RAMSEY memory (low)"),
1391 a3000lmem_lget, a3000lmem_wget, ABFLAG_RAM
1392 };
1393
1394 addrbank a3000hmem_bank = {
1395 a3000hmem_lget, a3000hmem_wget, a3000hmem_bget,
1396 a3000hmem_lput, a3000hmem_wput, a3000hmem_bput,
1397 a3000hmem_xlate, a3000hmem_check, NULL, _T("RAMSEY memory (high)"),
1398 a3000hmem_lget, a3000hmem_wget, ABFLAG_RAM
1399 };
1400
1401 addrbank kickmem_bank = {
1402 kickmem_lget, kickmem_wget, kickmem_bget,
1403 kickmem_lput, kickmem_wput, kickmem_bput,
1404 kickmem_xlate, kickmem_check, NULL, _T("Kickstart ROM"),
1405 kickmem_lget, kickmem_wget, ABFLAG_ROM
1406 };
1407
1408 addrbank kickram_bank = {
1409 kickmem_lget, kickmem_wget, kickmem_bget,
1410 kickmem2_lput, kickmem2_wput, kickmem2_bput,
1411 kickmem_xlate, kickmem_check, NULL, _T("Kickstart Shadow RAM"),
1412 kickmem_lget, kickmem_wget, ABFLAG_UNK | ABFLAG_SAFE
1413 };
1414
1415 addrbank extendedkickmem_bank = {
1416 extendedkickmem_lget, extendedkickmem_wget, extendedkickmem_bget,
1417 extendedkickmem_lput, extendedkickmem_wput, extendedkickmem_bput,
1418 extendedkickmem_xlate, extendedkickmem_check, NULL, _T("Extended Kickstart ROM"),
1419 extendedkickmem_lget, extendedkickmem_wget, ABFLAG_ROM
1420 };
1421 addrbank extendedkickmem2_bank = {
1422 extendedkickmem2_lget, extendedkickmem2_wget, extendedkickmem2_bget,
1423 extendedkickmem2_lput, extendedkickmem2_wput, extendedkickmem2_bput,
1424 extendedkickmem2_xlate, extendedkickmem2_check, NULL, _T("Extended 2nd Kickstart ROM"),
1425 extendedkickmem2_lget, extendedkickmem2_wget, ABFLAG_ROM
1426 };
1427
1428
1429 static uae_u32 allocated_custmem1, allocated_custmem2;
1430 static uae_u32 custmem1_mask, custmem2_mask;
1431 static uae_u8 *custmem1, *custmem2;
1432
1433 static uae_u32 REGPARAM3 custmem1_lget (uaecptr) REGPARAM;
1434 static uae_u32 REGPARAM3 custmem1_wget (uaecptr) REGPARAM;
1435 static uae_u32 REGPARAM3 custmem1_bget (uaecptr) REGPARAM;
1436 static void REGPARAM3 custmem1_lput (uaecptr, uae_u32) REGPARAM;
1437 static void REGPARAM3 custmem1_wput (uaecptr, uae_u32) REGPARAM;
1438 static void REGPARAM3 custmem1_bput (uaecptr, uae_u32) REGPARAM;
1439 static int REGPARAM3 custmem1_check (uaecptr addr, uae_u32 size) REGPARAM;
1440 static uae_u8 *REGPARAM3 custmem1_xlate (uaecptr addr) REGPARAM;
1441
custmem1_lget(uaecptr addr)1442 static uae_u32 REGPARAM2 custmem1_lget (uaecptr addr)
1443 {
1444 uae_u8 *m;
1445 addr -= currprefs.custom_memory_addrs[0] & custmem1_mask;
1446 addr &= custmem1_mask;
1447 m = custmem1 + addr;
1448 return do_get_mem_long ((uae_u32 *)m);
1449 }
custmem1_wget(uaecptr addr)1450 static uae_u32 REGPARAM2 custmem1_wget (uaecptr addr)
1451 {
1452 uae_u8 *m;
1453 addr -= currprefs.custom_memory_addrs[0] & custmem1_mask;
1454 addr &= custmem1_mask;
1455 m = custmem1 + addr;
1456 return do_get_mem_word ((uae_u16 *)m);
1457 }
custmem1_bget(uaecptr addr)1458 static uae_u32 REGPARAM2 custmem1_bget (uaecptr addr)
1459 {
1460 addr -= currprefs.custom_memory_addrs[0] & custmem1_mask;
1461 addr &= custmem1_mask;
1462 return custmem1[addr];
1463 }
custmem1_lput(uaecptr addr,uae_u32 l)1464 static void REGPARAM2 custmem1_lput (uaecptr addr, uae_u32 l)
1465 {
1466 uae_u8 *m;
1467 addr -= currprefs.custom_memory_addrs[0] & custmem1_mask;
1468 addr &= custmem1_mask;
1469 m = custmem1 + addr;
1470 do_put_mem_long ((uae_u32 *)m, l);
1471 }
custmem1_wput(uaecptr addr,uae_u32 w)1472 static void REGPARAM2 custmem1_wput (uaecptr addr, uae_u32 w)
1473 {
1474 uae_u8 *m;
1475 addr -= currprefs.custom_memory_addrs[0] & custmem1_mask;
1476 addr &= custmem1_mask;
1477 m = custmem1 + addr;
1478 do_put_mem_word ((uae_u16 *)m, w);
1479 }
custmem1_bput(uaecptr addr,uae_u32 b)1480 static void REGPARAM2 custmem1_bput (uaecptr addr, uae_u32 b)
1481 {
1482 addr -= currprefs.custom_memory_addrs[0] & custmem1_mask;
1483 addr &= custmem1_mask;
1484 custmem1[addr] = b;
1485 }
custmem1_check(uaecptr addr,uae_u32 size)1486 static int REGPARAM2 custmem1_check (uaecptr addr, uae_u32 size)
1487 {
1488 addr -= currprefs.custom_memory_addrs[0] & custmem1_mask;
1489 addr &= custmem1_mask;
1490 return (addr + size) <= currprefs.custom_memory_sizes[0];
1491 }
custmem1_xlate(uaecptr addr)1492 static uae_u8 *REGPARAM2 custmem1_xlate (uaecptr addr)
1493 {
1494 addr -= currprefs.custom_memory_addrs[0] & custmem1_mask;
1495 addr &= custmem1_mask;
1496 return custmem1 + addr;
1497 }
1498
1499 static uae_u32 REGPARAM3 custmem2_lget (uaecptr) REGPARAM;
1500 static uae_u32 REGPARAM3 custmem2_wget (uaecptr) REGPARAM;
1501 static uae_u32 REGPARAM3 custmem2_bget (uaecptr) REGPARAM;
1502 static void REGPARAM3 custmem2_lput (uaecptr, uae_u32) REGPARAM;
1503 static void REGPARAM3 custmem2_wput (uaecptr, uae_u32) REGPARAM;
1504 static void REGPARAM3 custmem2_bput (uaecptr, uae_u32) REGPARAM;
1505 static int REGPARAM3 custmem2_check (uaecptr addr, uae_u32 size) REGPARAM;
1506 static uae_u8 *REGPARAM3 custmem2_xlate (uaecptr addr) REGPARAM;
1507
custmem2_lget(uaecptr addr)1508 static uae_u32 REGPARAM2 custmem2_lget (uaecptr addr)
1509 {
1510 uae_u8 *m;
1511 addr -= currprefs.custom_memory_addrs[1] & custmem2_mask;
1512 addr &= custmem2_mask;
1513 m = custmem2 + addr;
1514 return do_get_mem_long ((uae_u32 *)m);
1515 }
custmem2_wget(uaecptr addr)1516 static uae_u32 REGPARAM2 custmem2_wget (uaecptr addr)
1517 {
1518 uae_u8 *m;
1519 addr -= currprefs.custom_memory_addrs[1] & custmem2_mask;
1520 addr &= custmem2_mask;
1521 m = custmem2 + addr;
1522 return do_get_mem_word ((uae_u16 *)m);
1523 }
custmem2_bget(uaecptr addr)1524 static uae_u32 REGPARAM2 custmem2_bget (uaecptr addr)
1525 {
1526 addr -= currprefs.custom_memory_addrs[1] & custmem2_mask;
1527 addr &= custmem2_mask;
1528 return custmem2[addr];
1529 }
custmem2_lput(uaecptr addr,uae_u32 l)1530 static void REGPARAM2 custmem2_lput (uaecptr addr, uae_u32 l)
1531 {
1532 uae_u8 *m;
1533 addr -= currprefs.custom_memory_addrs[1] & custmem2_mask;
1534 addr &= custmem2_mask;
1535 m = custmem2 + addr;
1536 do_put_mem_long ((uae_u32 *)m, l);
1537 }
custmem2_wput(uaecptr addr,uae_u32 w)1538 static void REGPARAM2 custmem2_wput (uaecptr addr, uae_u32 w)
1539 {
1540 uae_u8 *m;
1541 addr -= currprefs.custom_memory_addrs[1] & custmem2_mask;
1542 addr &= custmem2_mask;
1543 m = custmem2 + addr;
1544 do_put_mem_word ((uae_u16 *)m, w);
1545 }
custmem2_bput(uaecptr addr,uae_u32 b)1546 static void REGPARAM2 custmem2_bput (uaecptr addr, uae_u32 b)
1547 {
1548 addr -= currprefs.custom_memory_addrs[1] & custmem2_mask;
1549 addr &= custmem2_mask;
1550 custmem2[addr] = b;
1551 }
custmem2_check(uaecptr addr,uae_u32 size)1552 static int REGPARAM2 custmem2_check (uaecptr addr, uae_u32 size)
1553 {
1554 addr -= currprefs.custom_memory_addrs[1] & custmem2_mask;
1555 addr &= custmem2_mask;
1556 return (addr + size) <= currprefs.custom_memory_sizes[1];
1557 }
custmem2_xlate(uaecptr addr)1558 static uae_u8 *REGPARAM2 custmem2_xlate (uaecptr addr)
1559 {
1560 addr -= currprefs.custom_memory_addrs[1] & custmem2_mask;
1561 addr &= custmem2_mask;
1562 return custmem2 + addr;
1563 }
1564
1565 addrbank custmem1_bank = {
1566 custmem1_lget, custmem1_wget, custmem1_bget,
1567 custmem1_lput, custmem1_wput, custmem1_bput,
1568 custmem1_xlate, custmem1_check, NULL, _T("Non-autoconfig RAM #1"),
1569 custmem1_lget, custmem1_wget, ABFLAG_RAM
1570 };
1571 addrbank custmem2_bank = {
1572 custmem2_lget, custmem2_wget, custmem2_bget,
1573 custmem2_lput, custmem2_wput, custmem2_bput,
1574 custmem2_xlate, custmem2_check, NULL, _T("Non-autoconfig RAM #2"),
1575 custmem2_lget, custmem2_wget, ABFLAG_RAM
1576 };
1577
1578 #define fkickmem_size 524288
1579 static int a3000_f0;
a3000_fakekick(int map)1580 void a3000_fakekick (int map)
1581 {
1582 static uae_u8 *kickstore;
1583
1584 #ifdef NATMEM_OFFSET
1585 protect_roms (false);
1586 #endif
1587 if (map) {
1588 uae_u8 *fkickmemory = a3000lmemory + allocated_a3000lmem - fkickmem_size;
1589 if (fkickmemory[2] == 0x4e && fkickmemory[3] == 0xf9 && fkickmemory[4] == 0x00) {
1590 if (!kickstore)
1591 kickstore = xmalloc (uae_u8, fkickmem_size);
1592 memcpy (kickstore, kickmemory, fkickmem_size);
1593 if (fkickmemory[5] == 0xfc) {
1594 memcpy (kickmemory, fkickmemory, fkickmem_size / 2);
1595 memcpy (kickmemory + fkickmem_size / 2, fkickmemory, fkickmem_size / 2);
1596 extendedkickmem_size = 65536;
1597 extendedkickmem_mask = extendedkickmem_size - 1;
1598 extendedkickmemory = mapped_malloc (extendedkickmem_size, _T("rom_f0"));
1599 extendedkickmem_bank.baseaddr = extendedkickmemory;
1600 memcpy (extendedkickmemory, fkickmemory + fkickmem_size / 2, 65536);
1601 map_banks (&extendedkickmem_bank, 0xf0, 1, 1);
1602 a3000_f0 = 1;
1603 } else {
1604 memcpy (kickmemory, fkickmemory, fkickmem_size);
1605 }
1606 }
1607 } else {
1608 if (a3000_f0) {
1609 map_banks (&dummy_bank, 0xf0, 1, 1);
1610 mapped_free (extendedkickmemory);
1611 extendedkickmemory = NULL;
1612 a3000_f0 = 0;
1613 }
1614 if (kickstore)
1615 memcpy (kickmemory, kickstore, fkickmem_size);
1616 xfree (kickstore);
1617 kickstore = NULL;
1618 }
1619 #ifdef NATMEM_OFFSET
1620 protect_roms (true);
1621 #endif
1622 }
1623
1624 static uae_char *kickstring = "exec.library";
read_kickstart(struct zfile * f,uae_u8 * mem,int size,int dochecksum,int noalias)1625 static int read_kickstart (struct zfile *f, uae_u8 *mem, int size, int dochecksum, int noalias)
1626 {
1627 uae_char buffer[20];
1628 int i, j, oldpos;
1629 int cr = 0, kickdisk = 0;
1630
1631 if (size < 0) {
1632 zfile_fseek (f, 0, SEEK_END);
1633 size = zfile_ftell (f) & ~0x3ff;
1634 zfile_fseek (f, 0, SEEK_SET);
1635 }
1636 oldpos = zfile_ftell (f);
1637 i = zfile_fread (buffer, 1, 11, f);
1638 if (!memcmp (buffer, "KICK", 4)) {
1639 zfile_fseek (f, 512, SEEK_SET);
1640 kickdisk = 1;
1641 #if 0
1642 } else if (size >= 524288 && !memcmp (buffer, "AMIG", 4)) {
1643 /* ReKick */
1644 zfile_fseek (f, oldpos + 0x6c, SEEK_SET);
1645 cr = 2;
1646 #endif
1647 } else if (memcmp ((uae_char*)buffer, "AMIROMTYPE1", 11) != 0) {
1648 zfile_fseek (f, oldpos, SEEK_SET);
1649 } else {
1650 cloanto_rom = 1;
1651 cr = 1;
1652 }
1653
1654 memset (mem, 0, size);
1655 for (i = 0; i < 8; i++)
1656 mem[size - 16 + i * 2 + 1] = 0x18 + i;
1657 mem[size - 20] = size >> 24;
1658 mem[size - 19] = size >> 16;
1659 mem[size - 18] = size >> 8;
1660 mem[size - 17] = size >> 0;
1661
1662 i = zfile_fread (mem, 1, size, f);
1663
1664 if (kickdisk && i > 262144)
1665 i = 262144;
1666 #if 0
1667 if (i >= 262144 && (i != 262144 && i != 524288 && i != 524288 * 2 && i != 524288 * 4)) {
1668 notify_user (NUMSG_KSROMREADERROR);
1669 return 0;
1670 }
1671 #endif
1672 if (i < size - 20)
1673 kickstart_fix_checksum (mem, size);
1674
1675 j = 1;
1676 while (j < i)
1677 j <<= 1;
1678 i = j;
1679
1680 if (!noalias && i == size / 2)
1681 memcpy (mem + size / 2, mem, size / 2);
1682
1683 if (cr) {
1684 if (!decode_rom (mem, size, cr, i))
1685 return 0;
1686 }
1687 if (currprefs.cs_a1000ram) {
1688 int off = 0;
1689 a1000_bootrom = xcalloc (uae_u8, 262144);
1690 while (off + i < 262144) {
1691 memcpy (a1000_bootrom + off, kickmemory, i);
1692 off += i;
1693 }
1694 memset (kickmemory, 0, kickmem_size);
1695 a1000_handle_kickstart (1);
1696 dochecksum = 0;
1697 i = 524288;
1698 }
1699
1700 for (j = 0; j < 256 && i >= 262144; j++) {
1701 if (!memcmp (mem + j, kickstring, strlen (kickstring) + 1))
1702 break;
1703 }
1704
1705 if (j == 256 || i < 262144)
1706 dochecksum = 0;
1707 if (dochecksum)
1708 kickstart_checksum (mem, size);
1709 return i;
1710 }
1711
load_extendedkickstart(const TCHAR * romextfile,int type)1712 static bool load_extendedkickstart (const TCHAR *romextfile, int type)
1713 {
1714 struct zfile *f;
1715 int size, off;
1716 bool ret = false;
1717
1718 if (_tcslen (romextfile) == 0)
1719 return false;
1720 #ifdef ARCADIA
1721 if (is_arcadia_rom (romextfile) == ARCADIA_BIOS) {
1722 extendedkickmem_type = EXTENDED_ROM_ARCADIA;
1723 return false;
1724 }
1725 #endif
1726 f = read_rom_name (romextfile);
1727 if (!f) {
1728 notify_user (NUMSG_NOEXTROM);
1729 return false;
1730 }
1731 zfile_fseek (f, 0, SEEK_END);
1732 size = zfile_ftell (f);
1733 extendedkickmem_size = 524288;
1734 off = 0;
1735 if (type == 0) {
1736 if (currprefs.cs_cd32cd) {
1737 extendedkickmem_type = EXTENDED_ROM_CD32;
1738 } else if (currprefs.cs_cdtvcd || currprefs.cs_cdtvram) {
1739 extendedkickmem_type = EXTENDED_ROM_CDTV;
1740 } else if (size > 300000) {
1741 extendedkickmem_type = EXTENDED_ROM_CD32;
1742 } else if (need_uae_boot_rom () != 0xf00000) {
1743 extendedkickmem_type = EXTENDED_ROM_CDTV;
1744 }
1745 } else {
1746 extendedkickmem_type = type;
1747 }
1748 if (extendedkickmem_type) {
1749 zfile_fseek (f, off, SEEK_SET);
1750 switch (extendedkickmem_type) {
1751 case EXTENDED_ROM_CDTV:
1752 extendedkickmemory = mapped_malloc (extendedkickmem_size, _T("rom_f0"));
1753 extendedkickmem_bank.baseaddr = extendedkickmemory;
1754 extendedkickmem_start = 0xf00000;
1755 break;
1756 case EXTENDED_ROM_CD32:
1757 extendedkickmemory = mapped_malloc (extendedkickmem_size, _T("rom_e0"));
1758 extendedkickmem_bank.baseaddr = extendedkickmemory;
1759 extendedkickmem_start = 0xe00000;
1760 break;
1761 }
1762 if (extendedkickmemory) {
1763 read_kickstart (f, extendedkickmemory, extendedkickmem_size, 0, 1);
1764 extendedkickmem_mask = extendedkickmem_size - 1;
1765 ret = true;
1766 }
1767 }
1768 zfile_fclose (f);
1769 return ret;
1770 }
1771
patch_shapeshifter(uae_u8 * kickmemory)1772 static int patch_shapeshifter (uae_u8 *kickmemory)
1773 {
1774 /* Patch Kickstart ROM for ShapeShifter - from Christian Bauer.
1775 * Changes 'lea $400,a0' and 'lea $1000,a0' to 'lea $3000,a0' for
1776 * ShapeShifter compatability.
1777 */
1778 int i, patched = 0;
1779 uae_u8 kickshift1[] = { 0x41, 0xf8, 0x04, 0x00 };
1780 uae_u8 kickshift2[] = { 0x41, 0xf8, 0x10, 0x00 };
1781 uae_u8 kickshift3[] = { 0x43, 0xf8, 0x04, 0x00 };
1782
1783 for (i = 0x200; i < 0x300; i++) {
1784 if (!memcmp (kickmemory + i, kickshift1, sizeof (kickshift1)) ||
1785 !memcmp (kickmemory + i, kickshift2, sizeof (kickshift2)) ||
1786 !memcmp (kickmemory + i, kickshift3, sizeof (kickshift3))) {
1787 kickmemory[i + 2] = 0x30;
1788 write_log (_T("Kickstart KickShifted @%04X\n"), i);
1789 patched++;
1790 }
1791 }
1792 return patched;
1793 }
1794
1795 /* disable incompatible drivers */
patch_residents(uae_u8 * kickmemory,int size)1796 static int patch_residents (uae_u8 *kickmemory, int size)
1797 {
1798 int i, j, patched = 0;
1799 uae_char *residents[] = { "NCR scsi.device", 0 };
1800 // "scsi.device", "carddisk.device", "card.resource" };
1801 uaecptr base = size == 524288 ? 0xf80000 : 0xfc0000;
1802
1803 if (currprefs.cs_mbdmac == 2)
1804 residents[0] = NULL;
1805 for (i = 0; i < size - 100; i++) {
1806 if (kickmemory[i] == 0x4a && kickmemory[i + 1] == 0xfc) {
1807 uaecptr addr;
1808 addr = (kickmemory[i + 2] << 24) | (kickmemory[i + 3] << 16) | (kickmemory[i + 4] << 8) | (kickmemory[i + 5] << 0);
1809 if (addr != i + base)
1810 continue;
1811 addr = (kickmemory[i + 14] << 24) | (kickmemory[i + 15] << 16) | (kickmemory[i + 16] << 8) | (kickmemory[i + 17] << 0);
1812 if (addr >= base && addr < base + size) {
1813 j = 0;
1814 while (residents[j]) {
1815 if (!memcmp (residents[j], kickmemory + addr - base, strlen (residents[j]) + 1)) {
1816 TCHAR *s = au (residents[j]);
1817 write_log (_T("KSPatcher: '%s' at %08X disabled\n"), s, i + base);
1818 xfree (s);
1819 kickmemory[i] = 0x4b; /* destroy RTC_MATCHWORD */
1820 patched++;
1821 break;
1822 }
1823 j++;
1824 }
1825 }
1826 }
1827 }
1828 return patched;
1829 }
1830
patch_kick(void)1831 static void patch_kick (void)
1832 {
1833 int patched = 0;
1834 if (kickmem_size >= 524288 && currprefs.kickshifter)
1835 patched += patch_shapeshifter (kickmemory);
1836 patched += patch_residents (kickmemory, kickmem_size);
1837 if (extendedkickmemory) {
1838 patched += patch_residents (extendedkickmemory, extendedkickmem_size);
1839 if (patched)
1840 kickstart_fix_checksum (extendedkickmemory, extendedkickmem_size);
1841 }
1842 if (patched)
1843 kickstart_fix_checksum (kickmemory, kickmem_size);
1844 }
1845
1846 extern unsigned char arosrom[];
1847 extern unsigned int arosrom_len;
1848
load_kickstart_replacement(void)1849 static bool load_kickstart_replacement (void)
1850 {
1851 struct zfile *f = NULL;
1852
1853 f = zfile_fopen_data (_T("aros.gz"), arosrom_len, arosrom);
1854 if (!f)
1855 return false;
1856 f = zfile_gunzip (f, NULL);
1857 if (!f)
1858 return false;
1859 kickmem_mask = 0x80000 - 1;
1860 kickmem_size = 0x80000;
1861 extendedkickmem_size = 0x80000;
1862 extendedkickmem_type = EXTENDED_ROM_KS;
1863 extendedkickmemory = mapped_malloc (extendedkickmem_size, _T("rom_e0"));
1864 extendedkickmem_bank.baseaddr = extendedkickmemory;
1865 read_kickstart (f, extendedkickmemory, extendedkickmem_size, 0, 1);
1866 extendedkickmem_mask = extendedkickmem_size - 1;
1867 read_kickstart (f, kickmemory, 0x80000, 1, 0);
1868 zfile_fclose (f);
1869
1870 return true;
1871 }
1872
load_kickstart(void)1873 static int load_kickstart (void)
1874 {
1875 struct zfile *f;
1876 TCHAR tmprom[MAX_DPATH], tmprom2[MAX_DPATH];
1877 int patched = 0;
1878
1879 cloanto_rom = 0;
1880 if (!_tcscmp (currprefs.romfile, _T(":AROS")))
1881 return load_kickstart_replacement ();
1882 f = read_rom_name (currprefs.romfile);
1883 _tcscpy (tmprom, currprefs.romfile);
1884 if (f == NULL) {
1885 _stprintf (tmprom2, _T("%s%s"), start_path_data, currprefs.romfile);
1886 f = rom_fopen (tmprom2, _T("rb"), ZFD_NORMAL);
1887 if (f == NULL) {
1888 _stprintf (currprefs.romfile, _T("%sroms/kick.rom"), start_path_data);
1889 f = rom_fopen (currprefs.romfile, _T("rb"), ZFD_NORMAL);
1890 if (f == NULL) {
1891 _stprintf (currprefs.romfile, _T("%skick.rom"), start_path_data);
1892 f = rom_fopen (currprefs.romfile, _T("rb"), ZFD_NORMAL);
1893 if (f == NULL) {
1894 _stprintf (currprefs.romfile, _T("%s../shared/rom/kick.rom"), start_path_data);
1895 f = rom_fopen (currprefs.romfile, _T("rb"), ZFD_NORMAL);
1896 if (f == NULL) {
1897 _stprintf (currprefs.romfile, _T("%s../System/rom/kick.rom"), start_path_data);
1898 f = rom_fopen (currprefs.romfile, _T("rb"), ZFD_NORMAL);
1899 if (f == NULL)
1900 f = read_rom_name_guess (tmprom);
1901 }
1902 }
1903 }
1904 } else {
1905 _tcscpy (currprefs.romfile, tmprom2);
1906 }
1907 }
1908 addkeydir (currprefs.romfile);
1909 if (f == NULL) /* still no luck */
1910 goto err;
1911
1912 if (f != NULL) {
1913 int filesize, size, maxsize;
1914 int kspos = 524288;
1915 int extpos = 0;
1916
1917 maxsize = 524288;
1918 zfile_fseek (f, 0, SEEK_END);
1919 filesize = zfile_ftell (f);
1920 zfile_fseek (f, 0, SEEK_SET);
1921 if (filesize == 1760 * 512) {
1922 filesize = 262144;
1923 maxsize = 262144;
1924 }
1925 if (filesize == 524288 + 8) {
1926 /* GVP 0xf0 kickstart */
1927 zfile_fseek (f, 8, SEEK_SET);
1928 }
1929 if (filesize >= 524288 * 2) {
1930 struct romdata *rd = getromdatabyzfile(f);
1931 zfile_fseek (f, kspos, SEEK_SET);
1932 }
1933 if (filesize >= 524288 * 4) {
1934 kspos = 524288 * 3;
1935 extpos = 0;
1936 zfile_fseek (f, kspos, SEEK_SET);
1937 }
1938 size = read_kickstart (f, kickmemory, maxsize, 1, 0);
1939 if (size == 0)
1940 goto err;
1941 kickmem_mask = size - 1;
1942 kickmem_size = size;
1943 if (filesize >= 524288 * 2 && !extendedkickmem_type) {
1944 extendedkickmem_size = 0x80000;
1945 if (currprefs.cs_cdtvcd || currprefs.cs_cdtvram) {
1946 extendedkickmem_type = EXTENDED_ROM_CDTV;
1947 extendedkickmem_size *= 2;
1948 extendedkickmemory = mapped_malloc (extendedkickmem_size, _T("rom_f0"));
1949 extendedkickmem_start = 0xf00000;
1950 } else {
1951 extendedkickmem_type = EXTENDED_ROM_KS;
1952 extendedkickmemory = mapped_malloc (extendedkickmem_size, _T("rom_e0"));
1953 extendedkickmem_start = 0xe00000;
1954 }
1955 extendedkickmem_bank.baseaddr = extendedkickmemory;
1956 zfile_fseek (f, extpos, SEEK_SET);
1957 read_kickstart (f, extendedkickmemory, extendedkickmem_size, 0, 1);
1958 extendedkickmem_mask = extendedkickmem_size - 1;
1959 }
1960 if (filesize > 524288 * 2) {
1961 extendedkickmem2_size = 524288 * 2;
1962 extendedkickmemory2 = mapped_malloc (extendedkickmem2_size, _T("rom_a8"));
1963 extendedkickmem2_bank.baseaddr = extendedkickmemory2;
1964 zfile_fseek (f, extpos + 524288, SEEK_SET);
1965 read_kickstart (f, extendedkickmemory2, 524288, 0, 1);
1966 zfile_fseek (f, extpos + 524288 * 2, SEEK_SET);
1967 read_kickstart (f, extendedkickmemory2 + 524288, 524288, 0, 1);
1968 extendedkickmem2_mask = extendedkickmem2_size - 1;
1969 extendedkickmem2_start = 0xa80000;
1970 }
1971 }
1972
1973 #if defined(AMIGA)
1974 chk_sum:
1975 #endif
1976
1977 kickstart_version = (kickmemory[12] << 8) | kickmemory[13];
1978 if (kickstart_version == 0xffff)
1979 kickstart_version = 0;
1980 zfile_fclose (f);
1981 return 1;
1982 err:
1983 _tcscpy (currprefs.romfile, tmprom);
1984 zfile_fclose (f);
1985 return 0;
1986 }
1987
1988 #ifndef NATMEM_OFFSET
1989
mapped_malloc(size_t s,const TCHAR * file)1990 uae_u8 *mapped_malloc (size_t s, const TCHAR *file)
1991 {
1992 return xmalloc (uae_u8, s);
1993 }
1994
mapped_free(uae_u8 * p)1995 void mapped_free (uae_u8 *p)
1996 {
1997 xfree (p);
1998 }
1999
2000 #else
2001
2002 #include <sys/ipc.h>
2003 #include <sys/shm.h>
2004 #include <unistd.h>
2005 #include <sys/mman.h>
2006
2007 shmpiece *shm_start;
2008
dumplist(void)2009 static void dumplist (void)
2010 {
2011 shmpiece *x = shm_start;
2012 write_log (_T("Start Dump:\n"));
2013 while (x) {
2014 write_log (_T("this=%p,Native %p,id %d,prev=%p,next=%p,size=0x%08x\n"),
2015 x, x->native_address, x->id, x->prev, x->next, x->size);
2016 x = x->next;
2017 }
2018 write_log (_T("End Dump:\n"));
2019 }
2020
2021 /*
2022 * find_shmpiece()
2023 *
2024 * Locate the shmpiece node describing the block of memory mapped
2025 * at the *host* address <base>.
2026 * Returns a pointer to shmpiece describing that block if found.
2027 * If nothing is mapped at <base> then, direct memory access will
2028 * be disabled for the VM and 0 will be returned.
2029 */
find_shmpiece(uae_u8 * base,bool safe)2030 static shmpiece *find_shmpiece (uae_u8 *base, bool safe)
2031 {
2032 shmpiece *x = shm_start;
2033
2034 while (x && x->native_address != base)
2035 x = x->next;
2036 if (!x) {
2037 if (safe || bogomem_aliasing)
2038 return 0;
2039 write_log (_T("NATMEM: Failure to find mapping at %08X, %p\n"), base - NATMEM_OFFSET, base);
2040 nocanbang ();
2041 return 0;
2042 }
2043 return x;
2044 }
2045
2046 /*
2047 * delete_shmmaps()
2048 *
2049 * Unmap any memory blocks remapped in the VM address range
2050 * <start> to <start+size> via add_shmmaps().
2051 * Any anomalies found when processing this range, will cause direct
2052 * memory access to be disabled in the VM.
2053 */
delete_shmmaps(uae_u32 start,uae_u32 size)2054 static void delete_shmmaps (uae_u32 start, uae_u32 size)
2055 {
2056 if (!needmman ())
2057 return;
2058
2059 while (size) {
2060 uae_u8 *base = mem_banks[bankindex (start)]->baseaddr; // find host address of start of this block of memory
2061 if (base) {
2062 shmpiece *x;
2063 //base = ((uae_u8*)NATMEM_OFFSET)+start; // get host address it has been remapped at
2064
2065 x = find_shmpiece (base, true); // and locate the corresponding shmpiece node
2066 if (!x)
2067 return;
2068
2069 if (x->size > size) {
2070 if (isdirectjit ())
2071 write_log (_T("NATMEM WARNING: size mismatch mapping at %08x (size %08x, delsize %08x)\n"),start,x->size,size);
2072 size = x->size;
2073 }
2074 #if 0
2075 dumplist ();
2076 nocanbang ();
2077 return;
2078 }
2079 #endif
2080 my_shmdt (x->native_address);
2081 size -= x->size;
2082 start += x->size;
2083 if (x->next)
2084 x->next->prev = x->prev; /* remove this one from the list */
2085 if (x->prev)
2086 x->prev->next = x->next;
2087 else
2088 shm_start = x->next;
2089 xfree (x);
2090 } else {
2091 /* no host memory mapped at that address - try next bank */
2092 size -= 0x10000;
2093 start += 0x10000;
2094 }
2095 }
2096 }
2097
2098 /* add_shmmaps()
2099 *
2100 * Map the block of shared memory attached to bank <what> in host
2101 * memory so that it can be accessed by the VM using direct memory
2102 * access at the VM address <start>.
2103 */
add_shmmaps(uae_u32 start,addrbank * what)2104 static void add_shmmaps (uae_u32 start, addrbank *what)
2105 {
2106 shmpiece *x = shm_start;
2107 shmpiece *y;
2108 uae_u8 *base = what->baseaddr; // Host address of memory in this bank
2109
2110 if (!needmman ())
2111 return;
2112
2113 if (!base)
2114 return; // Nothing to do. There is no actual host memory attached to this bank.
2115
2116 x = find_shmpiece (base, false); // Find the block's current shmpiece node.
2117 if (!x)
2118 return;
2119 y = xmalloc (shmpiece, 1); // Create another shmpiece node for the new mapping
2120 *y = *x;
2121 base = NATMEM_OFFSET + start;
2122 y->native_address = (uae_u8*)my_shmat (y->id, base, 0);
2123 if (y->native_address == (void *) -1) {
2124 write_log (_T("NATMEM: Failure to map id %d existing at %08x (%p):%d "), y->id, start, base, errno);
2125 if (errno == 12) write_log ("(Can't allocate memory)\n");
2126 else if (errno == 13) write_log ("(Permission denied)\n");
2127 else if (errno == 22) write_log ("(Invalid argument)\n");
2128 else if (errno == 24) write_log ("(Too many open files)\n");
2129 else write_log("\n");
2130 dumplist ();
2131 nocanbang ();
2132 return;
2133 }
2134 y->next = shm_start;
2135 y->prev = NULL;
2136 if (y->next)
2137 y->next->prev = y;
2138 shm_start = y;
2139 }
2140
2141 /*
2142 * mapped_malloc()
2143 *
2144 * Allocate <size> bytes of memory for the VM.
2145 * If VM supports direct memory access, allocate the memory
2146 * in such a way (using shared memory) that it can later be
2147 * remapped to a different host address and thus support direct
2148 * access via the VM.
2149 * This will also create a valid shmpiece node describing
2150 * this block of memory, and add to the global list of shared memory
2151 * blocks.
2152 * If allocation of remappable shared memory fails for some reason,
2153 * direct memory access will be disabled and memory allocated via
2154 * malloc().
2155 */
mapped_malloc(size_t s,const TCHAR * file)2156 uae_u8 *mapped_malloc (size_t s, const TCHAR *file)
2157 {
2158 int id;
2159 void *answer;
2160 shmpiece *x;
2161 static int recurse;
2162
2163 if (!needmman ()) {
2164 nocanbang ();
2165 return xcalloc (uae_u8, s + 4);
2166 }
2167
2168 id = my_shmget (1, s, 0x1ff, file);
2169 if (id == -1) {
2170 // Failed to allocate new shared mem segment, so turn
2171 // off direct memory access and fall back on regular malloc()
2172 uae_u8 *p;
2173 nocanbang ();
2174 if (recurse)
2175 return NULL;
2176 recurse++;
2177 p = mapped_malloc (s, file);
2178 recurse--;
2179 return p;
2180 }
2181 answer = my_shmat (id, 0, 0); // Attach this segment at an arbitrary address - use
2182 // add_shmmap() to map it where it needs to be later.
2183 my_shmctl (id, IPC_RMID, NULL);
2184 if (answer != (void *) -1) {
2185 x = xmalloc (shmpiece, 1);
2186 x->native_address = (uae_u8*)answer;
2187 x->id = id;
2188 x->size = s;
2189 x->name = file;
2190 x->next = shm_start;
2191 x->prev = NULL;
2192 if (x->next)
2193 x->next->prev = x;
2194 shm_start = x;
2195 return (uae_u8*)answer;
2196 }
2197 if (recurse)
2198 return NULL;
2199 nocanbang ();
2200 recurse++;
2201 uae_u8 *r = mapped_malloc (s, file);
2202 recurse--;
2203 return r;
2204 }
2205
2206 #endif
2207
init_mem_banks(void)2208 static void init_mem_banks (void)
2209 {
2210 uae_u32 i;
2211
2212 for (i = 0; i < MEMORY_BANKS; i++)
2213 put_mem_bank (i << 16, &dummy_bank, 0);
2214
2215 #ifdef NATMEM_OFFSET
2216 delete_shmmaps (0, 0xFFFF0000);
2217 #endif
2218 }
2219
allocate_memory(void)2220 static void allocate_memory (void)
2221 {
2222 bogomem_aliasing = false;
2223 /* emulate 0.5M+0.5M with 1M Agnus chip ram aliasing */
2224 if (currprefs.chipmem_size == 0x80000 && currprefs.bogomem_size >= 0x80000 &&
2225 (currprefs.chipset_mask & CSMASK_ECS_AGNUS) && !(currprefs.chipset_mask & CSMASK_AGA) && currprefs.cpu_model < 68020) {
2226 if ((allocated_chipmem != currprefs.chipmem_size || allocated_bogomem != currprefs.bogomem_size)) {
2227 int memsize1, memsize2;
2228 if (chipmemory)
2229 mapped_free (chipmemory);
2230 chipmemory = 0;
2231 if (bogomemory_allocated)
2232 mapped_free (bogomemory);
2233 bogomemory = 0;
2234 bogomemory_allocated = 0;
2235 memsize1 = allocated_chipmem = currprefs.chipmem_size;
2236 memsize2 = allocated_bogomem = currprefs.bogomem_size;
2237 chipmem_mask = allocated_chipmem - 1;
2238 chipmem_full_mask = allocated_chipmem * 2 - 1;
2239 chipmem_full_size = 0x80000 * 2;
2240 chipmemory = mapped_malloc (memsize1 + memsize2, _T("chip"));
2241 bogomemory = chipmemory + memsize1;
2242 bogomem_mask = allocated_bogomem - 1;
2243 if (chipmemory == 0) {
2244 write_log (_T("Fatal error: out of memory for chipmem.\n"));
2245 allocated_chipmem = 0;
2246 } else {
2247 need_hardreset = true;
2248 }
2249 }
2250 bogomem_aliasing = true;
2251 }
2252
2253 if (allocated_chipmem != currprefs.chipmem_size) {
2254 uae_u32 memsize = 0;
2255 if (chipmemory)
2256 mapped_free (chipmemory);
2257 chipmemory = 0;
2258 if (currprefs.chipmem_size > 2 * 1024 * 1024)
2259 free_fastmemory ();
2260
2261 memsize = allocated_chipmem = chipmem_full_size = currprefs.chipmem_size;
2262 chipmem_full_mask = chipmem_mask = allocated_chipmem - 1;
2263 if (!currprefs.cachesize && memsize < 0x100000)
2264 memsize = 0x100000;
2265 if (memsize > 0x100000 && memsize < 0x200000)
2266 memsize = 0x200000;
2267 chipmemory = mapped_malloc (memsize, _T("chip"));
2268 if (chipmemory == 0) {
2269 write_log (_T("Fatal error: out of memory for chipmem.\n"));
2270 allocated_chipmem = 0;
2271 } else {
2272 need_hardreset = true;
2273 if (memsize > allocated_chipmem)
2274 memset (chipmemory + allocated_chipmem, 0xff, memsize - allocated_chipmem);
2275 }
2276 currprefs.chipset_mask = changed_prefs.chipset_mask;
2277 chipmem_full_mask = allocated_chipmem - 1;
2278 if ((currprefs.chipset_mask & CSMASK_ECS_AGNUS) && !currprefs.cachesize) {
2279 if (allocated_chipmem < 0x100000)
2280 chipmem_full_mask = 0x100000 - 1;
2281 if (allocated_chipmem > 0x100000 && allocated_chipmem < 0x200000)
2282 chipmem_full_mask = chipmem_mask = 0x200000 - 1;
2283 }
2284 }
2285
2286 if (allocated_bogomem != currprefs.bogomem_size) {
2287 if (!(allocated_bogomem == 0x200000 && currprefs.bogomem_size == 0x180000)) {
2288 if (bogomemory_allocated)
2289 mapped_free (bogomemory);
2290 bogomemory = 0;
2291 bogomemory_allocated = 0;
2292
2293 allocated_bogomem = currprefs.bogomem_size;
2294 if (allocated_bogomem >= 0x180000)
2295 allocated_bogomem = 0x200000;
2296 bogomem_mask = allocated_bogomem - 1;
2297
2298 if (allocated_bogomem) {
2299 bogomemory = mapped_malloc (allocated_bogomem, _T("bogo"));
2300 if (bogomemory == 0) {
2301 write_log (_T("Out of memory for bogomem.\n"));
2302 allocated_bogomem = 0;
2303 }
2304 }
2305 need_hardreset = true;
2306 }
2307 }
2308 if (allocated_a3000lmem != currprefs.mbresmem_low_size) {
2309 if (a3000lmemory)
2310 mapped_free (a3000lmemory);
2311 a3000lmemory = 0;
2312
2313 allocated_a3000lmem = currprefs.mbresmem_low_size;
2314 a3000lmem_mask = allocated_a3000lmem - 1;
2315 a3000lmem_start = 0x08000000 - allocated_a3000lmem;
2316 if (allocated_a3000lmem) {
2317 a3000lmemory = mapped_malloc (allocated_a3000lmem, _T("ramsey_low"));
2318 if (a3000lmemory == 0) {
2319 write_log (_T("Out of memory for a3000lowmem.\n"));
2320 allocated_a3000lmem = 0;
2321 }
2322 }
2323 need_hardreset = true;
2324 }
2325 if (allocated_a3000hmem != currprefs.mbresmem_high_size) {
2326 if (a3000hmemory)
2327 mapped_free (a3000hmemory);
2328 a3000hmemory = 0;
2329
2330 allocated_a3000hmem = currprefs.mbresmem_high_size;
2331 a3000hmem_mask = allocated_a3000hmem - 1;
2332 a3000hmem_start = 0x08000000;
2333 if (allocated_a3000hmem) {
2334 a3000hmemory = mapped_malloc (allocated_a3000hmem, _T("ramsey_high"));
2335 if (a3000hmemory == 0) {
2336 write_log (_T("Out of memory for a3000highmem.\n"));
2337 allocated_a3000hmem = 0;
2338 }
2339 }
2340 need_hardreset = true;
2341 }
2342 #ifdef CDTV
2343 if ((int)allocated_cardmem != currprefs.cs_cdtvcard * 1024) {
2344 if (cardmemory)
2345 mapped_free (cardmemory);
2346 cardmemory = 0;
2347
2348 allocated_cardmem = currprefs.cs_cdtvcard * 1024;
2349 cardmem_mask = allocated_cardmem - 1;
2350 if (allocated_cardmem) {
2351 cardmemory = mapped_malloc (allocated_cardmem, _T("rom_e0"));
2352 if (cardmemory == 0) {
2353 write_log (_T("Out of memory for cardmem.\n"));
2354 allocated_cardmem = 0;
2355 }
2356 }
2357 cdtv_loadcardmem(cardmemory, allocated_cardmem);
2358 }
2359 #endif
2360 if (allocated_custmem1 != currprefs.custom_memory_sizes[0]) {
2361 if (custmem1)
2362 mapped_free (custmem1);
2363 custmem1 = 0;
2364 allocated_custmem1 = currprefs.custom_memory_sizes[0];
2365 custmem1_mask = allocated_custmem1 - 1;
2366 if (allocated_custmem1) {
2367 custmem1 = mapped_malloc (allocated_custmem1, _T("custmem1"));
2368 if (!custmem1)
2369 allocated_custmem1 = 0;
2370 }
2371 }
2372 if (allocated_custmem2 != currprefs.custom_memory_sizes[1]) {
2373 if (custmem2)
2374 mapped_free (custmem2);
2375 custmem2 = 0;
2376 allocated_custmem2 = currprefs.custom_memory_sizes[1];
2377 custmem2_mask = allocated_custmem2 - 1;
2378 if (allocated_custmem2) {
2379 custmem2 = mapped_malloc (allocated_custmem2, _T("custmem2"));
2380 if (!custmem2)
2381 allocated_custmem2 = 0;
2382 }
2383 }
2384
2385 #ifdef SAVESTATE
2386 if (savestate_state == STATE_RESTORE) {
2387 if (bootrom_filepos) {
2388 #ifdef NATMEM_OFFSET
2389 protect_roms (false);
2390 #endif
2391 restore_ram (bootrom_filepos, rtarea);
2392 #ifdef NATMEM_OFFSET
2393 protect_roms (true);
2394 #endif
2395 }
2396 restore_ram (chip_filepos, chipmemory);
2397 if (allocated_bogomem > 0)
2398 restore_ram (bogo_filepos, bogomemory);
2399 if (allocated_a3000lmem > 0)
2400 restore_ram (a3000lmem_filepos, a3000lmemory);
2401 if (allocated_a3000hmem > 0)
2402 restore_ram (a3000hmem_filepos, a3000hmemory);
2403 }
2404 #endif
2405 chipmem_bank.baseaddr = chipmemory;
2406 #ifdef AGA
2407 chipmem_bank_ce2.baseaddr = chipmemory;
2408 #endif
2409 bogomem_bank.baseaddr = bogomemory;
2410 a3000lmem_bank.baseaddr = a3000lmemory;
2411 a3000hmem_bank.baseaddr = a3000hmemory;
2412 cardmem_bank.baseaddr = cardmemory;
2413 bootrom_filepos = 0;
2414 chip_filepos = 0;
2415 bogo_filepos = 0;
2416 a3000lmem_filepos = 0;
2417 a3000hmem_filepos = 0;
2418 }
2419
fill_ce_banks(void)2420 static void fill_ce_banks (void)
2421 {
2422 int i;
2423
2424 memset (ce_banktype, CE_MEMBANK_FAST, sizeof ce_banktype);
2425 // data cachable regions
2426 memset (ce_cachable, 0, sizeof ce_cachable);
2427 memset (ce_cachable + (0x00200000 >> 16), 1, currprefs.fastmem_size >> 16);
2428 memset (ce_cachable + (0x00c00000 >> 16), 1, currprefs.bogomem_size >> 16);
2429 memset (ce_cachable + (z3fastmem_start >> 16), 1, currprefs.z3fastmem_size >> 16);
2430 memset (ce_cachable + (z3fastmem2_start >> 16), 1, currprefs.z3fastmem2_size >> 16);
2431
2432 if (&get_mem_bank (0) == &chipmem_bank) {
2433 for (i = 0; i < (0x200000 >> 16); i++)
2434 ce_banktype[i] = CE_MEMBANK_CHIP;
2435 }
2436 if (!currprefs.cs_slowmemisfast) {
2437 for (i = (0xc00000 >> 16); i < (0xe00000 >> 16); i++)
2438 ce_banktype[i] = CE_MEMBANK_CHIP;
2439 }
2440 for (i = (0xd00000 >> 16); i < (0xe00000 >> 16); i++)
2441 ce_banktype[i] = CE_MEMBANK_CHIP;
2442 for (i = (0xa00000 >> 16); i < (0xc00000 >> 16); i++) {
2443 addrbank *b;
2444 ce_banktype[i] = CE_MEMBANK_CIA;
2445 b = &get_mem_bank (i << 16);
2446 if (b != &cia_bank) {
2447 ce_banktype[i] = CE_MEMBANK_FAST;
2448 ce_cachable[i] = 1;
2449 }
2450 }
2451 // CD32 ROM is 16-bit
2452 if (currprefs.cs_cd32cd) {
2453 for (i = (0xe00000 >> 16); i < (0xe80000 >> 16); i++)
2454 ce_banktype[i] = CE_MEMBANK_FAST16BIT;
2455 for (i = (0xf80000 >> 16); i <= (0xff0000 >> 16); i++)
2456 ce_banktype[i] = CE_MEMBANK_FAST16BIT;
2457 }
2458 if (currprefs.address_space_24) {
2459 for (i = 1; i < 256; i++)
2460 memcpy (&ce_banktype[i * 256], &ce_banktype[0], 256);
2461 }
2462 }
2463
map_overlay(int chip)2464 void map_overlay (int chip)
2465 {
2466 int size;
2467 addrbank *cb;
2468
2469 size = allocated_chipmem >= 0x180000 ? (allocated_chipmem >> 16) : 32;
2470 cb = &chipmem_bank;
2471 #ifdef AGA
2472 #if 0
2473 if (currprefs.cpu_cycle_exact && currprefs.cpu_model >= 68020)
2474 cb = &chipmem_bank_ce2;
2475 #endif
2476 #endif
2477 if (chip) {
2478 map_banks (&dummy_bank, 0, 32, 0);
2479 if (!isdirectjit ()) {
2480 map_banks (cb, 0, size, allocated_chipmem);
2481 if ((currprefs.chipset_mask & CSMASK_ECS_AGNUS) && allocated_bogomem == 0) {
2482 int start = allocated_chipmem >> 16;
2483 if (allocated_chipmem < 0x100000) {
2484 int dummy = (0x100000 - allocated_chipmem) >> 16;
2485 map_banks (&chipmem_dummy_bank, start, dummy, 0);
2486 map_banks (&chipmem_dummy_bank, start + 16, dummy, 0);
2487 } else if (allocated_chipmem < 0x200000 && allocated_chipmem > 0x100000) {
2488 int dummy = (0x200000 - allocated_chipmem) >> 16;
2489 map_banks (&chipmem_dummy_bank, start, dummy, 0);
2490 }
2491 }
2492 } else {
2493 map_banks (cb, 0, allocated_chipmem >> 16, 0);
2494 }
2495 } else {
2496 addrbank *rb = NULL;
2497 if (size < 32)
2498 size = 32;
2499 cb = &get_mem_bank (0xf00000);
2500 if (!rb && cb && (cb->flags & ABFLAG_ROM) && get_word (0xf00000) == 0x1114)
2501 rb = cb;
2502 cb = &get_mem_bank (0xe00000);
2503 if (!rb && cb && (cb->flags & ABFLAG_ROM) && get_word (0xe00000) == 0x1114)
2504 rb = cb;
2505 if (!rb)
2506 rb = &kickmem_bank;
2507 map_banks (rb, 0, size, 0x80000);
2508 }
2509 fill_ce_banks ();
2510 if (!isrestore () && valid_address (regs.pc, 4))
2511 m68k_setpc (m68k_getpc ());
2512 }
2513
getz2size(struct uae_prefs * p)2514 uae_s32 getz2size (struct uae_prefs *p)
2515 {
2516 ULONG start;
2517 start = p->fastmem_size;
2518 if (p->rtgmem_size && !p->rtgmem_type) {
2519 while (start & (p->rtgmem_size - 1) && start < 8 * 1024 * 1024)
2520 start += 1024 * 1024;
2521 if (start + p->rtgmem_size > 8 * 1024 * 1024)
2522 return -1;
2523 }
2524 start += p->rtgmem_size;
2525 return start;
2526 }
2527
getz2endaddr(void)2528 ULONG getz2endaddr (void)
2529 {
2530 ULONG start;
2531 start = currprefs.fastmem_size;
2532 if (currprefs.rtgmem_size && !currprefs.rtgmem_type) {
2533 if (!start)
2534 start = 0x00200000;
2535 while (start & (currprefs.rtgmem_size - 1) && start < 4 * 1024 * 1024)
2536 start += 1024 * 1024;
2537 }
2538 return start + 2 * 1024 * 1024;
2539 }
2540
memory_clear(void)2541 void memory_clear (void)
2542 {
2543 mem_hardreset = 0;
2544 if (savestate_state == STATE_RESTORE)
2545 return;
2546 if (chipmemory)
2547 memset (chipmemory, 0, allocated_chipmem);
2548 if (bogomemory)
2549 memset (bogomemory, 0, allocated_bogomem);
2550 if (a3000lmemory)
2551 memset (a3000lmemory, 0, allocated_a3000lmem);
2552 if (a3000hmemory)
2553 memset (a3000hmemory, 0, allocated_a3000hmem);
2554 expansion_clear ();
2555 }
2556
2557 #ifdef __LIBRETRO__
2558 int romnotfound=0;
2559 #endif
2560
memory_reset(void)2561 void memory_reset (void)
2562 {
2563 int bnk, bnk_end;
2564 bool gayleorfatgary;
2565
2566 need_hardreset = false;
2567 rom_write_enabled = true;
2568 /* Use changed_prefs, as m68k_reset is called later. */
2569 if (last_address_space_24 != changed_prefs.address_space_24)
2570 need_hardreset = true;
2571 last_address_space_24 = changed_prefs.address_space_24;
2572
2573 if (mem_hardreset > 2)
2574 memory_init ();
2575
2576 be_cnt = 0;
2577 currprefs.chipmem_size = changed_prefs.chipmem_size;
2578 currprefs.bogomem_size = changed_prefs.bogomem_size;
2579 currprefs.mbresmem_low_size = changed_prefs.mbresmem_low_size;
2580 currprefs.mbresmem_high_size = changed_prefs.mbresmem_high_size;
2581 currprefs.cs_ksmirror_e0 = changed_prefs.cs_ksmirror_e0;
2582 currprefs.cs_ksmirror_a8 = changed_prefs.cs_ksmirror_a8;
2583 currprefs.cs_ciaoverlay = changed_prefs.cs_ciaoverlay;
2584 currprefs.cs_cdtvram = changed_prefs.cs_cdtvram;
2585 currprefs.cs_cdtvcard = changed_prefs.cs_cdtvcard;
2586 currprefs.cs_a1000ram = changed_prefs.cs_a1000ram;
2587 currprefs.cs_ide = changed_prefs.cs_ide;
2588 currprefs.cs_fatgaryrev = changed_prefs.cs_fatgaryrev;
2589 currprefs.cs_ramseyrev = changed_prefs.cs_ramseyrev;
2590
2591 gayleorfatgary = (currprefs.chipset_mask & CSMASK_AGA) || currprefs.cs_pcmcia || currprefs.cs_ide > 0 || currprefs.cs_mbdmac;
2592
2593 init_mem_banks ();
2594 allocate_memory ();
2595 chipmem_setindirect ();
2596
2597 if (mem_hardreset > 1
2598 || _tcscmp (currprefs.romfile, changed_prefs.romfile) != 0
2599 || _tcscmp (currprefs.romextfile, changed_prefs.romextfile) != 0)
2600 {
2601 #ifdef NATMEM_OFFSET
2602 protect_roms (false);
2603 #endif
2604 write_log (_T("ROM loader.. (%s)\n"), currprefs.romfile);
2605 kickstart_rom = 1;
2606 a1000_handle_kickstart (0);
2607 xfree (a1000_bootrom);
2608 a1000_bootrom = 0;
2609 a1000_kickstart_mode = 0;
2610
2611 memcpy (currprefs.romfile, changed_prefs.romfile, sizeof currprefs.romfile);
2612 memcpy (currprefs.romextfile, changed_prefs.romextfile, sizeof currprefs.romextfile);
2613 need_hardreset = true;
2614 mapped_free (extendedkickmemory);
2615 extendedkickmemory = 0;
2616 extendedkickmem_size = 0;
2617 extendedkickmemory2 = 0;
2618 extendedkickmem2_size = 0;
2619 extendedkickmem_type = 0;
2620 load_extendedkickstart (currprefs.romextfile, 0);
2621 load_extendedkickstart (currprefs.romextfile2, EXTENDED_ROM_CDTV);
2622 kickmem_mask = 524288 - 1;
2623 if (!load_kickstart ()) {
2624 if (_tcslen (currprefs.romfile) > 0) {
2625 write_log (_T("Failed to open '%s'\n"), currprefs.romfile);
2626 notify_user (NUMSG_NOROM);
2627 #ifdef __LIBRETRO__
2628 romnotfound=1;
2629 #endif
2630 }
2631 load_kickstart_replacement ();
2632 } else {
2633 struct romdata *rd = getromdatabydata (kickmemory, kickmem_size);
2634 if (rd) {
2635 write_log (_T("Known ROM '%s' loaded\n"), rd->name);
2636 if ((rd->cpu & 8) && changed_prefs.cpu_model < 68030) {
2637 notify_user (NUMSG_KS68030PLUS);
2638 uae_restart (-1, NULL);
2639 } else if ((rd->cpu & 3) == 3 && changed_prefs.cpu_model != 68030) {
2640 notify_user (NUMSG_KS68030);
2641 uae_restart (-1, NULL);
2642 } else if ((rd->cpu & 3) == 1 && changed_prefs.cpu_model < 68020) {
2643 notify_user (NUMSG_KS68EC020);
2644 uae_restart (-1, NULL);
2645 } else if ((rd->cpu & 3) == 2 && (changed_prefs.cpu_model < 68020 || changed_prefs.address_space_24)) {
2646 notify_user (NUMSG_KS68020);
2647 uae_restart (-1, NULL);
2648 }
2649 if (rd->cloanto)
2650 cloanto_rom = 1;
2651 kickstart_rom = 0;
2652 if ((rd->type & (ROMTYPE_SPECIALKICK | ROMTYPE_KICK)) == ROMTYPE_KICK)
2653 kickstart_rom = 1;
2654 if ((rd->cpu & 4) && currprefs.cs_compatible) {
2655 /* A4000 ROM = need ramsey, gary and ide */
2656 if (currprefs.cs_ramseyrev < 0)
2657 changed_prefs.cs_ramseyrev = currprefs.cs_ramseyrev = 0x0f;
2658 changed_prefs.cs_fatgaryrev = currprefs.cs_fatgaryrev = 0;
2659 if (currprefs.cs_ide != IDE_A4000)
2660 changed_prefs.cs_ide = currprefs.cs_ide = -1;
2661 }
2662 } else {
2663 write_log (_T("Unknown ROM '%s' loaded\n"), currprefs.romfile);
2664 }
2665 }
2666 patch_kick ();
2667 write_log (_T("ROM loader end\n"));
2668 #ifdef NATMEM_OFFSET
2669 protect_roms (true);
2670 #endif
2671 }
2672
2673 if ((cloanto_rom || extendedkickmem_size) && currprefs.maprom && currprefs.maprom < 0x01000000) {
2674 currprefs.maprom = changed_prefs.maprom = 0x00a80000;
2675 if (extendedkickmem2_size) // can't do if 2M ROM
2676 currprefs.maprom = changed_prefs.maprom = 0;
2677 }
2678
2679 map_banks (&custom_bank, 0xC0, 0xE0 - 0xC0, 0); // Map custom chips at at 0xC00000 - 0xDFFFFF
2680 map_banks (&cia_bank, 0xA0, 32, 0); // Map CIAs at 0xA00000 - 0xBFFFFF
2681 if (!currprefs.cs_a1000ram && currprefs.cs_rtc != 3)
2682 /* D80000 - DDFFFF not mapped (A1000 or A2000 = custom chips) */
2683 map_banks (&dummy_bank, 0xD8, 6, 0);
2684
2685 /* map "nothing" to 0x200000 - 0x9FFFFF (0xBEFFFF if Gayle or Fat Gary) */
2686 bnk = allocated_chipmem >> 16;
2687 if ((uae_u32)bnk < 0x20 + (currprefs.fastmem_size >> 16))
2688 bnk = 0x20 + (currprefs.fastmem_size >> 16);
2689 bnk_end = gayleorfatgary ? 0xBF : 0xA0;
2690 map_banks (&dummy_bank, bnk, bnk_end - bnk, 0);
2691 #ifdef GAYLE
2692 if (gayleorfatgary) {
2693 // a3000 or a4000 = custom chips from 0xc0 to 0xd0
2694 if (currprefs.cs_ide == IDE_A4000 || currprefs.cs_mbdmac)
2695 map_banks (&dummy_bank, 0xd0, 8, 0);
2696 else
2697 map_banks (&dummy_bank, 0xc0, 0xd8 - 0xc0, 0);
2698 }
2699 #endif
2700
2701 if (bogomemory != 0) {
2702 // Map "slow" memory from at 0xC00000 to max 0xDBFFFF, or 0xCFFFFF on an AGA machine.
2703 int t = currprefs.bogomem_size >> 16;
2704 if (t > 0x1C)
2705 t = 0x1C;
2706 if (t > 0x18 && ((currprefs.chipset_mask & CSMASK_AGA) || (currprefs.cpu_model >= 68020 && !currprefs.address_space_24)))
2707 t = 0x18;
2708 map_banks (&bogomem_bank, 0xC0, t, 0);
2709 }
2710 #ifdef GAYLE
2711 if (currprefs.cs_ide || currprefs.cs_pcmcia) {
2712 if (currprefs.cs_ide == IDE_A600A1200 || currprefs.cs_pcmcia) {
2713 map_banks (&gayle_bank, 0xD8, 6, 0);
2714 map_banks (&gayle2_bank, 0xDD, 2, 0);
2715 }
2716 gayle_map_pcmcia ();
2717 if (currprefs.cs_ide == IDE_A4000 || currprefs.cs_mbdmac == 2)
2718 map_banks (&gayle_bank, 0xDD, 1, 0);
2719 if (currprefs.cs_ide < 0 && !currprefs.cs_pcmcia)
2720 map_banks (&gayle_bank, 0xD8, 6, 0);
2721 if (currprefs.cs_ide < 0)
2722 map_banks (&gayle_bank, 0xDD, 1, 0);
2723 }
2724 #endif
2725 // Real-time clock at 0xDC0000 - 0xDCFFFF.
2726 if (currprefs.cs_rtc == 3) // A2000 clock
2727 map_banks (&clock_bank, 0xD8, 4, 0);
2728 if (currprefs.cs_rtc == 1 || currprefs.cs_rtc == 2 || currprefs.cs_cdtvram)
2729 map_banks (&clock_bank, 0xDC, 1, 0);
2730 else if (currprefs.cs_ksmirror_a8 || currprefs.cs_ide > 0 || currprefs.cs_pcmcia)
2731 map_banks (&clock_bank, 0xDC, 1, 0); /* none clock */
2732 #ifdef GAYLE
2733 if (currprefs.cs_fatgaryrev >= 0 || currprefs.cs_ramseyrev >= 0)
2734 map_banks (&mbres_bank, 0xDE, 1, 0);
2735 #endif
2736 #ifdef CD32
2737 if (currprefs.cs_cd32c2p || currprefs.cs_cd32cd || currprefs.cs_cd32nvram) {
2738 map_banks (&akiko_bank, AKIKO_BASE >> 16, 1, 0);
2739 map_banks (&gayle2_bank, 0xDD, 2, 0);
2740 }
2741 #endif
2742 #ifdef CDTV
2743 if (currprefs.cs_cdtvcd)
2744 cdtv_check_banks ();
2745 #endif
2746 #ifdef A2091
2747 if (currprefs.cs_mbdmac == 1)
2748 a3000scsi_reset ();
2749 #endif
2750
2751 if (a3000lmemory != 0)
2752 map_banks (&a3000lmem_bank, a3000lmem_start >> 16, allocated_a3000lmem >> 16, 0);
2753 if (a3000hmemory != 0)
2754 map_banks (&a3000hmem_bank, a3000hmem_start >> 16, allocated_a3000hmem >> 16, 0);
2755 #ifdef CDTV
2756 if (cardmemory != 0)
2757 map_banks (&cardmem_bank, cardmem_start >> 16, allocated_cardmem >> 16, 0);
2758 #endif
2759
2760 // Map primary Kickstart at 0xF80000 - 0xFFFFFF.
2761 map_banks (&kickmem_bank, 0xF8, 8, 0);
2762 if (currprefs.maprom)
2763 map_banks (&kickram_bank, currprefs.maprom >> 16, extendedkickmem2_size ? 32 : (extendedkickmem_size ? 16 : 8), 0);
2764 /* map beta Kickstarts at 0x200000/0xC00000/0xF00000 */
2765 if (kickmemory[0] == 0x11 && kickmemory[2] == 0x4e && kickmemory[3] == 0xf9 && kickmemory[4] == 0x00) {
2766 uae_u32 addr = kickmemory[5];
2767 if (addr == 0x20 && currprefs.chipmem_size <= 0x200000 && currprefs.fastmem_size == 0)
2768 map_banks (&kickmem_bank, addr, 8, 0);
2769 if (addr == 0xC0 && currprefs.bogomem_size == 0)
2770 map_banks (&kickmem_bank, addr, 8, 0);
2771 if (addr == 0xF0)
2772 map_banks (&kickmem_bank, addr, 8, 0);
2773 }
2774
2775 if (a1000_bootrom)
2776 a1000_handle_kickstart (1);
2777
2778 #ifdef AUTOCONFIG
2779 // Map Autoconfig space at 0xE80000 - 0xE8FFFF.
2780 map_banks (&expamem_bank, 0xE8, 1, 0);
2781 #endif
2782
2783 if (a3000_f0)
2784 map_banks (&extendedkickmem_bank, 0xf0, 1, 0);
2785
2786 /* Map the chipmem into all of the lower 8MB */
2787 map_overlay (1);
2788
2789 switch (extendedkickmem_type) {
2790 case EXTENDED_ROM_KS:
2791 map_banks (&extendedkickmem_bank, 0xE0, 8, 0);
2792 break;
2793 #ifdef CDTV
2794 case EXTENDED_ROM_CDTV:
2795 map_banks (&extendedkickmem_bank, 0xF0, extendedkickmem_size == 2 * 524288 ? 16 : 8, 0);
2796 break;
2797 #endif
2798 #ifdef CD32
2799 case EXTENDED_ROM_CD32:
2800 map_banks (&extendedkickmem_bank, 0xE0, 8, 0);
2801 break;
2802 #endif
2803 }
2804
2805 #ifdef AUTOCONFIG
2806 if (need_uae_boot_rom ())
2807 map_banks (&rtarea_bank, rtarea_base >> 16, 1, 0);
2808 #endif
2809
2810 if ((cloanto_rom || currprefs.cs_ksmirror_e0) && (currprefs.maprom != 0xe00000) && !extendedkickmem_type)
2811 map_banks (&kickmem_bank, 0xE0, 8, 0);
2812 if (currprefs.cs_ksmirror_a8) {
2813 if (extendedkickmem2_size) {
2814 map_banks (&extendedkickmem2_bank, 0xa8, 16, 0);
2815 } else {
2816 struct romdata *rd = getromdatabypath (currprefs.cartfile);
2817 if (!rd || rd->id != 63) {
2818 if (extendedkickmem_type == EXTENDED_ROM_CD32 || extendedkickmem_type == EXTENDED_ROM_KS)
2819 map_banks (&extendedkickmem_bank, 0xb0, 8, 0);
2820 else
2821 map_banks (&kickmem_bank, 0xb0, 8, 0);
2822 map_banks (&kickmem_bank, 0xa8, 8, 0);
2823 }
2824 }
2825 }
2826
2827 #ifdef ARCADIA
2828 if (is_arcadia_rom (currprefs.romextfile) == ARCADIA_BIOS) {
2829 if (_tcscmp (currprefs.romextfile, changed_prefs.romextfile) != 0)
2830 memcpy (currprefs.romextfile, changed_prefs.romextfile, sizeof currprefs.romextfile);
2831 if (_tcscmp (currprefs.cartfile, changed_prefs.cartfile) != 0)
2832 memcpy (currprefs.cartfile, changed_prefs.cartfile, sizeof currprefs.cartfile);
2833 arcadia_unmap ();
2834 is_arcadia_rom (currprefs.romextfile);
2835 is_arcadia_rom (currprefs.cartfile);
2836 arcadia_map_banks ();
2837 }
2838 #endif
2839
2840 #ifdef ACTION_REPLAY
2841 #ifdef ARCADIA
2842 if (!arcadia_bios) {
2843 #endif
2844 action_replay_memory_reset ();
2845 #ifdef ARCADIA
2846 }
2847 #endif
2848 #endif
2849
2850 if (currprefs.custom_memory_sizes[0]) {
2851 map_banks (&custmem1_bank,
2852 currprefs.custom_memory_addrs[0] >> 16,
2853 currprefs.custom_memory_sizes[0] >> 16, 0);
2854 }
2855 if (currprefs.custom_memory_sizes[1]) {
2856 map_banks (&custmem2_bank,
2857 currprefs.custom_memory_addrs[1] >> 16,
2858 currprefs.custom_memory_sizes[1] >> 16, 0);
2859 }
2860
2861
2862 if (mem_hardreset) {
2863 memory_clear ();
2864 }
2865 write_log (_T("memory init end\n"));
2866 }
2867
2868
memory_init(void)2869 void memory_init (void)
2870 {
2871 init_mem_banks ();
2872 virtualdevice_init ();
2873
2874 allocated_chipmem = 0;
2875 allocated_bogomem = 0;
2876 kickmemory = 0;
2877 extendedkickmemory = 0;
2878 extendedkickmem_size = 0;
2879 extendedkickmemory2 = 0;
2880 extendedkickmem2_size = 0;
2881 extendedkickmem_type = 0;
2882 chipmemory = 0;
2883 allocated_a3000lmem = allocated_a3000hmem = 0;
2884 a3000lmemory = a3000hmemory = 0;
2885 bogomemory = 0;
2886 cardmemory = 0;
2887 allocated_custmem1 = allocated_custmem2 = 0;
2888 custmem1 = 0;
2889 custmem2 = 0;
2890
2891 kickmemory = mapped_malloc (0x80000, _T("kick"));
2892 memset (kickmemory, 0, 0x80000);
2893 kickmem_bank.baseaddr = kickmemory;
2894 _tcscpy (currprefs.romfile, _T("<none>"));
2895 currprefs.romextfile[0] = 0;
2896
2897 #ifdef ACTION_REPLAY
2898 action_replay_unload (0);
2899 action_replay_load();
2900 action_replay_init(1);
2901 #ifdef ACTION_REPLAY_HRTMON
2902 hrtmon_load();
2903 #endif
2904 #endif
2905 }
2906
memory_cleanup(void)2907 void memory_cleanup (void)
2908 {
2909 if (a3000lmemory)
2910 mapped_free (a3000lmemory);
2911 if (a3000hmemory)
2912 mapped_free (a3000hmemory);
2913 if (bogomemory && bogomemory_allocated)
2914 mapped_free (bogomemory);
2915 if (kickmemory)
2916 mapped_free (kickmemory);
2917 if (a1000_bootrom)
2918 xfree (a1000_bootrom);
2919 if (chipmemory)
2920 mapped_free (chipmemory);
2921 #ifdef CDTV
2922 if (cardmemory) {
2923 cdtv_savecardmem (cardmemory, allocated_cardmem);
2924 mapped_free (cardmemory);
2925 }
2926 #endif
2927 if (custmem1)
2928 mapped_free (custmem1);
2929 if (custmem2)
2930 mapped_free (custmem2);
2931
2932 bogomemory = 0;
2933 bogomemory_allocated = 0;
2934 kickmemory = 0;
2935 a3000lmemory = a3000hmemory = 0;
2936 a1000_bootrom = 0;
2937 a1000_kickstart_mode = 0;
2938 chipmemory = 0;
2939 cardmemory = 0;
2940 custmem1 = 0;
2941 custmem2 = 0;
2942
2943 #ifdef ACTION_REPLAY
2944 action_replay_cleanup();
2945 #endif
2946 #ifdef ARCADIA
2947 arcadia_unmap ();
2948 #endif
2949 }
2950
memory_hardreset(int mode)2951 void memory_hardreset (int mode)
2952 {
2953 if (mode + 1 > mem_hardreset)
2954 mem_hardreset = mode + 1;
2955 }
2956
2957 // do not map if it conflicts with custom banks
map_banks_cond(addrbank * bank,int start,int size,int realsize)2958 void map_banks_cond (addrbank *bank, int start, int size, int realsize)
2959 {
2960 for (int i = 0; i < MAX_CUSTOM_MEMORY_ADDRS; i++) {
2961 int cstart = currprefs.custom_memory_addrs[i] >> 16;
2962 if (!cstart)
2963 continue;
2964 int csize = currprefs.custom_memory_sizes[i] >> 16;
2965 if (!csize)
2966 continue;
2967 if (start <= cstart && start + size >= cstart)
2968 return;
2969 if (cstart <= start && (cstart + size >= start || start + size > cstart))
2970 return;
2971 }
2972 map_banks (bank, start, size, realsize);
2973 }
2974
map_banks(addrbank * bank,int start,int size,int realsize)2975 void map_banks (addrbank *bank, int start, int size, int realsize)
2976 {
2977 int bnr, old;
2978 unsigned long int hioffs = 0, endhioffs = 0x100;
2979 addrbank *orgbank = bank;
2980 uae_u32 realstart = start;
2981
2982 #ifdef DEBUG
2983 old = debug_bankchange (-1);
2984 #endif
2985 #ifdef JIT
2986 flush_icache (0, 3); /* Sure don't want to keep any old mappings around! */
2987 delete_shmmaps (start << 16, size << 16);
2988 #endif
2989
2990 if (!realsize)
2991 realsize = size << 16;
2992
2993 if ((size << 16) < realsize) {
2994 write_log (_T("Broken mapping, size=%x, realsize=%x\nStart is %x\n"),
2995 size, realsize, start);
2996 }
2997
2998 #ifndef ADDRESS_SPACE_24BIT
2999 if (start >= 0x100) {
3000 int real_left = 0;
3001 for (bnr = start; bnr < start + size; bnr++) {
3002 if (!real_left) {
3003 realstart = bnr;
3004 real_left = realsize >> 16;
3005 #ifdef NATMEM_OFFSET
3006 add_shmmaps (realstart << 16, bank);
3007 #endif
3008 }
3009 put_mem_bank (bnr << 16, bank, realstart << 16);
3010 real_left--;
3011 }
3012 #ifdef DEBUG
3013 debug_bankchange (old);
3014 #endif
3015 return;
3016 }
3017 #endif
3018 if (last_address_space_24)
3019 endhioffs = 0x10000;
3020 #ifdef ADDRESS_SPACE_24BIT
3021 endhioffs = 0x100;
3022 #endif
3023 for (hioffs = 0; hioffs < endhioffs; hioffs += 0x100) {
3024 int real_left = 0;
3025 for (bnr = start; bnr < start + size; bnr++) {
3026 if (!real_left) {
3027 realstart = bnr + hioffs;
3028 real_left = realsize >> 16;
3029 #ifdef NATMEM_OFFSET
3030 add_shmmaps (realstart << 16, bank);
3031 #endif
3032 }
3033 put_mem_bank ((bnr + hioffs) << 16, bank, realstart << 16);
3034 real_left--;
3035 }
3036 }
3037 #ifdef DEBUG
3038 debug_bankchange (old);
3039 #endif
3040 fill_ce_banks ();
3041 }
3042
3043 #ifdef SAVESTATE
3044
3045 /* memory save/restore code */
3046
save_bootrom(int * len)3047 uae_u8 *save_bootrom (int *len)
3048 {
3049 if (!uae_boot_rom)
3050 return 0;
3051 *len = uae_boot_rom_size;
3052 return rtarea;
3053 }
3054
save_cram(int * len)3055 uae_u8 *save_cram (int *len)
3056 {
3057 *len = allocated_chipmem;
3058 return chipmemory;
3059 }
3060
save_bram(int * len)3061 uae_u8 *save_bram (int *len)
3062 {
3063 *len = allocated_bogomem;
3064 return bogomemory;
3065 }
3066
save_a3000lram(int * len)3067 uae_u8 *save_a3000lram (int *len)
3068 {
3069 *len = allocated_a3000lmem;
3070 return a3000lmemory;
3071 }
3072
save_a3000hram(int * len)3073 uae_u8 *save_a3000hram (int *len)
3074 {
3075 *len = allocated_a3000hmem;
3076 return a3000hmemory;
3077 }
3078
restore_bootrom(int len,size_t filepos)3079 void restore_bootrom (int len, size_t filepos)
3080 {
3081 bootrom_filepos = filepos;
3082 }
3083
restore_cram(int len,size_t filepos)3084 void restore_cram (int len, size_t filepos)
3085 {
3086 chip_filepos = filepos;
3087 changed_prefs.chipmem_size = len;
3088 }
3089
restore_bram(int len,size_t filepos)3090 void restore_bram (int len, size_t filepos)
3091 {
3092 bogo_filepos = filepos;
3093 changed_prefs.bogomem_size = len;
3094 }
3095
restore_a3000lram(int len,size_t filepos)3096 void restore_a3000lram (int len, size_t filepos)
3097 {
3098 a3000lmem_filepos = filepos;
3099 changed_prefs.mbresmem_low_size = len;
3100 }
3101
restore_a3000hram(int len,size_t filepos)3102 void restore_a3000hram (int len, size_t filepos)
3103 {
3104 a3000hmem_filepos = filepos;
3105 changed_prefs.mbresmem_high_size = len;
3106 }
3107
restore_rom(uae_u8 * src)3108 uae_u8 *restore_rom (uae_u8 *src)
3109 {
3110 uae_u32 crc32, mem_start, mem_size, mem_type, version;
3111 TCHAR *s, *romn;
3112 int i, crcdet;
3113 struct romlist *rl = romlist_getit ();
3114
3115 mem_start = restore_u32 ();
3116 mem_size = restore_u32 ();
3117 mem_type = restore_u32 ();
3118 version = restore_u32 ();
3119 crc32 = restore_u32 ();
3120 romn = restore_string ();
3121 crcdet = 0;
3122 for (i = 0; i < romlist_count (); i++) {
3123 if (rl[i].rd->crc32 == crc32 && crc32) {
3124 if (zfile_exists (rl[i].path)) {
3125 switch (mem_type)
3126 {
3127 case 0:
3128 _tcsncpy (changed_prefs.romfile, rl[i].path, 255);
3129 break;
3130 case 1:
3131 _tcsncpy (changed_prefs.romextfile, rl[i].path, 255);
3132 break;
3133 }
3134 write_log (_T("ROM '%s' = '%s'\n"), romn, rl[i].path);
3135 crcdet = 1;
3136 } else {
3137 write_log (_T("ROM '%s' = '%s' invalid rom scanner path!"), romn, rl[i].path);
3138 }
3139 break;
3140 }
3141 }
3142 s = restore_string ();
3143 if (!crcdet) {
3144 if (zfile_exists (s)) {
3145 switch (mem_type)
3146 {
3147 case 0:
3148 _tcsncpy (changed_prefs.romfile, s, 255);
3149 break;
3150 case 1:
3151 _tcsncpy (changed_prefs.romextfile, s, 255);
3152 break;
3153 }
3154 write_log (_T("ROM detected (path) as '%s'\n"), s);
3155 crcdet = 1;
3156 }
3157 }
3158 xfree (s);
3159 if (!crcdet)
3160 write_log (_T("WARNING: ROM '%s' %d.%d (CRC32=%08x %08x-%08x) not found!\n"),
3161 romn, version >> 16, version & 0xffff, crc32, mem_start, mem_start + mem_size - 1);
3162 xfree (romn);
3163 return src;
3164 }
3165
save_rom(int first,int * len,uae_u8 * dstptr)3166 uae_u8 *save_rom (int first, int *len, uae_u8 *dstptr)
3167 {
3168 static int count;
3169 uae_u8 *dst, *dstbak;
3170 uae_u8 *mem_real_start;
3171 uae_u32 version;
3172 TCHAR *path;
3173 int mem_start, mem_size, mem_type, saverom;
3174 int i;
3175 TCHAR tmpname[1000];
3176
3177 version = 0;
3178 saverom = 0;
3179 if (first)
3180 count = 0;
3181 for (;;) {
3182 mem_type = count;
3183 mem_size = 0;
3184 switch (count) {
3185 case 0: /* Kickstart ROM */
3186 mem_start = 0xf80000;
3187 mem_real_start = kickmemory;
3188 mem_size = kickmem_size;
3189 path = currprefs.romfile;
3190 /* 256KB or 512KB ROM? */
3191 for (i = 0; i < mem_size / 2 - 4; i++) {
3192 if (longget (i + mem_start) != longget (i + mem_start + mem_size / 2))
3193 break;
3194 }
3195 if (i == mem_size / 2 - 4) {
3196 mem_size /= 2;
3197 mem_start += 262144;
3198 }
3199 version = longget (mem_start + 12); /* version+revision */
3200 _stprintf (tmpname, _T("Kickstart %d.%d"), wordget (mem_start + 12), wordget (mem_start + 14));
3201 break;
3202 case 1: /* Extended ROM */
3203 if (!extendedkickmem_type)
3204 break;
3205 mem_start = extendedkickmem_start;
3206 mem_real_start = extendedkickmemory;
3207 mem_size = extendedkickmem_size;
3208 path = currprefs.romextfile;
3209 version = longget (mem_start + 12); /* version+revision */
3210 if (version == 0xffffffff)
3211 version = longget (mem_start + 16);
3212 _stprintf (tmpname, _T("Extended"));
3213 break;
3214 default:
3215 return 0;
3216 }
3217 count++;
3218 if (mem_size)
3219 break;
3220 }
3221 if (dstptr)
3222 dstbak = dst = dstptr;
3223 else
3224 dstbak = dst = xmalloc (uae_u8, 4 + 4 + 4 + 4 + 4 + 256 + 256 + mem_size);
3225 save_u32 (mem_start);
3226 save_u32 (mem_size);
3227 save_u32 (mem_type);
3228 save_u32 (version);
3229 save_u32 (get_crc32 (mem_real_start, mem_size));
3230 save_string (tmpname);
3231 save_string (path);
3232 if (saverom) {
3233 for (i = 0; i < mem_size; i++)
3234 *dst++ = byteget (mem_start + i);
3235 }
3236 *len = dst - dstbak;
3237 return dstbak;
3238 }
3239
3240 #endif /* SAVESTATE */
3241
3242 /* memory helpers */
3243
memcpyha_safe(uaecptr dst,const uae_u8 * src,int size)3244 void memcpyha_safe (uaecptr dst, const uae_u8 *src, int size)
3245 {
3246 if (!addr_valid (_T("memcpyha"), dst, size))
3247 return;
3248 while (size--)
3249 put_byte (dst++, *src++);
3250 }
3251
memcpyha(uaecptr dst,const uae_u8 * src,int size)3252 void memcpyha (uaecptr dst, const uae_u8 *src, int size)
3253 {
3254 while (size--)
3255 put_byte (dst++, *src++);
3256 }
3257
memcpyah_safe(uae_u8 * dst,uaecptr src,int size)3258 void memcpyah_safe (uae_u8 *dst, uaecptr src, int size)
3259 {
3260 if (!addr_valid (_T("memcpyah"), src, size))
3261 return;
3262 while (size--)
3263 *dst++ = get_byte (src++);
3264 }
3265
memcpyah(uae_u8 * dst,uaecptr src,int size)3266 void memcpyah (uae_u8 *dst, uaecptr src, int size)
3267 {
3268 while (size--)
3269 *dst++ = get_byte (src++);
3270 }
3271
strcpyah_safe(uae_char * dst,uaecptr src,int maxsize)3272 uae_char *strcpyah_safe (uae_char *dst, uaecptr src, int maxsize)
3273 {
3274 uae_char *res = dst;
3275 uae_u8 b;
3276 dst[0] = 0;
3277 do {
3278 if (!addr_valid (_T("_tcscpyah"), src, 1))
3279 return res;
3280 b = get_byte (src++);
3281 *dst++ = b;
3282 *dst = 0;
3283 maxsize--;
3284 if (maxsize <= 1)
3285 break;
3286 } while (b);
3287 return res;
3288 }
3289
strcpyha_safe(uaecptr dst,const uae_char * src)3290 uaecptr strcpyha_safe (uaecptr dst, const uae_char *src)
3291 {
3292 uaecptr res = dst;
3293 uae_u8 b;
3294 do {
3295 if (!addr_valid (_T("_tcscpyha"), dst, 1))
3296 return res;
3297 b = *src++;
3298 put_byte (dst++, b);
3299 } while (b);
3300 return res;
3301 }
3302